Emilio G. Cota 4f82446de6 target/i386: move cpu_tmp3_i32 to DisasContext ... Signed-off-by: Emilio G. Cota <cota@braap.org> Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>		2018-10-02 19:08:50 +02:00
..
alpha	tcg: Pass tb and index to tcg_gen_exit_tb separately	2018-06-01 15:15:27 -07:00
arm	target/arm: Start AArch32 CPUs with EL2 but not EL3 in Hyp mode	2018-09-25 15:13:24 +01:00
cris	tcg-next queue	2018-06-04 11:28:31 +01:00
hppa	tcg-next queue	2018-06-04 11:28:31 +01:00
i386	target/i386: move cpu_tmp3_i32 to DisasContext	2018-10-02 19:08:50 +02:00
lm32	tcg-next queue	2018-06-04 11:28:31 +01:00
m68k	target/m68k: Merge disas_m68k_insn into m68k_tr_translate_insn	2018-06-11 12:43:42 +02:00
microblaze	target-microblaze: Rework NOP/zero instruction handling	2018-06-15 09:05:00 +02:00
mips	target/mips: Add definition of nanoMIPS I7200 CPU	2018-08-24 17:51:59 +02:00
moxie	tcg-next queue	2018-06-04 11:28:31 +01:00
nios2	tcg-next queue	2018-06-04 11:28:31 +01:00
openrisc	target/openrisc: Fix writes to interrupt mask register	2018-07-03 22:40:33 +09:00
ppc	target/ppc/cpu-models: Re-group the 970 CPUs together again	2018-09-25 11:12:25 +10:00
riscv	riscv: remove define cpu_init()	2018-09-05 09:58:38 -07:00
s390x	target/s390x: use regular spaces in translate.c	2018-08-28 17:37:01 +02:00
sh4	sh4: fix use_icount with linux-user	2018-08-20 00:11:06 +02:00
sparc	SPARC64: add icount support	2018-06-17 11:13:06 +01:00
tilegx	tcg-next queue	2018-06-04 11:28:31 +01:00
tricore	tcg: Pass tb and index to tcg_gen_exit_tb separately	2018-06-01 15:15:27 -07:00
unicore32	tcg: Pass tb and index to tcg_gen_exit_tb separately	2018-06-01 15:15:27 -07:00
xtensa	target/xtensa: extract gen_check_interrupts call	2018-10-01 11:08:36 -07:00