mirror of https://gitee.com/openkylin/qemu.git
125 lines
3.6 KiB
C
125 lines
3.6 KiB
C
/*
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* pcie_port.c
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*
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* Copyright (c) 2010 Isaku Yamahata <yamahata at valinux co jp>
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* VA Linux Systems Japan K.K.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License along
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* with this program; if not, see <http://www.gnu.org/licenses/>.
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*/
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#include "pcie_port.h"
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void pcie_port_init_reg(PCIDevice *d)
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{
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/* Unlike pci bridge,
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66MHz and fast back to back don't apply to pci express port. */
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pci_set_word(d->config + PCI_STATUS, 0);
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pci_set_word(d->config + PCI_SEC_STATUS, 0);
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/* Unlike conventional pci bridge, some bits are hardwared to 0. */
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pci_set_word(d->wmask + PCI_BRIDGE_CONTROL,
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PCI_BRIDGE_CTL_PARITY |
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PCI_BRIDGE_CTL_ISA |
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PCI_BRIDGE_CTL_VGA |
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PCI_BRIDGE_CTL_SERR |
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PCI_BRIDGE_CTL_BUS_RESET);
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/* 7.5.3.5 Prefetchable Memory Base Limit
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* The Prefetchable Memory Base and Prefetchable Memory Limit registers
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* must indicate that 64-bit addresses are supported, as defined in
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* PCI-to-PCI Bridge Architecture Specification, Revision 1.2.
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*/
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pci_word_test_and_set_mask(d->config + PCI_PREF_MEMORY_BASE,
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PCI_PREF_RANGE_TYPE_64);
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pci_word_test_and_set_mask(d->config + PCI_PREF_MEMORY_LIMIT,
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PCI_PREF_RANGE_TYPE_64);
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}
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/**************************************************************************
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* (chassis number, pcie physical slot number) -> pcie slot conversion
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*/
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struct PCIEChassis {
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uint8_t number;
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QLIST_HEAD(, PCIESlot) slots;
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QLIST_ENTRY(PCIEChassis) next;
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};
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static QLIST_HEAD(, PCIEChassis) chassis = QLIST_HEAD_INITIALIZER(chassis);
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static struct PCIEChassis *pcie_chassis_find(uint8_t chassis_number)
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{
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struct PCIEChassis *c;
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QLIST_FOREACH(c, &chassis, next) {
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if (c->number == chassis_number) {
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break;
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}
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}
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return c;
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}
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void pcie_chassis_create(uint8_t chassis_number)
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{
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struct PCIEChassis *c;
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c = pcie_chassis_find(chassis_number);
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if (c) {
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return;
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}
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c = g_malloc0(sizeof(*c));
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c->number = chassis_number;
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QLIST_INIT(&c->slots);
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QLIST_INSERT_HEAD(&chassis, c, next);
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}
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static PCIESlot *pcie_chassis_find_slot_with_chassis(struct PCIEChassis *c,
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uint8_t slot)
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{
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PCIESlot *s;
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QLIST_FOREACH(s, &c->slots, next) {
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if (s->slot == slot) {
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break;
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}
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}
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return s;
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}
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PCIESlot *pcie_chassis_find_slot(uint8_t chassis_number, uint16_t slot)
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{
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struct PCIEChassis *c;
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c = pcie_chassis_find(chassis_number);
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if (!c) {
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return NULL;
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}
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return pcie_chassis_find_slot_with_chassis(c, slot);
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}
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int pcie_chassis_add_slot(struct PCIESlot *slot)
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{
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struct PCIEChassis *c;
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c = pcie_chassis_find(slot->chassis);
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if (!c) {
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return -ENODEV;
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}
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if (pcie_chassis_find_slot_with_chassis(c, slot->slot)) {
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return -EBUSY;
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}
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QLIST_INSERT_HEAD(&c->slots, slot, next);
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return 0;
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}
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void pcie_chassis_del_slot(PCIESlot *s)
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{
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QLIST_REMOVE(s, next);
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}
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