mirror of https://gitee.com/openkylin/qemu.git
152be6de91
This includes: - NaNBox fixes - Vector extension improvements - a L2 cache controller - PMP fixes - Upgrade to OpenSBI v0.8 and the generic platform - Fixes for the Ibex PLIC -----BEGIN PGP SIGNATURE----- iQEzBAABCAAdFiEE9sSsRtSTSGjTuM6PIeENKd+XcFQFAl9Ar0oACgkQIeENKd+X cFSxZQgAohfo4YEv8i74anCsArSMacyRcZj7gPb3CyHaJcKXgBjSvyWtAbtMVX6n sVXLPE1u7jSgLqEYDqZHgqnTY5CRIkEF1F8h8l+Sz9W7InDLfYchbkNHTQ2FYaXj MnGBCHlkoOXawWKmubQIpVSrb3qMw3lzO+sglAwyut+eqao4uGBf8C4aBDRBs9Ks FLq4cKajAnzH7LjkQuj4YH2N3bj2WsBm1yt/B8NaYHBYwoyV/NJGfK/3yjBnqfGb mZWLXncNiikoVR1cJXTz+mTfRs7UMtsSUkdBSsyMUTDPBqfQrR7ABxxu0SzKd3+N xF9DS9qPk9aQlsAvqNP4N14rnS1I+g== =RJ3z -----END PGP SIGNATURE----- Merge remote-tracking branch 'remotes/alistair/tags/pull-riscv-to-apply-20200821-1' into staging The first RISC-V PR for the 5.2 window. This includes: - NaNBox fixes - Vector extension improvements - a L2 cache controller - PMP fixes - Upgrade to OpenSBI v0.8 and the generic platform - Fixes for the Ibex PLIC # gpg: Signature made Sat 22 Aug 2020 06:38:18 BST # gpg: using RSA key F6C4AC46D4934868D3B8CE8F21E10D29DF977054 # gpg: Good signature from "Alistair Francis <alistair@alistair23.me>" [full] # Primary key fingerprint: F6C4 AC46 D493 4868 D3B8 CE8F 21E1 0D29 DF97 7054 * remotes/alistair/tags/pull-riscv-to-apply-20200821-1: hw/intc: ibex_plic: Honour source priorities hw/intc: ibex_plic: Don't allow repeat interrupts on claimed lines hw/intc: ibex_plic: Update the pending irqs target/riscv: Change the TLB page size depends on PMP entries. target/riscv: Fix the translation of physical address gitlab-ci/opensbi: Update GitLab CI to build generic platform hw/riscv: spike: Change the default bios to use generic platform image hw/riscv: Use pre-built bios image of generic platform for virt & sifive_u roms/Makefile: Build the generic platform for RISC-V OpenSBI firmware roms/opensbi: Upgrade from v0.7 to v0.8 configure: Create symbolic links for pc-bios/*.elf files riscv: Fix bug in setting pmpcfg CSR for RISCV64 hw/riscv: sifive_u: Add a dummy L2 cache controller device target/riscv: check before allocating TCG temps target/riscv: Clean up fmv.w.x target/riscv: Check nanboxed inputs in trans_rvf.inc.c target/riscv: Check nanboxed inputs to fp helpers target/riscv: Generate nanboxed results from trans_rvf.inc.c target/riscv: Generalize gen_nanbox_fpr to gen_nanbox_s target/riscv: Generate nanboxed results from fp helpers Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
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.. | ||
QemuMacDrivers@90c488d5f4 | ||
SLOF@e18ddad851 | ||
edk2@20d2e5a125 | ||
ipxe@de4565cbe7 | ||
openbios@7f28286f5c | ||
opensbi@a98258d0b5 | ||
qboot@cb1c49e0cf | ||
qemu-palcode@bf0e136988 | ||
seabios@155821a199 | ||
seabios-hppa@1630ac7d65 | ||
sgabios@cbaee52287 | ||
skiboot@3a6fdede6c | ||
u-boot@d3689267f9 | ||
u-boot-sam460ex@60b3916f33 | ||
Makefile | ||
Makefile.edk2 | ||
config.seabios-128k | ||
config.seabios-256k | ||
config.vga-ati | ||
config.vga-bochs-display | ||
config.vga-cirrus | ||
config.vga-isavga | ||
config.vga-qxl | ||
config.vga-ramfb | ||
config.vga-stdvga | ||
config.vga-virtio | ||
config.vga-vmware | ||
configure-seabios.sh | ||
edk2-build.sh | ||
edk2-funcs.sh |