qemu/target-tricore
Bastian Koppelmann bebe80fc78 target-tricore: Add instructions of RRR1 opcode format, which have 0xc3 as first opcode
Add helpers helper_addsur_h/_ssov which adds one halfword and subtracts one
halfword, rounds / and saturates each half word independently.

Add microcode helper functions:
    * gen_maddsu_h/sus_h: multiply two halfwords left justified and add to the
                          first one word and subtract from the second one word
                          / and saturate each resulting word independetly.
    * gen_maddsum_h/sums_h: multiply two halfwords in q-format left justified
                            and add to the first one word and subtract from
                            the second one word / and saturate each resulting
                            word independetly.
    * gen_maddsur32_h/32s_h: multiply two halfwords in q-format left justified
                             and add to the first one word and subtract from
                             the second one word, round both results / and
                             saturate each resulting word independetly.

Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
Reviewed-by: Richard Henderson <rth@twiddle.net>
2015-03-03 01:06:00 +00:00
..
Makefile.objs target-tricore: Add target stubs and qom-cpu 2014-09-01 14:49:20 +01:00
cpu-qom.h target-tricore: Remove the dummy interrupt boilerplate 2014-09-25 18:54:22 +01:00
cpu.c target-tricore: Several translator and cpu model fixes 2015-01-26 19:56:45 +00:00
cpu.h target-tricore: Fix bugs found by coverity 2015-01-26 19:56:45 +00:00
csfr.def target-tricore: Fix new typos 2015-01-15 10:44:13 +03:00
helper.c target-tricore: Remove the dummy interrupt boilerplate 2014-09-25 18:54:22 +01:00
helper.h target-tricore: Add instructions of RRR1 opcode format, which have 0xc3 as first opcode 2015-03-03 01:06:00 +00:00
op_helper.c target-tricore: Add instructions of RRR1 opcode format, which have 0xc3 as first opcode 2015-03-03 01:06:00 +00:00
translate.c target-tricore: Add instructions of RRR1 opcode format, which have 0xc3 as first opcode 2015-03-03 01:06:00 +00:00
tricore-defs.h target-tricore: Add target stubs and qom-cpu 2014-09-01 14:49:20 +01:00
tricore-opcodes.h target-tricore: Add instructions of RRR1 opcode format, which have 0x43 as first opcode 2015-03-03 01:05:44 +00:00