mirror of https://gitee.com/openkylin/qemu.git
97ba42230b
Microchip PolarFire SoC integrates a DMA engine that supports: * Independent concurrent DMA transfers using 4 DMA channels * Generation of interrupts on various conditions during execution which is actually an IP reused from the SiFive FU540 chip. This creates a model to support both polling and interrupt modes. Signed-off-by: Bin Meng <bin.meng@windriver.com> Acked-by: Alistair Francis <alistair.francis@wdc.com> Message-Id: <1598924352-89526-10-git-send-email-bmeng.cn@gmail.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com> |
||
---|---|---|
.. | ||
Kconfig | ||
bcm2835_dma.c | ||
etraxfs_dma.c | ||
i8257.c | ||
i82374.c | ||
meson.build | ||
omap_dma.c | ||
pl080.c | ||
pl330.c | ||
puv3_dma.c | ||
pxa2xx_dma.c | ||
rc4030.c | ||
sifive_pdma.c | ||
soc_dma.c | ||
sparc32_dma.c | ||
trace-events | ||
trace.h | ||
xilinx_axidma.c | ||
xlnx-zdma.c | ||
xlnx-zynq-devcfg.c | ||
xlnx_dpdma.c |