mirror of https://gitee.com/openkylin/qemu.git
156 lines
4.3 KiB
C
156 lines
4.3 KiB
C
/*
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* AArch64 specific helpers
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*
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* Copyright (c) 2013 Alexander Graf <agraf@suse.de>
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*
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* This library is free software; you can redistribute it and/or
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* modify it under the terms of the GNU Lesser General Public
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* License as published by the Free Software Foundation; either
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* version 2 of the License, or (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public
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* License along with this library; if not, see <http://www.gnu.org/licenses/>.
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*/
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#include "cpu.h"
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#include "exec/gdbstub.h"
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#include "helper.h"
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#include "qemu/host-utils.h"
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#include "sysemu/sysemu.h"
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#include "qemu/bitops.h"
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/* C2.4.7 Multiply and divide */
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/* special cases for 0 and LLONG_MIN are mandated by the standard */
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uint64_t HELPER(udiv64)(uint64_t num, uint64_t den)
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{
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if (den == 0) {
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return 0;
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}
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return num / den;
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}
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int64_t HELPER(sdiv64)(int64_t num, int64_t den)
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{
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if (den == 0) {
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return 0;
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}
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if (num == LLONG_MIN && den == -1) {
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return LLONG_MIN;
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}
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return num / den;
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}
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uint64_t HELPER(clz64)(uint64_t x)
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{
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return clz64(x);
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}
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uint64_t HELPER(cls64)(uint64_t x)
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{
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return clrsb64(x);
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}
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uint32_t HELPER(cls32)(uint32_t x)
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{
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return clrsb32(x);
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}
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uint64_t HELPER(rbit64)(uint64_t x)
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{
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/* assign the correct byte position */
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x = bswap64(x);
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/* assign the correct nibble position */
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x = ((x & 0xf0f0f0f0f0f0f0f0ULL) >> 4)
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| ((x & 0x0f0f0f0f0f0f0f0fULL) << 4);
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/* assign the correct bit position */
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x = ((x & 0x8888888888888888ULL) >> 3)
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| ((x & 0x4444444444444444ULL) >> 1)
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| ((x & 0x2222222222222222ULL) << 1)
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| ((x & 0x1111111111111111ULL) << 3);
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return x;
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}
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/* Convert a softfloat float_relation_ (as returned by
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* the float*_compare functions) to the correct ARM
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* NZCV flag state.
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*/
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static inline uint32_t float_rel_to_flags(int res)
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{
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uint64_t flags;
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switch (res) {
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case float_relation_equal:
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flags = PSTATE_Z | PSTATE_C;
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break;
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case float_relation_less:
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flags = PSTATE_N;
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break;
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case float_relation_greater:
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flags = PSTATE_C;
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break;
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case float_relation_unordered:
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default:
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flags = PSTATE_C | PSTATE_V;
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break;
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}
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return flags;
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}
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uint64_t HELPER(vfp_cmps_a64)(float32 x, float32 y, void *fp_status)
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{
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return float_rel_to_flags(float32_compare_quiet(x, y, fp_status));
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}
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uint64_t HELPER(vfp_cmpes_a64)(float32 x, float32 y, void *fp_status)
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{
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return float_rel_to_flags(float32_compare(x, y, fp_status));
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}
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uint64_t HELPER(vfp_cmpd_a64)(float64 x, float64 y, void *fp_status)
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{
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return float_rel_to_flags(float64_compare_quiet(x, y, fp_status));
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}
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uint64_t HELPER(vfp_cmped_a64)(float64 x, float64 y, void *fp_status)
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{
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return float_rel_to_flags(float64_compare(x, y, fp_status));
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}
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uint64_t HELPER(simd_tbl)(CPUARMState *env, uint64_t result, uint64_t indices,
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uint32_t rn, uint32_t numregs)
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{
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/* Helper function for SIMD TBL and TBX. We have to do the table
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* lookup part for the 64 bits worth of indices we're passed in.
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* result is the initial results vector (either zeroes for TBL
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* or some guest values for TBX), rn the register number where
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* the table starts, and numregs the number of registers in the table.
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* We return the results of the lookups.
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*/
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int shift;
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for (shift = 0; shift < 64; shift += 8) {
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int index = extract64(indices, shift, 8);
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if (index < 16 * numregs) {
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/* Convert index (a byte offset into the virtual table
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* which is a series of 128-bit vectors concatenated)
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* into the correct vfp.regs[] element plus a bit offset
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* into that element, bearing in mind that the table
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* can wrap around from V31 to V0.
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*/
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int elt = (rn * 2 + (index >> 3)) % 64;
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int bitidx = (index & 7) * 8;
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uint64_t val = extract64(env->vfp.regs[elt], bitidx, 8);
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result = deposit64(result, shift, 8, val);
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}
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}
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return result;
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}
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