Cédric Le Goater 0584d3c33f aspeed/smc: improve segment register support ... The HW does not enforce all the rules in the specs and allows a few "curious" setups like zero size segments and overlaps. So change the model to be in sync but keep the warnings which are always interesting for debug. Signed-off-by: Cédric Le Goater <clg@kaod.org> Reviewed-by: Joel Stanley <joel@jms.id.au> Message-id: 1480434248-27138-13-git-send-email-clg@kaod.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>		2016-12-27 14:59:28 +00:00
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Makefile.objs	STM32F2xx: Add the SPI device	2016-10-04 13:28:07 +01:00
aspeed_smc.c	aspeed/smc: improve segment register support	2016-12-27 14:59:28 +00:00
imx_spi.c	imx: Use 'const char', not 'char const'	2016-09-22 18:13:09 +01:00
omap_spi.c	arm devices: Clean up includes	2016-01-29 15:07:25 +00:00
pl022.c	hw: explicitly include qemu/log.h	2016-05-19 16:42:29 +02:00
ssi.c	ssi: change ssi_slave_init to be a realize ops	2016-07-04 13:15:22 +01:00
stm32f2xx_spi.c	STM32F2xx: Add the SPI device	2016-10-04 13:28:07 +01:00
xilinx_spi.c	arm: Clean up includes	2016-01-29 15:07:23 +00:00
xilinx_spips.c	xilinx: fix buffer overflow on realize	2016-10-24 15:27:20 +02:00