mirror of https://gitee.com/openkylin/qemu.git
575 lines
17 KiB
C
575 lines
17 KiB
C
/*
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* NUMA parameter parsing routines
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*
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* Copyright (c) 2014 Fujitsu Ltd.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*/
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#include "qemu/osdep.h"
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#include "sysemu/numa.h"
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#include "exec/cpu-common.h"
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#include "qemu/bitmap.h"
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#include "qom/cpu.h"
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#include "qemu/error-report.h"
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#include "include/exec/cpu-common.h" /* for RAM_ADDR_FMT */
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#include "qapi-visit.h"
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#include "qapi/opts-visitor.h"
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#include "hw/boards.h"
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#include "sysemu/hostmem.h"
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#include "qmp-commands.h"
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#include "hw/mem/pc-dimm.h"
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#include "qemu/option.h"
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#include "qemu/config-file.h"
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QemuOptsList qemu_numa_opts = {
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.name = "numa",
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.implied_opt_name = "type",
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.head = QTAILQ_HEAD_INITIALIZER(qemu_numa_opts.head),
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.desc = { { 0 } } /* validated with OptsVisitor */
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};
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static int have_memdevs = -1;
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static int max_numa_nodeid; /* Highest specified NUMA node ID, plus one.
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* For all nodes, nodeid < max_numa_nodeid
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*/
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int nb_numa_nodes;
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NodeInfo numa_info[MAX_NODES];
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void numa_set_mem_node_id(ram_addr_t addr, uint64_t size, uint32_t node)
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{
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struct numa_addr_range *range;
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/*
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* Memory-less nodes can come here with 0 size in which case,
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* there is nothing to do.
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*/
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if (!size) {
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return;
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}
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range = g_malloc0(sizeof(*range));
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range->mem_start = addr;
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range->mem_end = addr + size - 1;
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QLIST_INSERT_HEAD(&numa_info[node].addr, range, entry);
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}
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void numa_unset_mem_node_id(ram_addr_t addr, uint64_t size, uint32_t node)
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{
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struct numa_addr_range *range, *next;
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QLIST_FOREACH_SAFE(range, &numa_info[node].addr, entry, next) {
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if (addr == range->mem_start && (addr + size - 1) == range->mem_end) {
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QLIST_REMOVE(range, entry);
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g_free(range);
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return;
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}
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}
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}
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static void numa_set_mem_ranges(void)
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{
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int i;
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ram_addr_t mem_start = 0;
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/*
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* Deduce start address of each node and use it to store
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* the address range info in numa_info address range list
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*/
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for (i = 0; i < nb_numa_nodes; i++) {
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numa_set_mem_node_id(mem_start, numa_info[i].node_mem, i);
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mem_start += numa_info[i].node_mem;
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}
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}
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/*
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* Check if @addr falls under NUMA @node.
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*/
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static bool numa_addr_belongs_to_node(ram_addr_t addr, uint32_t node)
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{
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struct numa_addr_range *range;
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QLIST_FOREACH(range, &numa_info[node].addr, entry) {
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if (addr >= range->mem_start && addr <= range->mem_end) {
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return true;
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}
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}
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return false;
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}
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/*
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* Given an address, return the index of the NUMA node to which the
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* address belongs to.
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*/
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uint32_t numa_get_node(ram_addr_t addr, Error **errp)
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{
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uint32_t i;
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/* For non NUMA configurations, check if the addr falls under node 0 */
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if (!nb_numa_nodes) {
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if (numa_addr_belongs_to_node(addr, 0)) {
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return 0;
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}
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}
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for (i = 0; i < nb_numa_nodes; i++) {
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if (numa_addr_belongs_to_node(addr, i)) {
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return i;
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}
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}
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error_setg(errp, "Address 0x" RAM_ADDR_FMT " doesn't belong to any "
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"NUMA node", addr);
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return -1;
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}
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static void numa_node_parse(NumaNodeOptions *node, QemuOpts *opts, Error **errp)
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{
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uint16_t nodenr;
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uint16List *cpus = NULL;
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if (node->has_nodeid) {
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nodenr = node->nodeid;
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} else {
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nodenr = nb_numa_nodes;
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}
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if (nodenr >= MAX_NODES) {
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error_setg(errp, "Max number of NUMA nodes reached: %"
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PRIu16 "", nodenr);
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return;
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}
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if (numa_info[nodenr].present) {
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error_setg(errp, "Duplicate NUMA nodeid: %" PRIu16, nodenr);
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return;
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}
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for (cpus = node->cpus; cpus; cpus = cpus->next) {
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if (cpus->value >= max_cpus) {
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error_setg(errp,
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"CPU index (%" PRIu16 ")"
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" should be smaller than maxcpus (%d)",
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cpus->value, max_cpus);
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return;
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}
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bitmap_set(numa_info[nodenr].node_cpu, cpus->value, 1);
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}
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if (node->has_mem && node->has_memdev) {
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error_setg(errp, "qemu: cannot specify both mem= and memdev=");
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return;
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}
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if (have_memdevs == -1) {
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have_memdevs = node->has_memdev;
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}
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if (node->has_memdev != have_memdevs) {
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error_setg(errp, "qemu: memdev option must be specified for either "
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"all or no nodes");
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return;
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}
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if (node->has_mem) {
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uint64_t mem_size = node->mem;
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const char *mem_str = qemu_opt_get(opts, "mem");
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/* Fix up legacy suffix-less format */
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if (g_ascii_isdigit(mem_str[strlen(mem_str) - 1])) {
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mem_size <<= 20;
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}
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numa_info[nodenr].node_mem = mem_size;
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}
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if (node->has_memdev) {
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Object *o;
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o = object_resolve_path_type(node->memdev, TYPE_MEMORY_BACKEND, NULL);
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if (!o) {
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error_setg(errp, "memdev=%s is ambiguous", node->memdev);
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return;
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}
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object_ref(o);
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numa_info[nodenr].node_mem = object_property_get_int(o, "size", NULL);
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numa_info[nodenr].node_memdev = MEMORY_BACKEND(o);
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}
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numa_info[nodenr].present = true;
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max_numa_nodeid = MAX(max_numa_nodeid, nodenr + 1);
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}
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static int parse_numa(void *opaque, QemuOpts *opts, Error **errp)
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{
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NumaOptions *object = NULL;
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Error *err = NULL;
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{
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Visitor *v = opts_visitor_new(opts);
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visit_type_NumaOptions(v, NULL, &object, &err);
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visit_free(v);
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}
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if (err) {
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goto end;
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}
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switch (object->type) {
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case NUMA_OPTIONS_KIND_NODE:
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numa_node_parse(object->u.node.data, opts, &err);
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if (err) {
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goto end;
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}
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nb_numa_nodes++;
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break;
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default:
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abort();
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}
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end:
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qapi_free_NumaOptions(object);
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if (err) {
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error_report_err(err);
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return -1;
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}
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return 0;
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}
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static char *enumerate_cpus(unsigned long *cpus, int max_cpus)
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{
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int cpu;
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bool first = true;
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GString *s = g_string_new(NULL);
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for (cpu = find_first_bit(cpus, max_cpus);
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cpu < max_cpus;
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cpu = find_next_bit(cpus, max_cpus, cpu + 1)) {
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g_string_append_printf(s, "%s%d", first ? "" : " ", cpu);
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first = false;
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}
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return g_string_free(s, FALSE);
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}
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static void validate_numa_cpus(void)
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{
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int i;
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unsigned long *seen_cpus = bitmap_new(max_cpus);
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for (i = 0; i < nb_numa_nodes; i++) {
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if (bitmap_intersects(seen_cpus, numa_info[i].node_cpu, max_cpus)) {
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bitmap_and(seen_cpus, seen_cpus,
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numa_info[i].node_cpu, max_cpus);
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error_report("CPU(s) present in multiple NUMA nodes: %s",
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enumerate_cpus(seen_cpus, max_cpus));
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g_free(seen_cpus);
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exit(EXIT_FAILURE);
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}
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bitmap_or(seen_cpus, seen_cpus,
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numa_info[i].node_cpu, max_cpus);
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}
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if (!bitmap_full(seen_cpus, max_cpus)) {
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char *msg;
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bitmap_complement(seen_cpus, seen_cpus, max_cpus);
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msg = enumerate_cpus(seen_cpus, max_cpus);
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error_report("warning: CPU(s) not present in any NUMA nodes: %s", msg);
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error_report("warning: All CPU(s) up to maxcpus should be described "
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"in NUMA config");
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g_free(msg);
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}
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g_free(seen_cpus);
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}
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void parse_numa_opts(MachineClass *mc)
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{
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int i;
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for (i = 0; i < MAX_NODES; i++) {
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numa_info[i].node_cpu = bitmap_new(max_cpus);
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}
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if (qemu_opts_foreach(qemu_find_opts("numa"), parse_numa, NULL, NULL)) {
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exit(1);
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}
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assert(max_numa_nodeid <= MAX_NODES);
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/* No support for sparse NUMA node IDs yet: */
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for (i = max_numa_nodeid - 1; i >= 0; i--) {
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/* Report large node IDs first, to make mistakes easier to spot */
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if (!numa_info[i].present) {
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error_report("numa: Node ID missing: %d", i);
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exit(1);
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}
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}
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/* This must be always true if all nodes are present: */
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assert(nb_numa_nodes == max_numa_nodeid);
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if (nb_numa_nodes > 0) {
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uint64_t numa_total;
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if (nb_numa_nodes > MAX_NODES) {
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nb_numa_nodes = MAX_NODES;
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}
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/* If no memory size is given for any node, assume the default case
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* and distribute the available memory equally across all nodes
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*/
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for (i = 0; i < nb_numa_nodes; i++) {
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if (numa_info[i].node_mem != 0) {
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break;
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}
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}
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if (i == nb_numa_nodes) {
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uint64_t usedmem = 0;
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/* On Linux, each node's border has to be 8MB aligned,
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* the final node gets the rest.
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*/
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for (i = 0; i < nb_numa_nodes - 1; i++) {
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numa_info[i].node_mem = (ram_size / nb_numa_nodes) &
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~((1 << 23UL) - 1);
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usedmem += numa_info[i].node_mem;
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}
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numa_info[i].node_mem = ram_size - usedmem;
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}
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numa_total = 0;
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for (i = 0; i < nb_numa_nodes; i++) {
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numa_total += numa_info[i].node_mem;
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}
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if (numa_total != ram_size) {
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error_report("total memory for NUMA nodes (0x%" PRIx64 ")"
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" should equal RAM size (0x" RAM_ADDR_FMT ")",
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numa_total, ram_size);
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exit(1);
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}
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for (i = 0; i < nb_numa_nodes; i++) {
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QLIST_INIT(&numa_info[i].addr);
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}
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numa_set_mem_ranges();
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for (i = 0; i < nb_numa_nodes; i++) {
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if (!bitmap_empty(numa_info[i].node_cpu, max_cpus)) {
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break;
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}
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}
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/* Historically VCPUs were assigned in round-robin order to NUMA
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* nodes. However it causes issues with guest not handling it nice
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* in case where cores/threads from a multicore CPU appear on
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* different nodes. So allow boards to override default distribution
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* rule grouping VCPUs by socket so that VCPUs from the same socket
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* would be on the same node.
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*/
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if (i == nb_numa_nodes) {
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for (i = 0; i < max_cpus; i++) {
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unsigned node_id = i % nb_numa_nodes;
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if (mc->cpu_index_to_socket_id) {
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node_id = mc->cpu_index_to_socket_id(i) % nb_numa_nodes;
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}
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set_bit(i, numa_info[node_id].node_cpu);
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}
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}
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validate_numa_cpus();
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} else {
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numa_set_mem_node_id(0, ram_size, 0);
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}
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}
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void numa_post_machine_init(void)
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{
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CPUState *cpu;
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int i;
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CPU_FOREACH(cpu) {
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for (i = 0; i < nb_numa_nodes; i++) {
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assert(cpu->cpu_index < max_cpus);
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if (test_bit(cpu->cpu_index, numa_info[i].node_cpu)) {
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cpu->numa_node = i;
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}
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}
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}
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}
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static void allocate_system_memory_nonnuma(MemoryRegion *mr, Object *owner,
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const char *name,
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uint64_t ram_size)
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{
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if (mem_path) {
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#ifdef __linux__
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Error *err = NULL;
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memory_region_init_ram_from_file(mr, owner, name, ram_size, false,
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mem_path, &err);
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if (err) {
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error_report_err(err);
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if (mem_prealloc) {
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exit(1);
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}
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/* Legacy behavior: if allocation failed, fall back to
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* regular RAM allocation.
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*/
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memory_region_init_ram(mr, owner, name, ram_size, &error_fatal);
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}
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#else
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fprintf(stderr, "-mem-path not supported on this host\n");
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exit(1);
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#endif
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} else {
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memory_region_init_ram(mr, owner, name, ram_size, &error_fatal);
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}
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vmstate_register_ram_global(mr);
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}
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void memory_region_allocate_system_memory(MemoryRegion *mr, Object *owner,
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const char *name,
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uint64_t ram_size)
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{
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uint64_t addr = 0;
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int i;
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if (nb_numa_nodes == 0 || !have_memdevs) {
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allocate_system_memory_nonnuma(mr, owner, name, ram_size);
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return;
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}
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memory_region_init(mr, owner, name, ram_size);
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for (i = 0; i < MAX_NODES; i++) {
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uint64_t size = numa_info[i].node_mem;
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HostMemoryBackend *backend = numa_info[i].node_memdev;
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if (!backend) {
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continue;
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}
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MemoryRegion *seg = host_memory_backend_get_memory(backend,
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&error_fatal);
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if (memory_region_is_mapped(seg)) {
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char *path = object_get_canonical_path_component(OBJECT(backend));
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error_report("memory backend %s is used multiple times. Each "
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"-numa option must use a different memdev value.",
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path);
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exit(1);
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}
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host_memory_backend_set_mapped(backend, true);
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memory_region_add_subregion(mr, addr, seg);
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vmstate_register_ram_global(seg);
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addr += size;
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}
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}
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static void numa_stat_memory_devices(uint64_t node_mem[])
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{
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MemoryDeviceInfoList *info_list = NULL;
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MemoryDeviceInfoList **prev = &info_list;
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MemoryDeviceInfoList *info;
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qmp_pc_dimm_device_list(qdev_get_machine(), &prev);
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for (info = info_list; info; info = info->next) {
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MemoryDeviceInfo *value = info->value;
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if (value) {
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switch (value->type) {
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case MEMORY_DEVICE_INFO_KIND_DIMM:
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node_mem[value->u.dimm.data->node] += value->u.dimm.data->size;
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break;
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default:
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break;
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}
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}
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}
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qapi_free_MemoryDeviceInfoList(info_list);
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}
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void query_numa_node_mem(uint64_t node_mem[])
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{
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int i;
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if (nb_numa_nodes <= 0) {
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return;
|
|
}
|
|
|
|
numa_stat_memory_devices(node_mem);
|
|
for (i = 0; i < nb_numa_nodes; i++) {
|
|
node_mem[i] += numa_info[i].node_mem;
|
|
}
|
|
}
|
|
|
|
static int query_memdev(Object *obj, void *opaque)
|
|
{
|
|
MemdevList **list = opaque;
|
|
MemdevList *m = NULL;
|
|
|
|
if (object_dynamic_cast(obj, TYPE_MEMORY_BACKEND)) {
|
|
m = g_malloc0(sizeof(*m));
|
|
|
|
m->value = g_malloc0(sizeof(*m->value));
|
|
|
|
m->value->id = object_property_get_str(obj, "id", NULL);
|
|
m->value->has_id = !!m->value->id;
|
|
|
|
m->value->size = object_property_get_int(obj, "size",
|
|
&error_abort);
|
|
m->value->merge = object_property_get_bool(obj, "merge",
|
|
&error_abort);
|
|
m->value->dump = object_property_get_bool(obj, "dump",
|
|
&error_abort);
|
|
m->value->prealloc = object_property_get_bool(obj,
|
|
"prealloc",
|
|
&error_abort);
|
|
m->value->policy = object_property_get_enum(obj,
|
|
"policy",
|
|
"HostMemPolicy",
|
|
&error_abort);
|
|
object_property_get_uint16List(obj, "host-nodes",
|
|
&m->value->host_nodes,
|
|
&error_abort);
|
|
|
|
m->next = *list;
|
|
*list = m;
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
MemdevList *qmp_query_memdev(Error **errp)
|
|
{
|
|
Object *obj = object_get_objects_root();
|
|
MemdevList *list = NULL;
|
|
|
|
object_child_foreach(obj, query_memdev, &list);
|
|
return list;
|
|
}
|
|
|
|
int numa_get_node_for_cpu(int idx)
|
|
{
|
|
int i;
|
|
|
|
assert(idx < max_cpus);
|
|
|
|
for (i = 0; i < nb_numa_nodes; i++) {
|
|
if (test_bit(idx, numa_info[i].node_cpu)) {
|
|
break;
|
|
}
|
|
}
|
|
return i;
|
|
}
|