Jan Kiszka 5f30fa18ad gdbstub: x86: Switch 64/32 bit registers dynamically ... Commit 56aebc8916 changed gdbstub in way that debugging 32 or 16-bit guest code is no longer possible with qemu for x86_64 guest CPUs. Since that commit, qemu only provides registers sets for 64-bit, forcing current and foreseeable gdb to also switch its architecture to 64-bit. And this breaks if the inferior is 32 or 16 bit. No question, this is a gdb issue. But, as it was confirmed in several discusssions with gdb people, it is a non-trivial thing to fix. So until qemu finds a gdb version attach with a rework x86 support, we have to work around it by switching the register layout as the guest switches its execution mode between 16/32 and 64 bit. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>		2009-10-05 09:32:45 -05:00
..
TODO	Unbreak large mem support by removing kqemu	2009-08-24 08:02:55 -05:00
cpu.h	gdbstub: x86: Switch 64/32 bit registers dynamically	2009-10-05 09:32:45 -05:00
exec.h	Work around OpenSolaris sys/regset.h namespace pollution	2009-09-12 12:36:11 +00:00
helper.c	x86: mce_banks always have the same size	2009-10-05 09:32:41 -05:00
helper.h	target-i386: add RDTSCP support	2009-10-04 14:46:34 +02:00
helper_template.h	Update to a hopefully more future proof FSF address	2009-07-16 20:47:01 +00:00
kvm.c	gcc wants 1st static and then const	2009-09-25 19:52:06 +00:00
machine.c	x86: port cpu to vmstate	2009-10-05 09:32:43 -05:00
op_helper.c	target-i386: Fix exceptions for fxsave/fxrstor	2009-10-04 23:10:22 +02:00
ops_sse.h	target-i386: add SSE4a instruction support	2009-10-04 14:09:41 +02:00
ops_sse_header.h	target-i386: add SSE4a instruction support	2009-10-04 14:09:41 +02:00
svm.h	reworked SVM interrupt handling logic - fixed vmrun EIP saved value - reworked cr8 handling - added CPUState.hflags2	2008-06-04 17:02:19 +00:00
translate.c	target-i386: Fix exceptions for fxsave/fxrstor	2009-10-04 23:10:22 +02:00