mirror of https://gitee.com/openkylin/qemu.git
86 lines
2.0 KiB
C
86 lines
2.0 KiB
C
/*
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* IMX31 Clock Control Module
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*
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* Copyright (C) 2012 NICTA
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* Updated by Jean-Christophe Dubois <jcd@tribudubois.net>
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*
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* This work is licensed under the terms of the GNU GPL, version 2 or later.
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* See the COPYING file in the top-level directory.
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*
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* This is an abstract base class used to get a common interface to
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* retrieve the CCM frequencies from the various i.MX SOC.
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*/
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#include "qemu/osdep.h"
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#include "hw/misc/imx_ccm.h"
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#ifndef DEBUG_IMX_CCM
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#define DEBUG_IMX_CCM 0
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#endif
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#define DPRINTF(fmt, args...) \
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do { \
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if (DEBUG_IMX_CCM) { \
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fprintf(stderr, "[%s]%s: " fmt , TYPE_IMX_CCM, \
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__func__, ##args); \
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} \
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} while (0)
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uint32_t imx_ccm_get_clock_frequency(IMXCCMState *dev, IMXClk clock)
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{
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uint32_t freq = 0;
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IMXCCMClass *klass = IMX_GET_CLASS(dev);
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if (klass->get_clock_frequency) {
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freq = klass->get_clock_frequency(dev, clock);
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}
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DPRINTF("(clock = %d) = %d\n", clock, freq);
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return freq;
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}
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/*
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* Calculate PLL output frequency
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*/
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uint32_t imx_ccm_calc_pll(uint32_t pllreg, uint32_t base_freq)
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{
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int32_t freq;
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int32_t mfn = MFN(pllreg); /* Numerator */
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uint32_t mfi = MFI(pllreg); /* Integer part */
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uint32_t mfd = 1 + MFD(pllreg); /* Denominator */
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uint32_t pd = 1 + PD(pllreg); /* Pre-divider */
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if (mfi < 5) {
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mfi = 5;
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}
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/* mfn is 10-bit signed twos-complement */
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mfn <<= 32 - 10;
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mfn >>= 32 - 10;
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freq = ((2 * (base_freq >> 10) * (mfi * mfd + mfn)) /
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(mfd * pd)) << 10;
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DPRINTF("(pllreg = 0x%08x, base_freq = %d) = %d\n", pllreg, base_freq,
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freq);
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return freq;
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}
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static const TypeInfo imx_ccm_info = {
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.name = TYPE_IMX_CCM,
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.parent = TYPE_SYS_BUS_DEVICE,
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.instance_size = sizeof(IMXCCMState),
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.class_size = sizeof(IMXCCMClass),
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.abstract = true,
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};
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static void imx_ccm_register_types(void)
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{
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type_register_static(&imx_ccm_info);
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}
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type_init(imx_ccm_register_types)
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