mirror of https://gitee.com/openkylin/qemu.git
73 lines
2.1 KiB
C
73 lines
2.1 KiB
C
/*
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* STM32F2XX SPI
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*
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* Copyright (c) 2014 Alistair Francis <alistair@alistair23.me>
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*/
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#ifndef HW_STM32F2XX_SPI_H
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#define HW_STM32F2XX_SPI_H
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#include "hw/sysbus.h"
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#include "hw/hw.h"
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#include "hw/ssi/ssi.h"
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#define STM_SPI_CR1 0x00
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#define STM_SPI_CR2 0x04
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#define STM_SPI_SR 0x08
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#define STM_SPI_DR 0x0C
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#define STM_SPI_CRCPR 0x10
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#define STM_SPI_RXCRCR 0x14
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#define STM_SPI_TXCRCR 0x18
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#define STM_SPI_I2SCFGR 0x1C
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#define STM_SPI_I2SPR 0x20
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#define STM_SPI_CR1_SPE (1 << 6)
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#define STM_SPI_CR1_MSTR (1 << 2)
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#define STM_SPI_SR_RXNE 1
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#define TYPE_STM32F2XX_SPI "stm32f2xx-spi"
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#define STM32F2XX_SPI(obj) \
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OBJECT_CHECK(STM32F2XXSPIState, (obj), TYPE_STM32F2XX_SPI)
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typedef struct {
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/* <private> */
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SysBusDevice parent_obj;
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/* <public> */
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MemoryRegion mmio;
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uint32_t spi_cr1;
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uint32_t spi_cr2;
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uint32_t spi_sr;
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uint32_t spi_dr;
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uint32_t spi_crcpr;
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uint32_t spi_rxcrcr;
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uint32_t spi_txcrcr;
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uint32_t spi_i2scfgr;
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uint32_t spi_i2spr;
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qemu_irq irq;
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SSIBus *ssi;
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} STM32F2XXSPIState;
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#endif /* HW_STM32F2XX_SPI_H */
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