mirror of https://gitee.com/openkylin/qemu.git
728 lines
21 KiB
C
728 lines
21 KiB
C
/*
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* ACPI implementation
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*
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* Copyright (c) 2006 Fabrice Bellard
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*
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* This library is free software; you can redistribute it and/or
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* modify it under the terms of the GNU Lesser General Public
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* License version 2 as published by the Free Software Foundation.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public
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* License along with this library; if not, see <http://www.gnu.org/licenses/>
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*
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* Contributions after 2012-01-13 are licensed under the terms of the
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* GNU GPL, version 2 or (at your option) any later version.
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*/
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#include "qemu/osdep.h"
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#include "hw/irq.h"
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#include "hw/acpi/acpi.h"
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#include "hw/nvram/fw_cfg.h"
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#include "qemu/config-file.h"
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#include "qapi/error.h"
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#include "qapi/opts-visitor.h"
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#include "qapi/qapi-events-run-state.h"
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#include "qapi/qapi-visit-misc.h"
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#include "qemu/error-report.h"
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#include "qemu/module.h"
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#include "qemu/option.h"
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#include "sysemu/runstate.h"
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struct acpi_table_header {
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uint16_t _length; /* our length, not actual part of the hdr */
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/* allows easier parsing for fw_cfg clients */
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char sig[4]
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QEMU_NONSTRING; /* ACPI signature (4 ASCII characters) */
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uint32_t length; /* Length of table, in bytes, including header */
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uint8_t revision; /* ACPI Specification minor version # */
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uint8_t checksum; /* To make sum of entire table == 0 */
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char oem_id[6]
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QEMU_NONSTRING; /* OEM identification */
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char oem_table_id[8]
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QEMU_NONSTRING; /* OEM table identification */
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uint32_t oem_revision; /* OEM revision number */
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char asl_compiler_id[4]
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QEMU_NONSTRING; /* ASL compiler vendor ID */
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uint32_t asl_compiler_revision; /* ASL compiler revision number */
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} QEMU_PACKED;
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#define ACPI_TABLE_HDR_SIZE sizeof(struct acpi_table_header)
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#define ACPI_TABLE_PFX_SIZE sizeof(uint16_t) /* size of the extra prefix */
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static const char unsigned dfl_hdr[ACPI_TABLE_HDR_SIZE - ACPI_TABLE_PFX_SIZE] =
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"QEMU\0\0\0\0\1\0" /* sig (4), len(4), revno (1), csum (1) */
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"QEMUQEQEMUQEMU\1\0\0\0" /* OEM id (6), table (8), revno (4) */
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"QEMU\1\0\0\0" /* ASL compiler ID (4), version (4) */
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;
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char unsigned *acpi_tables;
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size_t acpi_tables_len;
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static QemuOptsList qemu_acpi_opts = {
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.name = "acpi",
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.implied_opt_name = "data",
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.head = QTAILQ_HEAD_INITIALIZER(qemu_acpi_opts.head),
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.desc = { { 0 } } /* validated with OptsVisitor */
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};
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static void acpi_register_config(void)
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{
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qemu_add_opts(&qemu_acpi_opts);
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}
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opts_init(acpi_register_config);
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static int acpi_checksum(const uint8_t *data, int len)
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{
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int sum, i;
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sum = 0;
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for (i = 0; i < len; i++) {
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sum += data[i];
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}
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return (-sum) & 0xff;
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}
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/* Install a copy of the ACPI table specified in @blob.
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*
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* If @has_header is set, @blob starts with the System Description Table Header
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* structure. Otherwise, "dfl_hdr" is prepended. In any case, each header field
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* is optionally overwritten from @hdrs.
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*
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* It is valid to call this function with
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* (@blob == NULL && bloblen == 0 && !has_header).
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*
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* @hdrs->file and @hdrs->data are ignored.
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*
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* SIZE_MAX is considered "infinity" in this function.
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*
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* The number of tables that can be installed is not limited, but the 16-bit
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* counter at the beginning of "acpi_tables" wraps around after UINT16_MAX.
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*/
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static void acpi_table_install(const char unsigned *blob, size_t bloblen,
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bool has_header,
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const struct AcpiTableOptions *hdrs,
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Error **errp)
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{
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size_t body_start;
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const char unsigned *hdr_src;
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size_t body_size, acpi_payload_size;
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struct acpi_table_header *ext_hdr;
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unsigned changed_fields;
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/* Calculate where the ACPI table body starts within the blob, plus where
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* to copy the ACPI table header from.
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*/
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if (has_header) {
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/* _length | ACPI header in blob | blob body
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* ^^^^^^^^^^^^^^^^^^^ ^^^^^^^^^^^^^^^^^^^ ^^^^^^^^^
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* ACPI_TABLE_PFX_SIZE sizeof dfl_hdr body_size
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* == body_start
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*
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* ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
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* acpi_payload_size == bloblen
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*/
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body_start = sizeof dfl_hdr;
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if (bloblen < body_start) {
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error_setg(errp, "ACPI table claiming to have header is too "
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"short, available: %zu, expected: %zu", bloblen,
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body_start);
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return;
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}
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hdr_src = blob;
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} else {
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/* _length | ACPI header in template | blob body
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* ^^^^^^^^^^^^^^^^^^^ ^^^^^^^^^^^^^^^^^^^^^^^ ^^^^^^^^^^
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* ACPI_TABLE_PFX_SIZE sizeof dfl_hdr body_size
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* == bloblen
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*
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* ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
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* acpi_payload_size
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*/
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body_start = 0;
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hdr_src = dfl_hdr;
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}
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body_size = bloblen - body_start;
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acpi_payload_size = sizeof dfl_hdr + body_size;
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if (acpi_payload_size > UINT16_MAX) {
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error_setg(errp, "ACPI table too big, requested: %zu, max: %u",
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acpi_payload_size, (unsigned)UINT16_MAX);
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return;
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}
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/* We won't fail from here on. Initialize / extend the globals. */
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if (acpi_tables == NULL) {
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acpi_tables_len = sizeof(uint16_t);
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acpi_tables = g_malloc0(acpi_tables_len);
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}
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acpi_tables = g_realloc(acpi_tables, acpi_tables_len +
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ACPI_TABLE_PFX_SIZE +
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sizeof dfl_hdr + body_size);
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ext_hdr = (struct acpi_table_header *)(acpi_tables + acpi_tables_len);
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acpi_tables_len += ACPI_TABLE_PFX_SIZE;
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memcpy(acpi_tables + acpi_tables_len, hdr_src, sizeof dfl_hdr);
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acpi_tables_len += sizeof dfl_hdr;
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if (blob != NULL) {
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memcpy(acpi_tables + acpi_tables_len, blob + body_start, body_size);
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acpi_tables_len += body_size;
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}
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/* increase number of tables */
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stw_le_p(acpi_tables, lduw_le_p(acpi_tables) + 1u);
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/* Update the header fields. The strings need not be NUL-terminated. */
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changed_fields = 0;
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ext_hdr->_length = cpu_to_le16(acpi_payload_size);
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if (hdrs->has_sig) {
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strncpy(ext_hdr->sig, hdrs->sig, sizeof ext_hdr->sig);
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++changed_fields;
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}
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if (has_header && le32_to_cpu(ext_hdr->length) != acpi_payload_size) {
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warn_report("ACPI table has wrong length, header says "
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"%" PRIu32 ", actual size %zu bytes",
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le32_to_cpu(ext_hdr->length), acpi_payload_size);
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}
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ext_hdr->length = cpu_to_le32(acpi_payload_size);
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if (hdrs->has_rev) {
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ext_hdr->revision = hdrs->rev;
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++changed_fields;
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}
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ext_hdr->checksum = 0;
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if (hdrs->has_oem_id) {
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strncpy(ext_hdr->oem_id, hdrs->oem_id, sizeof ext_hdr->oem_id);
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++changed_fields;
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}
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if (hdrs->has_oem_table_id) {
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strncpy(ext_hdr->oem_table_id, hdrs->oem_table_id,
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sizeof ext_hdr->oem_table_id);
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++changed_fields;
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}
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if (hdrs->has_oem_rev) {
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ext_hdr->oem_revision = cpu_to_le32(hdrs->oem_rev);
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++changed_fields;
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}
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if (hdrs->has_asl_compiler_id) {
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strncpy(ext_hdr->asl_compiler_id, hdrs->asl_compiler_id,
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sizeof ext_hdr->asl_compiler_id);
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++changed_fields;
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}
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if (hdrs->has_asl_compiler_rev) {
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ext_hdr->asl_compiler_revision = cpu_to_le32(hdrs->asl_compiler_rev);
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++changed_fields;
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}
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if (!has_header && changed_fields == 0) {
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warn_report("ACPI table: no headers are specified");
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}
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/* recalculate checksum */
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ext_hdr->checksum = acpi_checksum((const char unsigned *)ext_hdr +
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ACPI_TABLE_PFX_SIZE, acpi_payload_size);
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}
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void acpi_table_add(const QemuOpts *opts, Error **errp)
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{
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AcpiTableOptions *hdrs = NULL;
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Error *err = NULL;
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char **pathnames = NULL;
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char **cur;
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size_t bloblen = 0;
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char unsigned *blob = NULL;
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{
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Visitor *v;
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v = opts_visitor_new(opts);
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visit_type_AcpiTableOptions(v, NULL, &hdrs, &err);
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visit_free(v);
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}
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if (err) {
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goto out;
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}
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if (hdrs->has_file == hdrs->has_data) {
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error_setg(errp, "'-acpitable' requires one of 'data' or 'file'");
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goto out;
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}
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pathnames = g_strsplit(hdrs->has_file ? hdrs->file : hdrs->data, ":", 0);
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if (pathnames == NULL || pathnames[0] == NULL) {
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error_setg(errp, "'-acpitable' requires at least one pathname");
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goto out;
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}
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/* now read in the data files, reallocating buffer as needed */
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for (cur = pathnames; *cur; ++cur) {
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int fd = open(*cur, O_RDONLY | O_BINARY);
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if (fd < 0) {
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error_setg(errp, "can't open file %s: %s", *cur, strerror(errno));
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goto out;
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}
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for (;;) {
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char unsigned data[8192];
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ssize_t r;
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r = read(fd, data, sizeof data);
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if (r == 0) {
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break;
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} else if (r > 0) {
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blob = g_realloc(blob, bloblen + r);
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memcpy(blob + bloblen, data, r);
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bloblen += r;
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} else if (errno != EINTR) {
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error_setg(errp, "can't read file %s: %s", *cur,
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strerror(errno));
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close(fd);
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goto out;
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}
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}
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close(fd);
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}
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acpi_table_install(blob, bloblen, hdrs->has_file, hdrs, errp);
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out:
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g_free(blob);
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g_strfreev(pathnames);
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qapi_free_AcpiTableOptions(hdrs);
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}
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unsigned acpi_table_len(void *current)
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{
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struct acpi_table_header *hdr = current - sizeof(hdr->_length);
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return hdr->_length;
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}
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static
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void *acpi_table_hdr(void *h)
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{
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struct acpi_table_header *hdr = h;
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return &hdr->sig;
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}
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uint8_t *acpi_table_first(void)
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{
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if (!acpi_tables) {
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return NULL;
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}
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return acpi_table_hdr(acpi_tables + ACPI_TABLE_PFX_SIZE);
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}
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uint8_t *acpi_table_next(uint8_t *current)
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{
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uint8_t *next = current + acpi_table_len(current);
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if (next - acpi_tables >= acpi_tables_len) {
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return NULL;
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} else {
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return acpi_table_hdr(next);
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}
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}
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int acpi_get_slic_oem(AcpiSlicOem *oem)
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{
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uint8_t *u;
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for (u = acpi_table_first(); u; u = acpi_table_next(u)) {
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struct acpi_table_header *hdr = (void *)(u - sizeof(hdr->_length));
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if (memcmp(hdr->sig, "SLIC", 4) == 0) {
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oem->id = hdr->oem_id;
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oem->table_id = hdr->oem_table_id;
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return 0;
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}
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}
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return -1;
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}
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static void acpi_notify_wakeup(Notifier *notifier, void *data)
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{
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ACPIREGS *ar = container_of(notifier, ACPIREGS, wakeup);
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WakeupReason *reason = data;
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switch (*reason) {
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case QEMU_WAKEUP_REASON_RTC:
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ar->pm1.evt.sts |=
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(ACPI_BITMASK_WAKE_STATUS | ACPI_BITMASK_RT_CLOCK_STATUS);
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break;
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case QEMU_WAKEUP_REASON_PMTIMER:
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ar->pm1.evt.sts |=
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(ACPI_BITMASK_WAKE_STATUS | ACPI_BITMASK_TIMER_STATUS);
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break;
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case QEMU_WAKEUP_REASON_OTHER:
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/* ACPI_BITMASK_WAKE_STATUS should be set on resume.
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Pretend that resume was caused by power button */
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ar->pm1.evt.sts |=
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(ACPI_BITMASK_WAKE_STATUS | ACPI_BITMASK_POWER_BUTTON_STATUS);
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break;
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default:
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break;
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}
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}
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/* ACPI PM1a EVT */
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uint16_t acpi_pm1_evt_get_sts(ACPIREGS *ar)
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{
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/* Compare ns-clock, not PM timer ticks, because
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acpi_pm_tmr_update function uses ns for setting the timer. */
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int64_t d = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL);
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if (d >= muldiv64(ar->tmr.overflow_time,
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NANOSECONDS_PER_SECOND, PM_TIMER_FREQUENCY)) {
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ar->pm1.evt.sts |= ACPI_BITMASK_TIMER_STATUS;
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}
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return ar->pm1.evt.sts;
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}
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static void acpi_pm1_evt_write_sts(ACPIREGS *ar, uint16_t val)
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{
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uint16_t pm1_sts = acpi_pm1_evt_get_sts(ar);
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if (pm1_sts & val & ACPI_BITMASK_TIMER_STATUS) {
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/* if TMRSTS is reset, then compute the new overflow time */
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acpi_pm_tmr_calc_overflow_time(ar);
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}
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ar->pm1.evt.sts &= ~val;
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}
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static void acpi_pm1_evt_write_en(ACPIREGS *ar, uint16_t val)
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{
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ar->pm1.evt.en = val;
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qemu_system_wakeup_enable(QEMU_WAKEUP_REASON_RTC,
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val & ACPI_BITMASK_RT_CLOCK_ENABLE);
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qemu_system_wakeup_enable(QEMU_WAKEUP_REASON_PMTIMER,
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val & ACPI_BITMASK_TIMER_ENABLE);
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}
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void acpi_pm1_evt_power_down(ACPIREGS *ar)
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{
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if (ar->pm1.evt.en & ACPI_BITMASK_POWER_BUTTON_ENABLE) {
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ar->pm1.evt.sts |= ACPI_BITMASK_POWER_BUTTON_STATUS;
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ar->tmr.update_sci(ar);
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}
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}
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void acpi_pm1_evt_reset(ACPIREGS *ar)
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{
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ar->pm1.evt.sts = 0;
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ar->pm1.evt.en = 0;
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qemu_system_wakeup_enable(QEMU_WAKEUP_REASON_RTC, 0);
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qemu_system_wakeup_enable(QEMU_WAKEUP_REASON_PMTIMER, 0);
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}
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static uint64_t acpi_pm_evt_read(void *opaque, hwaddr addr, unsigned width)
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{
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ACPIREGS *ar = opaque;
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switch (addr) {
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case 0:
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return acpi_pm1_evt_get_sts(ar);
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case 2:
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return ar->pm1.evt.en;
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default:
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return 0;
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}
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}
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static void acpi_pm_evt_write(void *opaque, hwaddr addr, uint64_t val,
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unsigned width)
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{
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ACPIREGS *ar = opaque;
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switch (addr) {
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case 0:
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acpi_pm1_evt_write_sts(ar, val);
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ar->pm1.evt.update_sci(ar);
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break;
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case 2:
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acpi_pm1_evt_write_en(ar, val);
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ar->pm1.evt.update_sci(ar);
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break;
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}
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}
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static const MemoryRegionOps acpi_pm_evt_ops = {
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.read = acpi_pm_evt_read,
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.write = acpi_pm_evt_write,
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.valid.min_access_size = 2,
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.valid.max_access_size = 2,
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.endianness = DEVICE_LITTLE_ENDIAN,
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};
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void acpi_pm1_evt_init(ACPIREGS *ar, acpi_update_sci_fn update_sci,
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MemoryRegion *parent)
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{
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ar->pm1.evt.update_sci = update_sci;
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memory_region_init_io(&ar->pm1.evt.io, memory_region_owner(parent),
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&acpi_pm_evt_ops, ar, "acpi-evt", 4);
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memory_region_add_subregion(parent, 0, &ar->pm1.evt.io);
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}
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/* ACPI PM_TMR */
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void acpi_pm_tmr_update(ACPIREGS *ar, bool enable)
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{
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|
int64_t expire_time;
|
|
|
|
/* schedule a timer interruption if needed */
|
|
if (enable) {
|
|
expire_time = muldiv64(ar->tmr.overflow_time, NANOSECONDS_PER_SECOND,
|
|
PM_TIMER_FREQUENCY);
|
|
timer_mod(ar->tmr.timer, expire_time);
|
|
} else {
|
|
timer_del(ar->tmr.timer);
|
|
}
|
|
}
|
|
|
|
static inline int64_t acpi_pm_tmr_get_clock(void)
|
|
{
|
|
return muldiv64(qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL), PM_TIMER_FREQUENCY,
|
|
NANOSECONDS_PER_SECOND);
|
|
}
|
|
|
|
void acpi_pm_tmr_calc_overflow_time(ACPIREGS *ar)
|
|
{
|
|
int64_t d = acpi_pm_tmr_get_clock();
|
|
ar->tmr.overflow_time = (d + 0x800000LL) & ~0x7fffffLL;
|
|
}
|
|
|
|
static uint32_t acpi_pm_tmr_get(ACPIREGS *ar)
|
|
{
|
|
uint32_t d = acpi_pm_tmr_get_clock();
|
|
return d & 0xffffff;
|
|
}
|
|
|
|
static void acpi_pm_tmr_timer(void *opaque)
|
|
{
|
|
ACPIREGS *ar = opaque;
|
|
|
|
qemu_system_wakeup_request(QEMU_WAKEUP_REASON_PMTIMER, NULL);
|
|
ar->tmr.update_sci(ar);
|
|
}
|
|
|
|
static uint64_t acpi_pm_tmr_read(void *opaque, hwaddr addr, unsigned width)
|
|
{
|
|
return acpi_pm_tmr_get(opaque);
|
|
}
|
|
|
|
static void acpi_pm_tmr_write(void *opaque, hwaddr addr, uint64_t val,
|
|
unsigned width)
|
|
{
|
|
/* nothing */
|
|
}
|
|
|
|
static const MemoryRegionOps acpi_pm_tmr_ops = {
|
|
.read = acpi_pm_tmr_read,
|
|
.write = acpi_pm_tmr_write,
|
|
.valid.min_access_size = 4,
|
|
.valid.max_access_size = 4,
|
|
.endianness = DEVICE_LITTLE_ENDIAN,
|
|
};
|
|
|
|
void acpi_pm_tmr_init(ACPIREGS *ar, acpi_update_sci_fn update_sci,
|
|
MemoryRegion *parent)
|
|
{
|
|
ar->tmr.update_sci = update_sci;
|
|
ar->tmr.timer = timer_new_ns(QEMU_CLOCK_VIRTUAL, acpi_pm_tmr_timer, ar);
|
|
memory_region_init_io(&ar->tmr.io, memory_region_owner(parent),
|
|
&acpi_pm_tmr_ops, ar, "acpi-tmr", 4);
|
|
memory_region_add_subregion(parent, 8, &ar->tmr.io);
|
|
}
|
|
|
|
void acpi_pm_tmr_reset(ACPIREGS *ar)
|
|
{
|
|
ar->tmr.overflow_time = 0;
|
|
timer_del(ar->tmr.timer);
|
|
}
|
|
|
|
/* ACPI PM1aCNT */
|
|
static void acpi_pm1_cnt_write(ACPIREGS *ar, uint16_t val)
|
|
{
|
|
ar->pm1.cnt.cnt = val & ~(ACPI_BITMASK_SLEEP_ENABLE);
|
|
|
|
if (val & ACPI_BITMASK_SLEEP_ENABLE) {
|
|
/* change suspend type */
|
|
uint16_t sus_typ = (val >> 10) & 7;
|
|
switch(sus_typ) {
|
|
case 0: /* soft power off */
|
|
qemu_system_shutdown_request(SHUTDOWN_CAUSE_GUEST_SHUTDOWN);
|
|
break;
|
|
case 1:
|
|
qemu_system_suspend_request();
|
|
break;
|
|
default:
|
|
if (sus_typ == ar->pm1.cnt.s4_val) { /* S4 request */
|
|
qapi_event_send_suspend_disk();
|
|
qemu_system_shutdown_request(SHUTDOWN_CAUSE_GUEST_SHUTDOWN);
|
|
}
|
|
break;
|
|
}
|
|
}
|
|
}
|
|
|
|
void acpi_pm1_cnt_update(ACPIREGS *ar,
|
|
bool sci_enable, bool sci_disable)
|
|
{
|
|
/* ACPI specs 3.0, 4.7.2.5 */
|
|
if (sci_enable) {
|
|
ar->pm1.cnt.cnt |= ACPI_BITMASK_SCI_ENABLE;
|
|
} else if (sci_disable) {
|
|
ar->pm1.cnt.cnt &= ~ACPI_BITMASK_SCI_ENABLE;
|
|
}
|
|
}
|
|
|
|
static uint64_t acpi_pm_cnt_read(void *opaque, hwaddr addr, unsigned width)
|
|
{
|
|
ACPIREGS *ar = opaque;
|
|
return ar->pm1.cnt.cnt;
|
|
}
|
|
|
|
static void acpi_pm_cnt_write(void *opaque, hwaddr addr, uint64_t val,
|
|
unsigned width)
|
|
{
|
|
acpi_pm1_cnt_write(opaque, val);
|
|
}
|
|
|
|
static const MemoryRegionOps acpi_pm_cnt_ops = {
|
|
.read = acpi_pm_cnt_read,
|
|
.write = acpi_pm_cnt_write,
|
|
.valid.min_access_size = 2,
|
|
.valid.max_access_size = 2,
|
|
.endianness = DEVICE_LITTLE_ENDIAN,
|
|
};
|
|
|
|
void acpi_pm1_cnt_init(ACPIREGS *ar, MemoryRegion *parent,
|
|
bool disable_s3, bool disable_s4, uint8_t s4_val)
|
|
{
|
|
FWCfgState *fw_cfg;
|
|
|
|
ar->pm1.cnt.s4_val = s4_val;
|
|
ar->wakeup.notify = acpi_notify_wakeup;
|
|
qemu_register_wakeup_notifier(&ar->wakeup);
|
|
|
|
/*
|
|
* Register wake-up support in QMP query-current-machine API
|
|
*/
|
|
qemu_register_wakeup_support();
|
|
|
|
memory_region_init_io(&ar->pm1.cnt.io, memory_region_owner(parent),
|
|
&acpi_pm_cnt_ops, ar, "acpi-cnt", 2);
|
|
memory_region_add_subregion(parent, 4, &ar->pm1.cnt.io);
|
|
|
|
fw_cfg = fw_cfg_find();
|
|
if (fw_cfg) {
|
|
uint8_t suspend[6] = {128, 0, 0, 129, 128, 128};
|
|
suspend[3] = 1 | ((!disable_s3) << 7);
|
|
suspend[4] = s4_val | ((!disable_s4) << 7);
|
|
|
|
fw_cfg_add_file(fw_cfg, "etc/system-states", g_memdup(suspend, 6), 6);
|
|
}
|
|
}
|
|
|
|
void acpi_pm1_cnt_reset(ACPIREGS *ar)
|
|
{
|
|
ar->pm1.cnt.cnt = 0;
|
|
}
|
|
|
|
/* ACPI GPE */
|
|
void acpi_gpe_init(ACPIREGS *ar, uint8_t len)
|
|
{
|
|
ar->gpe.len = len;
|
|
/* Only first len / 2 bytes are ever used,
|
|
* but the caller in ich9.c migrates full len bytes.
|
|
* TODO: fix ich9.c and drop the extra allocation.
|
|
*/
|
|
ar->gpe.sts = g_malloc0(len);
|
|
ar->gpe.en = g_malloc0(len);
|
|
}
|
|
|
|
void acpi_gpe_reset(ACPIREGS *ar)
|
|
{
|
|
memset(ar->gpe.sts, 0, ar->gpe.len / 2);
|
|
memset(ar->gpe.en, 0, ar->gpe.len / 2);
|
|
}
|
|
|
|
static uint8_t *acpi_gpe_ioport_get_ptr(ACPIREGS *ar, uint32_t addr)
|
|
{
|
|
uint8_t *cur = NULL;
|
|
|
|
if (addr < ar->gpe.len / 2) {
|
|
cur = ar->gpe.sts + addr;
|
|
} else if (addr < ar->gpe.len) {
|
|
cur = ar->gpe.en + addr - ar->gpe.len / 2;
|
|
} else {
|
|
abort();
|
|
}
|
|
|
|
return cur;
|
|
}
|
|
|
|
void acpi_gpe_ioport_writeb(ACPIREGS *ar, uint32_t addr, uint32_t val)
|
|
{
|
|
uint8_t *cur;
|
|
|
|
cur = acpi_gpe_ioport_get_ptr(ar, addr);
|
|
if (addr < ar->gpe.len / 2) {
|
|
/* GPE_STS */
|
|
*cur = (*cur) & ~val;
|
|
} else if (addr < ar->gpe.len) {
|
|
/* GPE_EN */
|
|
*cur = val;
|
|
} else {
|
|
abort();
|
|
}
|
|
}
|
|
|
|
uint32_t acpi_gpe_ioport_readb(ACPIREGS *ar, uint32_t addr)
|
|
{
|
|
uint8_t *cur;
|
|
uint32_t val;
|
|
|
|
cur = acpi_gpe_ioport_get_ptr(ar, addr);
|
|
val = 0;
|
|
if (cur != NULL) {
|
|
val = *cur;
|
|
}
|
|
|
|
return val;
|
|
}
|
|
|
|
void acpi_send_gpe_event(ACPIREGS *ar, qemu_irq irq,
|
|
AcpiEventStatusBits status)
|
|
{
|
|
ar->gpe.sts[0] |= status;
|
|
acpi_update_sci(ar, irq);
|
|
}
|
|
|
|
void acpi_update_sci(ACPIREGS *regs, qemu_irq irq)
|
|
{
|
|
int sci_level, pm1a_sts;
|
|
|
|
pm1a_sts = acpi_pm1_evt_get_sts(regs);
|
|
|
|
sci_level = ((pm1a_sts &
|
|
regs->pm1.evt.en & ACPI_BITMASK_PM1_COMMON_ENABLED) != 0) ||
|
|
((regs->gpe.sts[0] & regs->gpe.en[0]) != 0);
|
|
|
|
qemu_set_irq(irq, sci_level);
|
|
|
|
/* schedule a timer interruption if needed */
|
|
acpi_pm_tmr_update(regs,
|
|
(regs->pm1.evt.en & ACPI_BITMASK_TIMER_ENABLE) &&
|
|
!(pm1a_sts & ACPI_BITMASK_TIMER_STATUS));
|
|
}
|