mirror of https://gitee.com/openkylin/qemu.git
e39de895f6
The number of MSI interrupts a sPAPR machine can allocate is in direct relation with the number of interrupts of the sPAPRIrq backend. Define statically this value at the sPAPRIrq class level and use it for the "ibm,pe-total-#msi" property of the sPAPR PHB. According to the PAPR specs, "ibm,pe-total-#msi" defines the maximum number of MSIs that are available to the PE. We choose to advertise the maximum number of MSIs that are available to the machine for simplicity of the model and to avoid segmenting the MSI interrupt pool which can be easily shared. If the pool limit is reached, it can be extended dynamically. Finally, remove XICS_IRQS_SPAPR which is now unused. Signed-off-by: Cédric Le Goater <clg@kaod.org> Reviewed-by: Greg Kurz <groug@kaod.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au> |
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fdt.h | ||
mac_dbdma.h | ||
openpic.h | ||
openpic_kvm.h | ||
pnv.h | ||
pnv_core.h | ||
pnv_lpc.h | ||
pnv_occ.h | ||
pnv_psi.h | ||
pnv_xscom.h | ||
ppc.h | ||
ppc4xx.h | ||
ppc_e500.h | ||
spapr.h | ||
spapr_cpu_core.h | ||
spapr_drc.h | ||
spapr_irq.h | ||
spapr_ovec.h | ||
spapr_rtas.h | ||
spapr_vio.h | ||
xics.h |