qemu/target-lm32 at e680cfa7e20f5049c475ac94f998a79c9997b48d - qemu

History

Blue Swirl 3e4571724f exec.h cleanup Move softmmu_exec.h include directives from target-/exec.h to target-/op_helper.c. Move also various other stuff only used in op_helper.c there. Define global env in dyngen-exec.h. For i386, move wrappers for segment and FPU helpers from user-exec.c to op_helper.c. Implement raise_exception_err_env() to handle dynamic CPUState. Move the function declarations to cpu.h since they can be used outside of op_helper.c context. LM32, s390x, UniCore32: remove unused cpu_halted(), regs_to_env() and env_to_regs(). ARM: make raise_exception() static. Convert #include "exec.h" to #include "cpu.h" #include "dyngen-exec.h" and remove now unused target-*/exec.h. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>		2011-07-30 09:41:14 +00:00
..
README	lm32: todo and documentation	2011-03-07 13:42:37 +01:00
TODO	lm32: todo and documentation	2011-03-07 13:42:37 +01:00
cpu.h	Move cpu_has_work and cpu_pc_from_tb to cpu.h	2011-06-26 18:25:31 +00:00
helper.c	Remove exec-all.h include directives	2011-06-26 18:25:35 +00:00
helper.h	lm32: translation code helper	2011-03-07 13:42:36 +01:00
machine.c	lm32: machine state loading/saving	2011-03-07 13:42:36 +01:00
op_helper.c	exec.h cleanup	2011-07-30 09:41:14 +00:00
translate.c	Remove exec-all.h include directives	2011-06-26 18:25:35 +00:00

README

LatticeMico32 target
--------------------

General
-------
All opcodes including the JUART CSRs are supported.


JTAG UART
---------
JTAG UART is routed to a serial console device. For the current boards it
is the second one. Ie to enable it in the qemu virtual console window use
the following command line parameters:
  -serial vc -serial vc
This will make serial0 (the lm32_uart) and serial1 (the JTAG UART)
available as virtual consoles.


Programmatically terminate the emulator
----------------------------------------
Originally neither the LatticeMico32 nor its peripherals support a
mechanism to shut down the machine. Emulation aware programs can write to a
to a special register within the system control block to shut down the
virtual machine.  For more details see hw/lm32_sys.c. The lm32-evr is the
first BSP which instantiate this model. A (32 bit) write to 0xfff0000
causes a vm shutdown.


Special instructions
--------------------
The translation recognizes one special instruction to halt the cpu:
  and r0, r0, r0
On real hardware this instruction is a nop. It is not used by GCC and
should (hopefully) not be used within hand-crafted assembly.
Insert this instruction in your idle loop to reduce the cpu load on the
host.


Ignoring the MSB of the address bus
-----------------------------------
Some SoC ignores the MSB on the address bus. Thus creating a shadow memory
area. As a general rule, 0x00000000-0x7fffffff is cached, whereas
0x80000000-0xffffffff is not cached and used to access IO devices. This
behaviour can be enabled with:
  cpu_lm32_set_phys_msb_ignore(env, 1);