mirror of https://gitee.com/openkylin/qemu.git
733 lines
22 KiB
C
733 lines
22 KiB
C
/*
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* Header file for wrappers around MSA instructions assembler invocations
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*
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* Copyright (C) 2019 Wave Computing, Inc.
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* Copyright (C) 2019 Aleksandar Markovic <amarkovic@wavecomp.com>
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*
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* This program is free software: you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation, either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <https://www.gnu.org/licenses/>.
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*
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*/
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#ifndef WRAPPERS_MSA_H
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#define WRAPPERS_MSA_H
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#define RESET_MSA_REGISTER(wi) \
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__asm__ volatile ( \
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"xor.v $" #wi ", $" #wi ", $" #wi "\n\t" \
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: \
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: \
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: \
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)
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static inline void reset_msa_registers()
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{
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RESET_MSA_REGISTER(w0);
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RESET_MSA_REGISTER(w1);
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RESET_MSA_REGISTER(w2);
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RESET_MSA_REGISTER(w3);
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RESET_MSA_REGISTER(w4);
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RESET_MSA_REGISTER(w5);
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RESET_MSA_REGISTER(w6);
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RESET_MSA_REGISTER(w7);
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RESET_MSA_REGISTER(w8);
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RESET_MSA_REGISTER(w9);
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RESET_MSA_REGISTER(w10);
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RESET_MSA_REGISTER(w11);
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RESET_MSA_REGISTER(w12);
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RESET_MSA_REGISTER(w13);
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RESET_MSA_REGISTER(w14);
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RESET_MSA_REGISTER(w15);
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RESET_MSA_REGISTER(w16);
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RESET_MSA_REGISTER(w17);
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RESET_MSA_REGISTER(w18);
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RESET_MSA_REGISTER(w19);
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RESET_MSA_REGISTER(w20);
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RESET_MSA_REGISTER(w21);
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RESET_MSA_REGISTER(w22);
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RESET_MSA_REGISTER(w23);
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RESET_MSA_REGISTER(w24);
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RESET_MSA_REGISTER(w25);
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RESET_MSA_REGISTER(w26);
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RESET_MSA_REGISTER(w27);
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RESET_MSA_REGISTER(w28);
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RESET_MSA_REGISTER(w29);
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RESET_MSA_REGISTER(w30);
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RESET_MSA_REGISTER(w31);
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}
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#define DO_MSA__WD__WS(suffix, mnemonic) \
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static inline void do_msa_##suffix(const void *input, \
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const void *output) \
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{ \
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__asm__ volatile ( \
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"move $t0, %0\n\t" \
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"ld.d $w11, 0($t0)\n\t" \
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#mnemonic " $w10, $w11\n\t" \
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"move $t0, %1\n\t" \
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"st.d $w10, 0($t0)\n\t" \
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: \
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: "r" (input), "r" (output) \
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: "t0", "memory" \
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); \
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}
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#define DO_MSA__WD__WD(suffix, mnemonic) \
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static inline void do_msa_##suffix(const void *input, \
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const void *output) \
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{ \
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__asm__ volatile ( \
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"move $t0, %0\n\t" \
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"ld.d $w11, 0($t0)\n\t" \
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#mnemonic " $w10, $w10\n\t" \
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"move $t0, %1\n\t" \
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"st.d $w10, 0($t0)\n\t" \
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: \
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: "r" (input), "r" (output) \
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: "t0", "memory" \
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); \
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}
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#define DO_MSA__WD__WS_WT(suffix, mnemonic) \
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static inline void do_msa_##suffix(const void *input1, \
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const void *input2, \
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const void *output) \
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{ \
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__asm__ volatile ( \
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"move $t0, %0\n\t" \
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"ld.d $w11, 0($t0)\n\t" \
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"move $t0, %1\n\t" \
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"ld.d $w12, 0($t0)\n\t" \
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#mnemonic " $w10, $w11, $w12\n\t" \
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"move $t0, %2\n\t" \
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"st.d $w10, 0($t0)\n\t" \
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: \
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: "r" (input1), "r" (input2), "r" (output) \
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: "t0", "memory" \
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); \
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}
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#define DO_MSA__WD__WD_WT(suffix, mnemonic) \
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static inline void do_msa_##suffix(const void *input1, \
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const void *input2, \
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const void *output) \
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{ \
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__asm__ volatile ( \
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"move $t0, %0\n\t" \
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"ld.d $w11, 0($t0)\n\t" \
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"move $t0, %1\n\t" \
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"ld.d $w12, 0($t0)\n\t" \
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#mnemonic " $w10, $w10, $w12\n\t" \
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"move $t0, %2\n\t" \
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"st.d $w10, 0($t0)\n\t" \
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: \
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: "r" (input1), "r" (input2), "r" (output) \
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: "t0", "memory" \
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); \
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}
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#define DO_MSA__WD__WS_WD(suffix, mnemonic) \
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static inline void do_msa_##suffix(const void *input1, \
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const void *input2, \
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const void *output) \
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{ \
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__asm__ volatile ( \
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"move $t0, %0\n\t" \
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"ld.d $w11, 0($t0)\n\t" \
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"move $t0, %1\n\t" \
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"ld.d $w12, 0($t0)\n\t" \
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#mnemonic " $w10, $w11, $w10\n\t" \
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"move $t0, %2\n\t" \
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"st.d $w10, 0($t0)\n\t" \
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: \
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: "r" (input1), "r" (input2), "r" (output) \
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: "t0", "memory" \
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); \
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}
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/*
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* Bit Count
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* ---------
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*/
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DO_MSA__WD__WS(NLOC_B, nloc.b)
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DO_MSA__WD__WS(NLOC_H, nloc.h)
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DO_MSA__WD__WS(NLOC_W, nloc.w)
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DO_MSA__WD__WS(NLOC_D, nloc.d)
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DO_MSA__WD__WS(NLZC_B, nlzc.b)
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DO_MSA__WD__WS(NLZC_H, nlzc.h)
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DO_MSA__WD__WS(NLZC_W, nlzc.w)
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DO_MSA__WD__WS(NLZC_D, nlzc.d)
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DO_MSA__WD__WS(PCNT_B, pcnt.b)
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DO_MSA__WD__WS(PCNT_H, pcnt.h)
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DO_MSA__WD__WS(PCNT_W, pcnt.w)
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DO_MSA__WD__WS(PCNT_D, pcnt.d)
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/*
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* Bit move
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* --------
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*/
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DO_MSA__WD__WS_WT(BINSL_B, binsl.b)
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DO_MSA__WD__WD_WT(BINSL_B__DDT, binsl.b)
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DO_MSA__WD__WS_WD(BINSL_B__DSD, binsl.b)
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DO_MSA__WD__WS_WT(BINSL_H, binsl.h)
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DO_MSA__WD__WD_WT(BINSL_H__DDT, binsl.h)
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DO_MSA__WD__WS_WD(BINSL_H__DSD, binsl.h)
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DO_MSA__WD__WS_WT(BINSL_W, binsl.w)
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DO_MSA__WD__WD_WT(BINSL_W__DDT, binsl.w)
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DO_MSA__WD__WS_WD(BINSL_W__DSD, binsl.w)
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DO_MSA__WD__WS_WT(BINSL_D, binsl.d)
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DO_MSA__WD__WD_WT(BINSL_D__DDT, binsl.d)
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DO_MSA__WD__WS_WD(BINSL_D__DSD, binsl.d)
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DO_MSA__WD__WS_WT(BINSR_B, binsr.b)
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DO_MSA__WD__WD_WT(BINSR_B__DDT, binsr.b)
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DO_MSA__WD__WS_WD(BINSR_B__DSD, binsr.b)
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DO_MSA__WD__WS_WT(BINSR_H, binsr.h)
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DO_MSA__WD__WD_WT(BINSR_H__DDT, binsr.h)
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DO_MSA__WD__WS_WD(BINSR_H__DSD, binsr.h)
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DO_MSA__WD__WS_WT(BINSR_W, binsr.w)
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DO_MSA__WD__WD_WT(BINSR_W__DDT, binsr.w)
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DO_MSA__WD__WS_WD(BINSR_W__DSD, binsr.w)
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DO_MSA__WD__WS_WT(BINSR_D, binsr.d)
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DO_MSA__WD__WD_WT(BINSR_D__DDT, binsr.d)
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DO_MSA__WD__WS_WD(BINSR_D__DSD, binsr.d)
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DO_MSA__WD__WS_WT(BMNZ_V, bmnz.v)
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DO_MSA__WD__WD_WT(BMNZ_V__DDT, bmnz.v)
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DO_MSA__WD__WS_WD(BMNZ_V__DSD, bmnz.v)
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DO_MSA__WD__WS_WT(BMZ_V, bmz.v)
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DO_MSA__WD__WD_WT(BMZ_V__DDT, bmz.v)
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DO_MSA__WD__WS_WD(BMZ_V__DSD, bmz.v)
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DO_MSA__WD__WS_WT(BSEL_V, bsel.v)
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DO_MSA__WD__WD_WT(BSEL_V__DDT, bsel.v)
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DO_MSA__WD__WS_WD(BSEL_V__DSD, bsel.v)
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/*
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* Bit Set
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* -------
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*/
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DO_MSA__WD__WS_WT(BCLR_B, bclr.b)
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DO_MSA__WD__WS_WT(BCLR_H, bclr.h)
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DO_MSA__WD__WS_WT(BCLR_W, bclr.w)
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DO_MSA__WD__WS_WT(BCLR_D, bclr.d)
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DO_MSA__WD__WS_WT(BSET_B, bset.b)
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DO_MSA__WD__WS_WT(BSET_H, bset.h)
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DO_MSA__WD__WS_WT(BSET_W, bset.w)
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DO_MSA__WD__WS_WT(BSET_D, bset.d)
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DO_MSA__WD__WS_WT(BNEG_B, bneg.b)
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DO_MSA__WD__WS_WT(BNEG_H, bneg.h)
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DO_MSA__WD__WS_WT(BNEG_W, bneg.w)
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DO_MSA__WD__WS_WT(BNEG_D, bneg.d)
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/*
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* Fixed Multiply
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* --------------
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*/
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DO_MSA__WD__WS_WT(MADD_Q_H, madd_q.h)
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DO_MSA__WD__WD_WT(MADD_Q_H__DDT, madd_q.h)
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DO_MSA__WD__WS_WD(MADD_Q_H__DSD, madd_q.h)
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DO_MSA__WD__WS_WT(MADD_Q_W, madd_q.w)
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DO_MSA__WD__WD_WT(MADD_Q_W__DDT, madd_q.w)
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DO_MSA__WD__WS_WD(MADD_Q_W__DSD, madd_q.w)
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DO_MSA__WD__WS_WT(MADDR_Q_H, maddr_q.h)
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DO_MSA__WD__WD_WT(MADDR_Q_H__DDT, maddr_q.h)
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DO_MSA__WD__WS_WD(MADDR_Q_H__DSD, maddr_q.h)
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DO_MSA__WD__WS_WT(MADDR_Q_W, maddr_q.w)
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DO_MSA__WD__WD_WT(MADDR_Q_W__DDT, maddr_q.w)
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DO_MSA__WD__WS_WD(MADDR_Q_W__DSD, maddr_q.w)
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DO_MSA__WD__WS_WT(MSUB_Q_H, msub_q.h)
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DO_MSA__WD__WD_WT(MSUB_Q_H__DDT, msub_q.h)
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DO_MSA__WD__WS_WD(MSUB_Q_H__DSD, msub_q.h)
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DO_MSA__WD__WS_WT(MSUB_Q_W, msub_q.w)
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DO_MSA__WD__WD_WT(MSUB_Q_W__DDT, msub_q.w)
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DO_MSA__WD__WS_WD(MSUB_Q_W__DSD, msub_q.w)
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DO_MSA__WD__WS_WT(MSUBR_Q_H, msubr_q.h)
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DO_MSA__WD__WD_WT(MSUBR_Q_H__DDT, msubr_q.h)
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DO_MSA__WD__WS_WD(MSUBR_Q_H__DSD, msubr_q.h)
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DO_MSA__WD__WS_WT(MSUBR_Q_W, msubr_q.w)
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DO_MSA__WD__WD_WT(MSUBR_Q_W__DDT, msubr_q.w)
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DO_MSA__WD__WS_WD(MSUBR_Q_W__DSD, msubr_q.w)
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DO_MSA__WD__WS_WT(MUL_Q_H, mul_q.h)
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DO_MSA__WD__WS_WT(MUL_Q_W, mul_q.w)
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DO_MSA__WD__WS_WT(MULR_Q_H, mulr_q.h)
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DO_MSA__WD__WS_WT(MULR_Q_W, mulr_q.w)
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/*
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* Float Max Min
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* -------------
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*/
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DO_MSA__WD__WS_WT(FMAX_W, fmax.w)
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DO_MSA__WD__WS_WT(FMAX_D, fmax.d)
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DO_MSA__WD__WS_WT(FMAX_A_W, fmax_a.w)
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DO_MSA__WD__WS_WT(FMAX_A_D, fmax_a.d)
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DO_MSA__WD__WS_WT(FMIN_W, fmin.w)
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DO_MSA__WD__WS_WT(FMIN_D, fmin.d)
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DO_MSA__WD__WS_WT(FMIN_A_W, fmin_a.w)
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DO_MSA__WD__WS_WT(FMIN_A_D, fmin_a.d)
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/*
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* Int Add
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* -------
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*/
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DO_MSA__WD__WS_WT(ADD_A_B, add_a.b)
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DO_MSA__WD__WS_WT(ADD_A_H, add_a.h)
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DO_MSA__WD__WS_WT(ADD_A_W, add_a.w)
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DO_MSA__WD__WS_WT(ADD_A_D, add_a.d)
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DO_MSA__WD__WS_WT(ADDS_A_B, adds_a.b)
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DO_MSA__WD__WS_WT(ADDS_A_H, adds_a.h)
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DO_MSA__WD__WS_WT(ADDS_A_W, adds_a.w)
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DO_MSA__WD__WS_WT(ADDS_A_D, adds_a.d)
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DO_MSA__WD__WS_WT(ADDS_S_B, adds_s.b)
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DO_MSA__WD__WS_WT(ADDS_S_H, adds_s.h)
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DO_MSA__WD__WS_WT(ADDS_S_W, adds_s.w)
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DO_MSA__WD__WS_WT(ADDS_S_D, adds_s.d)
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DO_MSA__WD__WS_WT(ADDS_U_B, adds_u.b)
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DO_MSA__WD__WS_WT(ADDS_U_H, adds_u.h)
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DO_MSA__WD__WS_WT(ADDS_U_W, adds_u.w)
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DO_MSA__WD__WS_WT(ADDS_U_D, adds_u.d)
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DO_MSA__WD__WS_WT(ADDV_B, addv.b)
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DO_MSA__WD__WS_WT(ADDV_H, addv.h)
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DO_MSA__WD__WS_WT(ADDV_W, addv.w)
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DO_MSA__WD__WS_WT(ADDV_D, addv.d)
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DO_MSA__WD__WS_WT(HADD_S_H, hadd_s.h)
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DO_MSA__WD__WS_WT(HADD_S_W, hadd_s.w)
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DO_MSA__WD__WS_WT(HADD_S_D, hadd_s.d)
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DO_MSA__WD__WS_WT(HADD_U_H, hadd_u.h)
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DO_MSA__WD__WS_WT(HADD_U_W, hadd_u.w)
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DO_MSA__WD__WS_WT(HADD_U_D, hadd_u.d)
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/*
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* Int Average
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* -----------
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*/
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DO_MSA__WD__WS_WT(AVE_S_B, ave_s.b)
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DO_MSA__WD__WS_WT(AVE_S_H, ave_s.h)
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DO_MSA__WD__WS_WT(AVE_S_W, ave_s.w)
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DO_MSA__WD__WS_WT(AVE_S_D, ave_s.d)
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DO_MSA__WD__WS_WT(AVE_U_B, ave_u.b)
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DO_MSA__WD__WS_WT(AVE_U_H, ave_u.h)
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DO_MSA__WD__WS_WT(AVE_U_W, ave_u.w)
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DO_MSA__WD__WS_WT(AVE_U_D, ave_u.d)
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DO_MSA__WD__WS_WT(AVER_S_B, aver_s.b)
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DO_MSA__WD__WS_WT(AVER_S_H, aver_s.h)
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DO_MSA__WD__WS_WT(AVER_S_W, aver_s.w)
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DO_MSA__WD__WS_WT(AVER_S_D, aver_s.d)
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DO_MSA__WD__WS_WT(AVER_U_B, aver_u.b)
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DO_MSA__WD__WS_WT(AVER_U_H, aver_u.h)
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DO_MSA__WD__WS_WT(AVER_U_W, aver_u.w)
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DO_MSA__WD__WS_WT(AVER_U_D, aver_u.d)
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/*
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* Int Compare
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* -----------
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*/
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DO_MSA__WD__WS_WT(CEQ_B, ceq.b)
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DO_MSA__WD__WS_WT(CEQ_H, ceq.h)
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DO_MSA__WD__WS_WT(CEQ_W, ceq.w)
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DO_MSA__WD__WS_WT(CEQ_D, ceq.d)
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DO_MSA__WD__WS_WT(CLE_S_B, cle_s.b)
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DO_MSA__WD__WS_WT(CLE_S_H, cle_s.h)
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DO_MSA__WD__WS_WT(CLE_S_W, cle_s.w)
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DO_MSA__WD__WS_WT(CLE_S_D, cle_s.d)
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DO_MSA__WD__WS_WT(CLE_U_B, cle_u.b)
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DO_MSA__WD__WS_WT(CLE_U_H, cle_u.h)
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DO_MSA__WD__WS_WT(CLE_U_W, cle_u.w)
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DO_MSA__WD__WS_WT(CLE_U_D, cle_u.d)
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DO_MSA__WD__WS_WT(CLT_S_B, clt_s.b)
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|
DO_MSA__WD__WS_WT(CLT_S_H, clt_s.h)
|
|
DO_MSA__WD__WS_WT(CLT_S_W, clt_s.w)
|
|
DO_MSA__WD__WS_WT(CLT_S_D, clt_s.d)
|
|
|
|
DO_MSA__WD__WS_WT(CLT_U_B, clt_u.b)
|
|
DO_MSA__WD__WS_WT(CLT_U_H, clt_u.h)
|
|
DO_MSA__WD__WS_WT(CLT_U_W, clt_u.w)
|
|
DO_MSA__WD__WS_WT(CLT_U_D, clt_u.d)
|
|
|
|
|
|
/*
|
|
* Int Divide
|
|
* ----------
|
|
*/
|
|
|
|
DO_MSA__WD__WS_WT(DIV_S_B, div_s.b)
|
|
DO_MSA__WD__WS_WT(DIV_S_H, div_s.h)
|
|
DO_MSA__WD__WS_WT(DIV_S_W, div_s.w)
|
|
DO_MSA__WD__WS_WT(DIV_S_D, div_s.d)
|
|
|
|
DO_MSA__WD__WS_WT(DIV_U_B, div_u.b)
|
|
DO_MSA__WD__WS_WT(DIV_U_H, div_u.h)
|
|
DO_MSA__WD__WS_WT(DIV_U_W, div_u.w)
|
|
DO_MSA__WD__WS_WT(DIV_U_D, div_u.d)
|
|
|
|
|
|
/*
|
|
* Int Dot Product
|
|
* ---------------
|
|
*/
|
|
|
|
DO_MSA__WD__WS_WT(DOTP_S_H, dotp_s.h)
|
|
DO_MSA__WD__WS_WT(DOTP_S_W, dotp_s.w)
|
|
DO_MSA__WD__WS_WT(DOTP_S_D, dotp_s.d)
|
|
|
|
DO_MSA__WD__WS_WT(DOTP_U_H, dotp_u.h)
|
|
DO_MSA__WD__WS_WT(DOTP_U_W, dotp_u.w)
|
|
DO_MSA__WD__WS_WT(DOTP_U_D, dotp_u.d)
|
|
|
|
DO_MSA__WD__WS_WT(DPADD_S_H, dpadd_s.h)
|
|
DO_MSA__WD__WD_WT(DPADD_S_H__DDT, dpadd_s.h)
|
|
DO_MSA__WD__WS_WD(DPADD_S_H__DSD, dpadd_s.h)
|
|
DO_MSA__WD__WS_WT(DPADD_S_W, dpadd_s.w)
|
|
DO_MSA__WD__WD_WT(DPADD_S_W__DDT, dpadd_s.w)
|
|
DO_MSA__WD__WS_WD(DPADD_S_W__DSD, dpadd_s.w)
|
|
DO_MSA__WD__WS_WT(DPADD_S_D, dpadd_s.d)
|
|
DO_MSA__WD__WD_WT(DPADD_S_D__DDT, dpadd_s.d)
|
|
DO_MSA__WD__WS_WD(DPADD_S_D__DSD, dpadd_s.d)
|
|
|
|
DO_MSA__WD__WS_WT(DPADD_U_H, dpadd_u.h)
|
|
DO_MSA__WD__WD_WT(DPADD_U_H__DDT, dpadd_u.h)
|
|
DO_MSA__WD__WS_WD(DPADD_U_H__DSD, dpadd_u.h)
|
|
DO_MSA__WD__WS_WT(DPADD_U_W, dpadd_u.w)
|
|
DO_MSA__WD__WD_WT(DPADD_U_W__DDT, dpadd_u.w)
|
|
DO_MSA__WD__WS_WD(DPADD_U_W__DSD, dpadd_u.w)
|
|
DO_MSA__WD__WS_WT(DPADD_U_D, dpadd_u.d)
|
|
DO_MSA__WD__WD_WT(DPADD_U_D__DDT, dpadd_u.d)
|
|
DO_MSA__WD__WS_WD(DPADD_U_D__DSD, dpadd_u.d)
|
|
|
|
DO_MSA__WD__WS_WT(DPSUB_S_H, dpsub_s.h)
|
|
DO_MSA__WD__WD_WT(DPSUB_S_H__DDT, dpsub_s.h)
|
|
DO_MSA__WD__WS_WD(DPSUB_S_H__DSD, dpsub_s.h)
|
|
DO_MSA__WD__WS_WT(DPSUB_S_W, dpsub_s.w)
|
|
DO_MSA__WD__WD_WT(DPSUB_S_W__DDT, dpsub_s.w)
|
|
DO_MSA__WD__WS_WD(DPSUB_S_W__DSD, dpsub_s.w)
|
|
DO_MSA__WD__WS_WT(DPSUB_S_D, dpsub_s.d)
|
|
DO_MSA__WD__WD_WT(DPSUB_S_D__DDT, dpsub_s.d)
|
|
DO_MSA__WD__WS_WD(DPSUB_S_D__DSD, dpsub_s.d)
|
|
|
|
DO_MSA__WD__WS_WT(DPSUB_U_H, dpsub_u.h)
|
|
DO_MSA__WD__WD_WT(DPSUB_U_H__DDT, dpsub_u.h)
|
|
DO_MSA__WD__WS_WD(DPSUB_U_H__DSD, dpsub_u.h)
|
|
DO_MSA__WD__WS_WT(DPSUB_U_W, dpsub_u.w)
|
|
DO_MSA__WD__WD_WT(DPSUB_U_W__DDT, dpsub_u.w)
|
|
DO_MSA__WD__WS_WD(DPSUB_U_W__DSD, dpsub_u.w)
|
|
DO_MSA__WD__WS_WT(DPSUB_U_D, dpsub_u.d)
|
|
DO_MSA__WD__WD_WT(DPSUB_U_D__DDT, dpsub_u.d)
|
|
DO_MSA__WD__WS_WD(DPSUB_U_D__DSD, dpsub_u.d)
|
|
|
|
|
|
/*
|
|
* Int Max Min
|
|
* -----------
|
|
*/
|
|
|
|
DO_MSA__WD__WS_WT(MAX_A_B, max_a.b)
|
|
DO_MSA__WD__WS_WT(MAX_A_H, max_a.h)
|
|
DO_MSA__WD__WS_WT(MAX_A_W, max_a.w)
|
|
DO_MSA__WD__WS_WT(MAX_A_D, max_a.d)
|
|
|
|
DO_MSA__WD__WS_WT(MAX_S_B, max_s.b)
|
|
DO_MSA__WD__WS_WT(MAX_S_H, max_s.h)
|
|
DO_MSA__WD__WS_WT(MAX_S_W, max_s.w)
|
|
DO_MSA__WD__WS_WT(MAX_S_D, max_s.d)
|
|
|
|
DO_MSA__WD__WS_WT(MAX_U_B, max_u.b)
|
|
DO_MSA__WD__WS_WT(MAX_U_H, max_u.h)
|
|
DO_MSA__WD__WS_WT(MAX_U_W, max_u.w)
|
|
DO_MSA__WD__WS_WT(MAX_U_D, max_u.d)
|
|
|
|
DO_MSA__WD__WS_WT(MIN_A_B, min_a.b)
|
|
DO_MSA__WD__WS_WT(MIN_A_H, min_a.h)
|
|
DO_MSA__WD__WS_WT(MIN_A_W, min_a.w)
|
|
DO_MSA__WD__WS_WT(MIN_A_D, min_a.d)
|
|
|
|
DO_MSA__WD__WS_WT(MIN_S_B, min_s.b)
|
|
DO_MSA__WD__WS_WT(MIN_S_H, min_s.h)
|
|
DO_MSA__WD__WS_WT(MIN_S_W, min_s.w)
|
|
DO_MSA__WD__WS_WT(MIN_S_D, min_s.d)
|
|
|
|
DO_MSA__WD__WS_WT(MIN_U_B, min_u.b)
|
|
DO_MSA__WD__WS_WT(MIN_U_H, min_u.h)
|
|
DO_MSA__WD__WS_WT(MIN_U_W, min_u.w)
|
|
DO_MSA__WD__WS_WT(MIN_U_D, min_u.d)
|
|
|
|
|
|
/*
|
|
* Int Modulo
|
|
* ----------
|
|
*/
|
|
|
|
DO_MSA__WD__WS_WT(MOD_S_B, mod_s.b)
|
|
DO_MSA__WD__WS_WT(MOD_S_H, mod_s.h)
|
|
DO_MSA__WD__WS_WT(MOD_S_W, mod_s.w)
|
|
DO_MSA__WD__WS_WT(MOD_S_D, mod_s.d)
|
|
|
|
DO_MSA__WD__WS_WT(MOD_U_B, mod_u.b)
|
|
DO_MSA__WD__WS_WT(MOD_U_H, mod_u.h)
|
|
DO_MSA__WD__WS_WT(MOD_U_W, mod_u.w)
|
|
DO_MSA__WD__WS_WT(MOD_U_D, mod_u.d)
|
|
|
|
|
|
/*
|
|
* Int Multiply
|
|
* ------------
|
|
*/
|
|
|
|
DO_MSA__WD__WS_WT(MADDV_B, maddv.b)
|
|
DO_MSA__WD__WD_WT(MADDV_B__DDT, maddv.b)
|
|
DO_MSA__WD__WS_WD(MADDV_B__DSD, maddv.b)
|
|
DO_MSA__WD__WS_WT(MADDV_H, maddv.h)
|
|
DO_MSA__WD__WD_WT(MADDV_H__DDT, maddv.h)
|
|
DO_MSA__WD__WS_WD(MADDV_H__DSD, maddv.h)
|
|
DO_MSA__WD__WS_WT(MADDV_W, maddv.w)
|
|
DO_MSA__WD__WD_WT(MADDV_W__DDT, maddv.w)
|
|
DO_MSA__WD__WS_WD(MADDV_W__DSD, maddv.w)
|
|
DO_MSA__WD__WS_WT(MADDV_D, maddv.d)
|
|
DO_MSA__WD__WD_WT(MADDV_D__DDT, maddv.d)
|
|
DO_MSA__WD__WS_WD(MADDV_D__DSD, maddv.d)
|
|
|
|
DO_MSA__WD__WS_WT(MSUBV_B, msubv.b)
|
|
DO_MSA__WD__WD_WT(MSUBV_B__DDT, msubv.b)
|
|
DO_MSA__WD__WS_WD(MSUBV_B__DSD, msubv.b)
|
|
DO_MSA__WD__WS_WT(MSUBV_H, msubv.h)
|
|
DO_MSA__WD__WD_WT(MSUBV_H__DDT, msubv.h)
|
|
DO_MSA__WD__WS_WD(MSUBV_H__DSD, msubv.h)
|
|
DO_MSA__WD__WS_WT(MSUBV_W, msubv.w)
|
|
DO_MSA__WD__WD_WT(MSUBV_W__DDT, msubv.w)
|
|
DO_MSA__WD__WS_WD(MSUBV_W__DSD, msubv.w)
|
|
DO_MSA__WD__WS_WT(MSUBV_D, msubv.d)
|
|
DO_MSA__WD__WD_WT(MSUBV_D__DDT, msubv.d)
|
|
DO_MSA__WD__WS_WD(MSUBV_D__DSD, msubv.d)
|
|
|
|
DO_MSA__WD__WS_WT(MULV_B, mulv.b)
|
|
DO_MSA__WD__WS_WT(MULV_H, mulv.h)
|
|
DO_MSA__WD__WS_WT(MULV_W, mulv.w)
|
|
DO_MSA__WD__WS_WT(MULV_D, mulv.d)
|
|
|
|
|
|
/*
|
|
* Int Subtract
|
|
* ------------
|
|
*/
|
|
|
|
DO_MSA__WD__WS_WT(ASUB_S_B, asub_s.b)
|
|
DO_MSA__WD__WS_WT(ASUB_S_H, asub_s.h)
|
|
DO_MSA__WD__WS_WT(ASUB_S_W, asub_s.w)
|
|
DO_MSA__WD__WS_WT(ASUB_S_D, asub_s.d)
|
|
|
|
DO_MSA__WD__WS_WT(ASUB_U_B, asub_u.b)
|
|
DO_MSA__WD__WS_WT(ASUB_U_H, asub_u.h)
|
|
DO_MSA__WD__WS_WT(ASUB_U_W, asub_u.w)
|
|
DO_MSA__WD__WS_WT(ASUB_U_D, asub_u.d)
|
|
|
|
DO_MSA__WD__WS_WT(HSUB_S_H, hsub_s.h)
|
|
DO_MSA__WD__WS_WT(HSUB_S_W, hsub_s.w)
|
|
DO_MSA__WD__WS_WT(HSUB_S_D, hsub_s.d)
|
|
|
|
DO_MSA__WD__WS_WT(HSUB_U_H, hsub_u.h)
|
|
DO_MSA__WD__WS_WT(HSUB_U_W, hsub_u.w)
|
|
DO_MSA__WD__WS_WT(HSUB_U_D, hsub_u.d)
|
|
|
|
DO_MSA__WD__WS_WT(SUBS_S_B, subs_s.b)
|
|
DO_MSA__WD__WS_WT(SUBS_S_H, subs_s.h)
|
|
DO_MSA__WD__WS_WT(SUBS_S_W, subs_s.w)
|
|
DO_MSA__WD__WS_WT(SUBS_S_D, subs_s.d)
|
|
|
|
DO_MSA__WD__WS_WT(SUBS_U_B, subs_u.b)
|
|
DO_MSA__WD__WS_WT(SUBS_U_H, subs_u.h)
|
|
DO_MSA__WD__WS_WT(SUBS_U_W, subs_u.w)
|
|
DO_MSA__WD__WS_WT(SUBS_U_D, subs_u.d)
|
|
|
|
DO_MSA__WD__WS_WT(SUBSUS_U_B, subsus_u.b)
|
|
DO_MSA__WD__WS_WT(SUBSUS_U_H, subsus_u.h)
|
|
DO_MSA__WD__WS_WT(SUBSUS_U_W, subsus_u.w)
|
|
DO_MSA__WD__WS_WT(SUBSUS_U_D, subsus_u.d)
|
|
|
|
DO_MSA__WD__WS_WT(SUBSUU_S_B, subsuu_s.b)
|
|
DO_MSA__WD__WS_WT(SUBSUU_S_H, subsuu_s.h)
|
|
DO_MSA__WD__WS_WT(SUBSUU_S_W, subsuu_s.w)
|
|
DO_MSA__WD__WS_WT(SUBSUU_S_D, subsuu_s.d)
|
|
|
|
DO_MSA__WD__WS_WT(SUBV_B, subv.b)
|
|
DO_MSA__WD__WS_WT(SUBV_H, subv.h)
|
|
DO_MSA__WD__WS_WT(SUBV_W, subv.w)
|
|
DO_MSA__WD__WS_WT(SUBV_D, subv.d)
|
|
|
|
|
|
/*
|
|
* Interleave
|
|
* ----------
|
|
*/
|
|
|
|
DO_MSA__WD__WS_WT(ILVEV_B, ilvev.b)
|
|
DO_MSA__WD__WS_WT(ILVEV_H, ilvev.h)
|
|
DO_MSA__WD__WS_WT(ILVEV_W, ilvev.w)
|
|
DO_MSA__WD__WS_WT(ILVEV_D, ilvev.d)
|
|
|
|
DO_MSA__WD__WS_WT(ILVOD_B, ilvod.b)
|
|
DO_MSA__WD__WS_WT(ILVOD_H, ilvod.h)
|
|
DO_MSA__WD__WS_WT(ILVOD_W, ilvod.w)
|
|
DO_MSA__WD__WS_WT(ILVOD_D, ilvod.d)
|
|
|
|
DO_MSA__WD__WS_WT(ILVL_B, ilvl.b)
|
|
DO_MSA__WD__WS_WT(ILVL_H, ilvl.h)
|
|
DO_MSA__WD__WS_WT(ILVL_W, ilvl.w)
|
|
DO_MSA__WD__WS_WT(ILVL_D, ilvl.d)
|
|
|
|
DO_MSA__WD__WS_WT(ILVR_B, ilvr.b)
|
|
DO_MSA__WD__WS_WT(ILVR_H, ilvr.h)
|
|
DO_MSA__WD__WS_WT(ILVR_W, ilvr.w)
|
|
DO_MSA__WD__WS_WT(ILVR_D, ilvr.d)
|
|
|
|
|
|
/*
|
|
* Logic
|
|
* -----
|
|
*/
|
|
|
|
DO_MSA__WD__WS_WT(AND_V, and.v)
|
|
DO_MSA__WD__WS_WT(NOR_V, nor.v)
|
|
DO_MSA__WD__WS_WT(OR_V, or.v)
|
|
DO_MSA__WD__WS_WT(XOR_V, xor.v)
|
|
|
|
|
|
/*
|
|
* Move
|
|
* ----
|
|
*/
|
|
|
|
DO_MSA__WD__WS(MOVE_V, move.v)
|
|
|
|
|
|
/*
|
|
* Pack
|
|
* ----
|
|
*/
|
|
|
|
DO_MSA__WD__WS_WT(PCKEV_B, pckev.b)
|
|
DO_MSA__WD__WD_WT(PCKEV_B__DDT, pckev.b)
|
|
DO_MSA__WD__WS_WD(PCKEV_B__DSD, pckev.b)
|
|
DO_MSA__WD__WS_WT(PCKEV_H, pckev.h)
|
|
DO_MSA__WD__WD_WT(PCKEV_H__DDT, pckev.h)
|
|
DO_MSA__WD__WS_WD(PCKEV_H__DSD, pckev.h)
|
|
DO_MSA__WD__WS_WT(PCKEV_W, pckev.w)
|
|
DO_MSA__WD__WD_WT(PCKEV_W__DDT, pckev.w)
|
|
DO_MSA__WD__WS_WD(PCKEV_W__DSD, pckev.w)
|
|
DO_MSA__WD__WS_WT(PCKEV_D, pckev.d)
|
|
DO_MSA__WD__WD_WT(PCKEV_D__DDT, pckev.d)
|
|
DO_MSA__WD__WS_WD(PCKEV_D__DSD, pckev.d)
|
|
|
|
DO_MSA__WD__WS_WT(PCKOD_B, pckod.b)
|
|
DO_MSA__WD__WD_WT(PCKOD_B__DDT, pckod.b)
|
|
DO_MSA__WD__WS_WD(PCKOD_B__DSD, pckod.b)
|
|
DO_MSA__WD__WS_WT(PCKOD_H, pckod.h)
|
|
DO_MSA__WD__WD_WT(PCKOD_H__DDT, pckod.h)
|
|
DO_MSA__WD__WS_WD(PCKOD_H__DSD, pckod.h)
|
|
DO_MSA__WD__WS_WT(PCKOD_W, pckod.w)
|
|
DO_MSA__WD__WD_WT(PCKOD_W__DDT, pckod.w)
|
|
DO_MSA__WD__WS_WD(PCKOD_W__DSD, pckod.w)
|
|
DO_MSA__WD__WS_WT(PCKOD_D, pckod.d)
|
|
DO_MSA__WD__WD_WT(PCKOD_D__DDT, pckod.d)
|
|
DO_MSA__WD__WS_WD(PCKOD_D__DSD, pckod.d)
|
|
|
|
DO_MSA__WD__WS_WT(VSHF_B, vshf.b)
|
|
DO_MSA__WD__WD_WT(VSHF_B__DDT, vshf.b)
|
|
DO_MSA__WD__WS_WD(VSHF_B__DSD, vshf.b)
|
|
DO_MSA__WD__WS_WT(VSHF_H, vshf.h)
|
|
DO_MSA__WD__WD_WT(VSHF_H__DDT, vshf.h)
|
|
DO_MSA__WD__WS_WD(VSHF_H__DSD, vshf.h)
|
|
DO_MSA__WD__WS_WT(VSHF_W, vshf.w)
|
|
DO_MSA__WD__WD_WT(VSHF_W__DDT, vshf.w)
|
|
DO_MSA__WD__WS_WD(VSHF_W__DSD, vshf.w)
|
|
DO_MSA__WD__WS_WT(VSHF_D, vshf.d)
|
|
DO_MSA__WD__WD_WT(VSHF_D__DDT, vshf.d)
|
|
DO_MSA__WD__WS_WD(VSHF_D__DSD, vshf.d)
|
|
|
|
|
|
/*
|
|
* Shift
|
|
* -----
|
|
*/
|
|
|
|
DO_MSA__WD__WS_WT(SLL_B, sll.b)
|
|
DO_MSA__WD__WS_WT(SLL_H, sll.h)
|
|
DO_MSA__WD__WS_WT(SLL_W, sll.w)
|
|
DO_MSA__WD__WS_WT(SLL_D, sll.d)
|
|
|
|
DO_MSA__WD__WS_WT(SRA_B, sra.b)
|
|
DO_MSA__WD__WS_WT(SRA_H, sra.h)
|
|
DO_MSA__WD__WS_WT(SRA_W, sra.w)
|
|
DO_MSA__WD__WS_WT(SRA_D, sra.d)
|
|
|
|
DO_MSA__WD__WS_WT(SRAR_B, srar.b)
|
|
DO_MSA__WD__WS_WT(SRAR_H, srar.h)
|
|
DO_MSA__WD__WS_WT(SRAR_W, srar.w)
|
|
DO_MSA__WD__WS_WT(SRAR_D, srar.d)
|
|
|
|
DO_MSA__WD__WS_WT(SRL_B, srl.b)
|
|
DO_MSA__WD__WS_WT(SRL_H, srl.h)
|
|
DO_MSA__WD__WS_WT(SRL_W, srl.w)
|
|
DO_MSA__WD__WS_WT(SRL_D, srl.d)
|
|
|
|
DO_MSA__WD__WS_WT(SRLR_B, srlr.b)
|
|
DO_MSA__WD__WS_WT(SRLR_H, srlr.h)
|
|
DO_MSA__WD__WS_WT(SRLR_W, srlr.w)
|
|
DO_MSA__WD__WS_WT(SRLR_D, srlr.d)
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#endif
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