forked from jiuyuan/InfiniTensor
针对bert和gpt2模型分布式推理的优化 (#221)
* fix(dist): 改善分布式脚本，只打印绝对误差 * feat(dist): 增加可导出onnx的pytorch运行脚本 * feat(front): 增加对Y值为-inf的where算子的图优化 * feat(kernel): 对b为常数的pow和div算子进行特判优化 * fix(front): 消除前端对global output形状信息的依赖，分布式脚本删除不必要的shape infer * feat(kernel): 针对matmul中bias为行向量时的expand操作的特化优化 * fix(kernel): 删除div pow const中不必要的同步 * Update expand.cu * fix: fix comments --------- Co-authored-by: Haojie Wang <haojie0429@gmail.com> Co-authored-by: Derui Yang <ydrml@hotmail.com>
This commit is contained in:
PanZezhong1725
GitHub
parent
a98573990b
commit
7f6aec6c17
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@ -0,0 +1,17 @@
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# 分布式脚本
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#### 1. 运行pytorch模型并生成输入和标准输出，可选择导出onnx
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使用 `--export_onnx` 设置导出onnx的目录，默认为当前路径 `./`，不使用这个flag则只进行计算和生成输入输出。
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```bash
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python run_pytorch.py --model gpt2 --batch_size 1 --length 1 --export_onnx ./
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```
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会在当前目录下生成输入输出文件`test_inputs.npy` 和 `test_results.npy`，目前只支持单一输入输出。
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#### 2. 运行InfiniTensor分布式脚本
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```bash
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python cuda_launch.py --model "/XXX/XXX.onnx" --nproc_per_node 4
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```
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@ -47,7 +47,7 @@ def parse_args():
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def run_model(model, runtime, inputs, n=10):
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stub = OnnxStub(model, runtime)
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for tensor, input in zip(stub.inputs.values(), inputs):
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for tensor, input in zip(stub.inputs.values(), inputs, strict=False):
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tensor.copyin_numpy(input)
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# stub.tune()
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stub.run()
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@ -55,7 +55,7 @@ def run_model(model, runtime, inputs, n=10):
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outputs = next(stub.outputs.values().__iter__()).copyout_numpy()
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# bench
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for tensor, input in zip(stub.inputs.values(), inputs):
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for tensor, input in zip(stub.inputs.values(), inputs, strict=False):
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tensor.copyin_numpy(input)
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begin = time.time()
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for _ in range(n):
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@ -72,7 +72,7 @@ def run_and_compare(name, model, runtime):
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results = np.load(f"{name}_results.npy")
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outputs = run_model(model, runtime, (input_ids, position_ids))
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print("outputs abs mean:", abs(outputs).mean())
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np.testing.assert_allclose(outputs, results, rtol=1e-6, atol=1e-3)
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print("max abs diff:", abs(outputs - results).max())
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def start_worker(
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@ -89,7 +89,7 @@ def start_worker(
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save_as_external_data=True,
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location=extern_path,
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)
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infer_shapes_path(f"./{dist_name}_rank{rank}.onnx")
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#infer_shapes_path(f"./{dist_name}_rank{rank}.onnx")
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runtime = backend.CudaRuntime(local_rank)
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# print("init comm")
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runtime.init_comm(
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@ -244,5 +244,5 @@ def parallel_model(model: ModelProto, tp_world_size: int = 1, tp_rank: int = 0):
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if tt.HasField("shape"):
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tt.ClearField("shape")
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model = helper.make_model(graph)
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model = onnx.shape_inference.infer_shapes(model)
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#model = onnx.shape_inference.infer_shapes(model)
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return model
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@ -0,0 +1,178 @@
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import argparse
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import torch
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from transformers import BertModel, BertConfig
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from transformers import GPT2Model, GPT2Config
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from transformers import OPTModel, OPTConfig
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import time
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import numpy as np
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import onnx
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import os
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from onnx.external_data_helper import convert_model_to_external_data
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from onnxsim import simplify
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torch.backends.cuda.matmul.allow_tf32 = False
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torch.backends.cudnn.allow_tf32 = False
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def parse_args():
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parser = argparse.ArgumentParser(description="Run pytorch gpt2/bert/opt and optionally export onnx.")
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parser.add_argument(
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"--model", type=str, choices=["gpt2", "bert", "opt"], required=True, help="model type"
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)
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parser.add_argument("--batch_size", type=int, default=1, help="batch size.")
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parser.add_argument("--length", type=int, default=1, help="sequence length.")
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parser.add_argument(
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"--export_onnx",
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type=str,
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nargs="?",
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default=None,
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const="./",
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help="whether and where to export onnx file",
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)
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args = parser.parse_args()
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args = parser.parse_args()
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print("arg setting: ", args)
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return (
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args.model,
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args.batch_size,
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args.length,
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args.export_onnx
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)
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def get_model(modelname):
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match modelname:
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case "bert":
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model = BertModel.from_pretrained("bert-base-uncased", add_pooling_layer=False, hidden_act="gelu_new") # erf is not impl by infini
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voc_size = BertConfig().vocab_size
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case "gpt2":
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model = GPT2Model.from_pretrained("gpt2")
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voc_size = GPT2Config().vocab_size
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case "opt":
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model = model = OPTModel.from_pretrained("./opt-125m")
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voc_size = OPTConfig().vocab_size
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case _:
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raise KeyError(modelname)
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model = model.eval()
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return model, voc_size
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def run_pytorch(torch_model, voc_size, batchsize, len):
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data = np.random.randint(0, voc_size, (batchsize, len), dtype=np.int32)
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np.save("test_inputs", data)
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inputs = torch.from_numpy(data).to("cuda")
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torch_model = torch_model.to("cuda")
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n_iter = 20
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with torch.no_grad():
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for _ in range(10):
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outputs = torch_model(inputs)
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torch.cuda.synchronize()
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begin = time.time()
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with torch.no_grad():
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for _ in range(n_iter):
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torch.cuda.synchronize()
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outputs = torch_model(inputs)
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#
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torch.cuda.synchronize()
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torch.cuda.synchronize()
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end = time.time()
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avg_time = (end - begin) / n_iter
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outputs = outputs.last_hidden_state.to("cpu")
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print("outputs abs mean:", abs(np.array(outputs)).mean())
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print(f"average time: {avg_time}")
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torch.cuda.memory.empty_cache()
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np.save("test_results", np.array(outputs))
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print("Save input & output as test_inputs.npy and test_results.npy")
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def export_onnx(model, data, path, extern=False):
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torch.onnx.export(model, data, path, verbose=False, do_constant_folding=True)
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onnx_model = onnx.load(path)
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onnx_model, check = simplify(onnx_model, skipped_optimizers=['eliminate_duplicate_initializer'])
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#onnx_model, check = simplify(onnx_model, skipped_optimizers=['fuse_qkv', 'eliminate_duplicate_initializer'])
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assert check
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add_value_info_for_constants(onnx_model)
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onnx_model = onnx.shape_inference.infer_shapes(onnx_model)
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if extern:
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extern_path = path.replace('.onnx', '.pb')
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if os.path.exists(extern_path):
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os.remove(extern_path)
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convert_model_to_external_data(
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onnx_model,
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all_tensors_to_one_file=True,
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location=extern_path,
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size_threshold=1024,
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convert_attribute=False,
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)
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onnx.save(onnx_model, path)
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def add_value_info_for_constants(model : onnx.ModelProto):
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"""
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Currently onnx.shape_inference doesn't use the shape of initializers, so add
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that info explicitly as ValueInfoProtos.
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Mutates the model.
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Args:
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model: The ModelProto to update.
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"""
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# All (top-level) constants will have ValueInfos before IRv4 as they are all inputs
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if model.ir_version < 4:
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return
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def add_const_value_infos_to_graph(graph : onnx.GraphProto):
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inputs = {i.name for i in graph.input}
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existing_info = {vi.name: vi for vi in graph.value_info}
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for init in graph.initializer:
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# Check it really is a constant, not an input
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if init.name in inputs:
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continue
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# The details we want to add
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elem_type = init.data_type
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shape = init.dims
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# Get existing or create new value info for this constant
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vi = existing_info.get(init.name)
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if vi is None:
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vi = graph.value_info.add()
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vi.name = init.name
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# Even though it would be weird, we will not overwrite info even if it doesn't match
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tt = vi.type.tensor_type
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if tt.elem_type == onnx.TensorProto.UNDEFINED:
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tt.elem_type = elem_type
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if not tt.HasField("shape"):
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# Ensure we set an empty list if the const is scalar (zero dims)
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tt.shape.dim.extend([])
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for dim in shape:
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tt.shape.dim.add().dim_value = dim
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# Handle subgraphs
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for node in graph.node:
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for attr in node.attribute:
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# Ref attrs refer to other attrs, so we don't need to do anything
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if attr.ref_attr_name != "":
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continue
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if attr.type == onnx.AttributeProto.GRAPH:
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add_const_value_infos_to_graph(attr.g)
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if attr.type == onnx.AttributeProto.GRAPHS:
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for g in attr.graphs:
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add_const_value_infos_to_graph(g)
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return add_const_value_infos_to_graph(model.graph)
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def main():
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modelname, batchsize, seqlen, export_path = parse_args()
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model, voc_size = get_model(modelname)
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if export_path is not None:
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filename = "{}_{}_{}.onnx".format(modelname, batchsize, seqlen)
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path = os.path.join(export_path, filename)
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param = torch.zeros((batchsize, seqlen), dtype=torch.int)
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export_onnx(model, param, path, True)
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run_pytorch(model, voc_size, batchsize, seqlen)
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if __name__ == "__main__":
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main()
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@ -13,4 +13,8 @@ void pow_kernel(int dtypeIndex, void *a, void *b, void *c, int a0, int a1,
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void less_kernel(int dtypeIndex, void *a, void *b, void *c, int a0, int a1,
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int a2, int a3, int b0, int b1, int b2, int b3, int c0, int c1,
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int c2, int c3);
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void div_const_kernel(int dType, void *a, void *b, void *c, size_t n);
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void pow_const_kernel(int dType, void *a, void *b, void *c, size_t n);
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}; // namespace infini
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@ -7,4 +7,6 @@ void expandKernel(int dType, void *input, void *output, int nDims,
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int outputsize, SmallArray inputShape,
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SmallArray outputShape);
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void expandRowKernel(int dType, void *input, void *output, int n_rows,
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int row_len);
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}; // namespace infini
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@ -23,12 +23,13 @@ from onnx.checker import (
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ValidationError,
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)
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from onnx.shape_inference import infer_shapes
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from onnx.numpy_helper import to_array
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from onnx.numpy_helper import to_array, from_array
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from typing import Dict, List, Any, Tuple, Sequence, Union, Optional
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from functools import reduce
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from onnxsim import simplify
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import copy
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import warnings
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import numpy as np
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class OnnxStub:
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@ -111,12 +112,6 @@ class OnnxStub:
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)
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tensors[input.name].set_input()
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for output in model.graph.output:
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dims = _take_shape_dim(output.type.tensor_type.shape)
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tensors[output.name] = self.handler.tensor(
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dims, output.type.tensor_type.elem_type
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)
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tensors[output.name].set_output()
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for node_idx in sorted_nodes:
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node = model.graph.node[node_idx]
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@ -947,6 +942,25 @@ class OnnxStub:
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tensors.get(node.output[0]),
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)
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elif node.op_type == "Where":
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## If Y is single -inf, treat Where as Add
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## TODO: deal with cases where Y is single inf or 0
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if node.input[0] in data and node.input[2] in data:
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where_condition = to_array(data[node.input[0]])
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where_alt = to_array(data[node.input[2]])
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if where_alt.size == 1:
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if np.isneginf(where_alt) or np.all(where_alt < -3e38):
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node.input[0] = node.input[0] + "_alt"
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if node.input[0] not in data:
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where_value = np.where(where_condition, 0, -np.inf).astype(where_alt.dtype)
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data[node.input[0]] = from_array(where_value, node.input[0])
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tensors[node.input[0]] = self.handler.tensor(list(where_value.shape), data[node.input[0]].data_type)
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tensors[node.input[0]].set_weight()
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tensors[node.output[0]] = self.handler.add(
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tensors[node.input[1]],
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tensors[node.input[0]],
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tensors.get(node.output[0]),
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)
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continue
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tensors[node.output[0]] = self.handler.where(
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tensors[node.input[1]],
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tensors[node.input[2]],
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@ -980,6 +994,8 @@ class OnnxStub:
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else:
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raise Exception('Unsupported operator "{}"'.format(node.op_type))
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for output in model.graph.output:
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tensors[output.name].set_output()
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################################
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# Allocate memory space for data
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################################
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@ -115,6 +115,20 @@ class ElementWiseCuda : public CudaKernelWithoutConfig {
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auto a_dim = op->getInputs(0)->getDims();
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auto b_dim = op->getInputs(1)->getDims();
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auto c_dim = op->getOutput()->getDims();
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const int dType = _op->getDType().getIndex();
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// Use optimized kernel if b is constant
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if (b_dim.size() == 0) {
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if (op->getOpType() == OpType::Div) {
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div_const_kernel(dType, aData, bData, cData,
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op->getOutput()->size());
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return;
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} else if (op->getOpType() == OpType::Pow) {
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pow_const_kernel(dType, aData, bData, cData,
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op->getOutput()->size());
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return;
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}
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}
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if (a_dim.size() > 4 || b_dim.size() > 4 || c_dim.size() > 4)
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IT_TODO_HALT();
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@ -127,7 +141,6 @@ class ElementWiseCuda : public CudaKernelWithoutConfig {
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std::copy(b_dim.begin(), b_dim.end(), b + (4 - b_dim.size()));
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std::copy(c_dim.begin(), c_dim.end(), c + (4 - c_dim.size()));
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const int dType = _op->getDType().getIndex();
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if (op->getOpType() == OpType::Div) {
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div_kernel(dType, aData, bData, cData, a[0], a[1], a[2], a[3], b[0],
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b[1], b[2], b[3], c[0], c[1], c[2], c[3]);
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@ -132,8 +132,8 @@ __global__ void _less_kernel(void *x, void *y, void *z, int a0, int a1, int a2,
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#define CASE(OP, T) \
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_##OP##_kernel<DT_CUDA<T>::t> \
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<<<gridsize, blocksize, 0, CUDAStream::getCurrentStream()>>> \
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(a, b, c, a0, a1, a2, a3, b0, b1, b2, b3, c0, c1, c2, c3);
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<<<gridsize, blocksize, 0, CUDAStream::getCurrentStream()>>>( \
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a, b, c, a0, a1, a2, a3, b0, b1, b2, b3, c0, c1, c2, c3);
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#define SWITCH_DTYPE(OP, DTYPE) \
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switch (DTYPE) { \
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@ -177,7 +177,92 @@ __global__ void _less_kernel(void *x, void *y, void *z, int a0, int a1, int a2,
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IT_TODO_HALT(); \
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}
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template <class T>
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__global__ void _div_const_kernel(void const *__restrict__ x,
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void const *__restrict__ y,
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void *__restrict__ z, const size_t n) {
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int tid = blockIdx.x * blockDim.x + threadIdx.x;
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if (tid < n) {
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((T *)z)[tid] = ((T *)x)[tid] / *((T *)y);
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}
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}
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template <class T>
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__global__ void _pow_const_kernel(void const *__restrict__ x,
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void const *__restrict__ y,
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void *__restrict__ z, const size_t n) {
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int tid = blockIdx.x * blockDim.x + threadIdx.x;
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if (tid < n) {
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((T *)z)[tid] = pow(((T *)x)[tid], *((T *)y));
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}
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}
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template <>
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__global__ void _pow_const_kernel<half>(void const *__restrict__ x,
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void const *__restrict__ y,
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void *__restrict__ z, const size_t n) {
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int tid = blockIdx.x * blockDim.x + threadIdx.x;
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if (tid < n) {
|
||||
((half *)z)[tid] = pow(((float)((half *)x)[tid]), *((half *)y));
|
||||
}
|
||||
}
|
||||
|
||||
#define CASE_CONST(OP, T) \
|
||||
_##OP##_const_kernel<DT_CUDA<T>::t> \
|
||||
<<<gridsize, blocksize, 0, CUDAStream::getCurrentStream()>>>(a, b, c, \
|
||||
n);
|
||||
|
||||
#define SWITCH_DTYPE_CONST(OP, DTYPE) \
|
||||
switch (DTYPE) { \
|
||||
case 1: \
|
||||
CASE_CONST(OP, 1) \
|
||||
break; \
|
||||
case 2: \
|
||||
CASE_CONST(OP, 2) \
|
||||
break; \
|
||||
case 3: \
|
||||
CASE_CONST(OP, 3) \
|
||||
break; \
|
||||
case 4: \
|
||||
CASE_CONST(OP, 4) \
|
||||
break; \
|
||||
case 5: \
|
||||
CASE_CONST(OP, 5) \
|
||||
break; \
|
||||
case 6: \
|
||||
CASE_CONST(OP, 6) \
|
||||
break; \
|
||||
case 7: \
|
||||
CASE_CONST(OP, 7) \
|
||||
break; \
|
||||
case 10: \
|
||||
CASE_CONST(OP, 10) \
|
||||
break; \
|
||||
case 11: \
|
||||
CASE_CONST(OP, 11) \
|
||||
break; \
|
||||
case 12: \
|
||||
CASE_CONST(OP, 12) \
|
||||
break; \
|
||||
case 13: \
|
||||
CASE_CONST(OP, 13) \
|
||||
break; \
|
||||
default: \
|
||||
IT_TODO_HALT(); \
|
||||
}
|
||||
|
||||
namespace infini {
|
||||
void div_const_kernel(int dType, void *a, void *b, void *c, size_t n) {
|
||||
size_t blocksize = block_work_size();
|
||||
size_t gridsize = (n + block_work_size() - 1) / block_work_size();
|
||||
SWITCH_DTYPE_CONST(div, dType);
|
||||
}
|
||||
|
||||
void pow_const_kernel(int dType, void *a, void *b, void *c, size_t n) {
|
||||
size_t blocksize = block_work_size();
|
||||
size_t gridsize = (n + block_work_size() - 1) / block_work_size();
|
||||
SWITCH_DTYPE_CONST(pow, dType);
|
||||
}
|
||||
|
||||
void div_kernel(int dType, void *a, void *b, void *c, int a0, int a1, int a2,
|
||||
int a3, int b0, int b1, int b2, int b3, int c0, int c1, int c2,
|
||||
int c3) {
|
||||
|
|
@ -204,12 +289,12 @@ void pow_kernel(int dType, void *a, void *b, void *c, int a0, int a1, int a2,
|
|||
int gridsize = (num + block_work_size() - 1) / block_work_size();
|
||||
if (dType == 1) {
|
||||
_pow_kernel<float>
|
||||
<<<gridsize, blocksize, 0, CUDAStream::getCurrentStream()>>>
|
||||
(a, b, c, a0, a1, a2, a3, b0, b1, b2, b3, c0, c1, c2, c3);
|
||||
<<<gridsize, blocksize, 0, CUDAStream::getCurrentStream()>>>(
|
||||
a, b, c, a0, a1, a2, a3, b0, b1, b2, b3, c0, c1, c2, c3);
|
||||
} else if (dType == 3) {
|
||||
_pow_kernel<int8_t>
|
||||
<<<gridsize, blocksize, 0, CUDAStream::getCurrentStream()>>>
|
||||
(a, b, c, a0, a1, a2, a3, b0, b1, b2, b3, c0, c1, c2, c3);
|
||||
<<<gridsize, blocksize, 0, CUDAStream::getCurrentStream()>>>(
|
||||
a, b, c, a0, a1, a2, a3, b0, b1, b2, b3, c0, c1, c2, c3);
|
||||
} else if (dType == 10) {
|
||||
int a_size = a0 * a1 * a2 * a3;
|
||||
int b_size = b0 * b1 * b2 * b3;
|
||||
|
|
@ -224,9 +309,9 @@ void pow_kernel(int dType, void *a, void *b, void *c, int a0, int a1, int a2,
|
|||
b_float[i] = __half2float(((half *)b)[i]);
|
||||
}
|
||||
_pow_kernel<float>
|
||||
<<<gridsize, blocksize, 0, CUDAStream::getCurrentStream()>>>
|
||||
(a_float.data(), b_float.data(), c_float.data(), a0, a1, a2, a3, b0,
|
||||
b1, b2, b3, c0, c1, c2, c3);
|
||||
<<<gridsize, blocksize, 0, CUDAStream::getCurrentStream()>>>(
|
||||
a_float.data(), b_float.data(), c_float.data(), a0, a1, a2, a3,
|
||||
b0, b1, b2, b3, c0, c1, c2, c3);
|
||||
for (int i = 0; i < c_size; ++i) {
|
||||
((half *)c)[i] = __float2half(c_float[i]);
|
||||
}
|
||||
|
|
|
|||
|
|
@ -39,6 +39,14 @@ __global__ void _expandKernel(void *input, void *output, int nDims,
|
|||
}
|
||||
}
|
||||
|
||||
template <class T>
|
||||
static __global__ void _expandRowKernel(void *__restrict__ dst,
|
||||
void const *__restrict__ src) {
|
||||
auto da = gridDim.x, db = blockDim.y, dx = blockDim.x, n = blockIdx.y,
|
||||
a = blockIdx.x, b = threadIdx.y, x = threadIdx.x;
|
||||
auto i = ((n * da + a) * db + b) * dx + x, j = (a * db + b) * dx + x;
|
||||
reinterpret_cast<T *>(dst)[i] = reinterpret_cast<T const *>(src)[j];
|
||||
}
|
||||
namespace infini {
|
||||
|
||||
#define CASE(T) \
|
||||
|
|
@ -96,4 +104,67 @@ void expandKernel(int dType, void *input, void *output, int nDims,
|
|||
SWITCH_DTYPE(dType)
|
||||
}
|
||||
|
||||
#define CASE_ROW(T) \
|
||||
_expandRowKernel<float> \
|
||||
<<<grid, block, 0, CUDAStream::getCurrentStream()>>>(output, input);
|
||||
|
||||
#define SWITCH_DTYPE_ROW(DTYPE) \
|
||||
switch (DTYPE) { \
|
||||
case 1: \
|
||||
CASE_ROW(1) \
|
||||
break; \
|
||||
case 2: \
|
||||
CASE_ROW(2) \
|
||||
break; \
|
||||
case 3: \
|
||||
CASE_ROW(3) \
|
||||
break; \
|
||||
case 4: \
|
||||
CASE_ROW(4) \
|
||||
break; \
|
||||
case 5: \
|
||||
CASE_ROW(5) \
|
||||
break; \
|
||||
case 6: \
|
||||
CASE_ROW(6) \
|
||||
break; \
|
||||
case 7: \
|
||||
CASE_ROW(7) \
|
||||
break; \
|
||||
case 10: \
|
||||
CASE_ROW(10) \
|
||||
break; \
|
||||
case 11: \
|
||||
CASE_ROW(11) \
|
||||
break; \
|
||||
case 12: \
|
||||
CASE_ROW(12) \
|
||||
break; \
|
||||
case 13: \
|
||||
CASE_ROW(13) \
|
||||
break; \
|
||||
case 16: \
|
||||
CASE_ROW(16) \
|
||||
break; \
|
||||
default: \
|
||||
IT_TODO_HALT(); \
|
||||
}
|
||||
|
||||
// Optimization for expanding a row vector. The row length must be a multiple of 32
|
||||
void expandRowKernel(int dType, void *input, void *output, int n_rows,
|
||||
int row_len) {
|
||||
// Factorize row_len: row_len = a x b x 32 (32 is the warp size), b<=32
|
||||
// input: 1 x (a x b x 32 x sizeT)
|
||||
// output: n_rows x (a x b x 32 x sizeT)
|
||||
// grid: n_rows x a
|
||||
// block: b x 32
|
||||
auto c = row_len / 32, b = c;
|
||||
if (b > 32) {
|
||||
for (b = 32; c % b != 0; --b);
|
||||
}
|
||||
auto a = c / b;
|
||||
dim3 grid(a, n_rows), block(32, b);
|
||||
SWITCH_DTYPE_ROW(dType)
|
||||
}
|
||||
|
||||
} // namespace infini
|
||||
|
|
|
|||
|
|
@ -102,10 +102,20 @@ class matmulCublas : public Kernel {
|
|||
inputShape.data[i] = inC->getDims()[i - offset];
|
||||
}
|
||||
const int dType = dataType.getIndex();
|
||||
|
||||
// Bias in linear layer is row vector of (1,n), n is the number of
|
||||
// features. If row vector and n % 32 == 0, use optimized kernel.
|
||||
if (inC->getRank() == 1 && inC->getDims()[0] % 32 == 0) {
|
||||
expandRowKernel(dType, inC->getRawDataPtr<void *>(),
|
||||
out->getRawDataPtr<void *>(),
|
||||
out->size() / inC->getDims()[0],
|
||||
inC->getDims()[0]);
|
||||
} else {
|
||||
expandKernel(dType, inC->getRawDataPtr<void *>(),
|
||||
out->getRawDataPtr<void *>(), nDims, outputsize,
|
||||
inputShape, outputShape);
|
||||
}
|
||||
}
|
||||
// TODO:use compute type
|
||||
cublasStatus_t stat;
|
||||
std::string computeTypeStr = op->getComputeType();
|
||||
|
|
|
|||
Loading…
Reference in New Issue