147 lines
4.3 KiB
C
147 lines
4.3 KiB
C
/*
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* Copyright (c) 2018-2020, ARM Limited and Contributors. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#include <assert.h>
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#include <errno.h>
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#include <plat_arm.h>
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#include <plat_private.h>
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#include <bl31/bl31.h>
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#include <common/bl_common.h>
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#include <common/debug.h>
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#include <drivers/arm/pl011.h>
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#include <drivers/console.h>
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#include <lib/mmio.h>
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#include <lib/xlat_tables/xlat_tables.h>
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#include <plat/common/platform.h>
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#include <versal_def.h>
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#include <plat_private.h>
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#include <plat_startup.h>
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static entry_point_info_t bl32_image_ep_info;
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static entry_point_info_t bl33_image_ep_info;
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static console_t versal_runtime_console;
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/*
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* Return a pointer to the 'entry_point_info' structure of the next image for
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* the security state specified. BL33 corresponds to the non-secure image type
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* while BL32 corresponds to the secure image type. A NULL pointer is returned
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* if the image does not exist.
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*/
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entry_point_info_t *bl31_plat_get_next_image_ep_info(uint32_t type)
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{
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assert(sec_state_is_valid(type));
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if (type == NON_SECURE) {
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return &bl33_image_ep_info;
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}
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return &bl32_image_ep_info;
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}
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/*
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* Set the build time defaults,if we can't find any config data.
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*/
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static inline void bl31_set_default_config(void)
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{
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bl32_image_ep_info.pc = BL32_BASE;
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bl32_image_ep_info.spsr = arm_get_spsr_for_bl32_entry();
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bl33_image_ep_info.pc = plat_get_ns_image_entrypoint();
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bl33_image_ep_info.spsr = SPSR_64(MODE_EL2, MODE_SP_ELX,
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DISABLE_ALL_EXCEPTIONS);
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}
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/*
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* Perform any BL31 specific platform actions. Here is an opportunity to copy
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* parameters passed by the calling EL (S-EL1 in BL2 & S-EL3 in BL1) before they
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* are lost (potentially). This needs to be done before the MMU is initialized
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* so that the memory layout can be used while creating page tables.
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*/
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void bl31_early_platform_setup2(u_register_t arg0, u_register_t arg1,
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u_register_t arg2, u_register_t arg3)
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{
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uint64_t atf_handoff_addr;
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/* Initialize the console to provide early debug support */
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int rc = console_pl011_register(VERSAL_UART_BASE,
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VERSAL_UART_CLOCK,
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VERSAL_UART_BAUDRATE,
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&versal_runtime_console);
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if (rc == 0) {
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panic();
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}
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console_set_scope(&versal_runtime_console, CONSOLE_FLAG_BOOT |
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CONSOLE_FLAG_RUNTIME);
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/* Initialize the platform config for future decision making */
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versal_config_setup();
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/* There are no parameters from BL2 if BL31 is a reset vector */
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assert(arg0 == 0U);
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assert(arg1 == 0U);
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/*
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* Do initial security configuration to allow DRAM/device access. On
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* Base VERSAL only DRAM security is programmable (via TrustZone), but
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* other platforms might have more programmable security devices
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* present.
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*/
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/* Populate common information for BL32 and BL33 */
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SET_PARAM_HEAD(&bl32_image_ep_info, PARAM_EP, VERSION_1, 0);
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SET_SECURITY_STATE(bl32_image_ep_info.h.attr, SECURE);
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SET_PARAM_HEAD(&bl33_image_ep_info, PARAM_EP, VERSION_1, 0);
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SET_SECURITY_STATE(bl33_image_ep_info.h.attr, NON_SECURE);
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atf_handoff_addr = mmio_read_32(PMC_GLOBAL_GLOB_GEN_STORAGE4);
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enum fsbl_handoff ret = fsbl_atf_handover(&bl32_image_ep_info,
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&bl33_image_ep_info,
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atf_handoff_addr);
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if (ret == FSBL_HANDOFF_NO_STRUCT || ret == FSBL_HANDOFF_INVAL_STRUCT) {
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bl31_set_default_config();
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} else if (ret != FSBL_HANDOFF_SUCCESS) {
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panic();
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}
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NOTICE("BL31: Secure code at 0x%lx\n", bl32_image_ep_info.pc);
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NOTICE("BL31: Non secure code at 0x%lx\n", bl33_image_ep_info.pc);
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}
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void bl31_platform_setup(void)
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{
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/* Initialize the gic cpu and distributor interfaces */
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plat_versal_gic_driver_init();
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plat_versal_gic_init();
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}
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void bl31_plat_runtime_setup(void)
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{
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}
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/*
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* Perform the very early platform specific architectural setup here.
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*/
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void bl31_plat_arch_setup(void)
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{
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plat_arm_interconnect_init();
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plat_arm_interconnect_enter_coherency();
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const mmap_region_t bl_regions[] = {
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MAP_REGION_FLAT(BL31_BASE, BL31_END - BL31_BASE,
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MT_MEMORY | MT_RW | MT_SECURE),
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MAP_REGION_FLAT(BL_CODE_BASE, BL_CODE_END - BL_CODE_BASE,
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MT_CODE | MT_SECURE),
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MAP_REGION_FLAT(BL_RO_DATA_BASE, BL_RO_DATA_END - BL_RO_DATA_BASE,
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MT_RO_DATA | MT_SECURE),
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MAP_REGION_FLAT(BL_COHERENT_RAM_BASE,
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BL_COHERENT_RAM_END - BL_COHERENT_RAM_BASE,
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MT_DEVICE | MT_RW | MT_SECURE),
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{0}
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};
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setup_page_tables(bl_regions, plat_versal_get_mmap());
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enable_mmu_el3(0);
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}
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