329 lines
7.7 KiB
C
329 lines
7.7 KiB
C
#ifndef GEN8_RENDER_H
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#define GEN8_RENDER_H
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#include "gen7_render.h"
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# define GEN8_WM_LEGACY_DIAMOND_LINE_RASTERIZATION (1 << 26)
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#define GEN8_3DSTATE_SCISSOR_STATE_POINTERS GEN4_3D(3, 0, 0xf)
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#define GEN8_3DSTATE_STENCIL_BUFFER GEN4_3D(3, 0, 0x06)
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#define GEN8_3DSTATE_HIER_DEPTH_BUFFER GEN4_3D(3, 0, 0x07)
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#define GEN8_3DSTATE_MULTISAMPLE GEN4_3D(3, 0, 0x0d)
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# define GEN8_3DSTATE_MULTISAMPLE_NUMSAMPLES_2 (1 << 1)
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#define GEN8_3DSTATE_WM_HZ_OP GEN4_3D(3, 0, 0x52)
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#define GEN8_3DSTATE_VF_INSTANCING GEN4_3D(3, 0, 0x49)
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# define GEN8_SBE_FORCE_URB_ENTRY_READ_LENGTH (1 << 29)
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# define GEN8_SBE_FORCE_URB_ENTRY_READ_OFFSET (1 << 28)
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# define GEN8_SBE_URB_ENTRY_READ_OFFSET_SHIFT 5
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#define GEN8_3DSTATE_SBE_SWIZ GEN4_3D(3, 0, 0x51)
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#define GEN8_3DSTATE_RASTER GEN4_3D(3, 0, 0x50)
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# define GEN8_RASTER_FRONT_WINDING_CCW (1 << 21)
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# define GEN8_RASTER_CULL_NONE (1 << 16)
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# define GEN8_SF_POINT_WIDTH_FROM_SOURCE (1 << 11)
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# define GEN8_VS_FLOATING_POINT_MODE_ALTERNATE (1 << 16)
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#define GEN8_3DSTATE_VIEWPORT_STATE_POINTERS_SF_CLIP \
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GEN4_3D(3, 0, 0x21)
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#define GEN8_3DSTATE_PS_BLEND GEN4_3D(3, 0, 0x4d)
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# define GEN8_PS_BLEND_HAS_WRITEABLE_RT (1 << 30)
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#define GEN8_3DSTATE_WM_DEPTH_STENCIL GEN4_3D(3, 0, 0x4e)
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#define GEN8_3DSTATE_PS_EXTRA GEN4_3D(3, 0, 0x4f)
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# define GEN8_PSX_PIXEL_SHADER_VALID (1 << 31)
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# define GEN8_PSX_ATTRIBUTE_ENABLE (1 << 8)
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#define GEN8_3DSTATE_DS_STATE_POINTERS GEN4_3D(3, 0, 0x25)
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#define GEN8_3DSTATE_SAMPLER_STATE_POINTERS_HS GEN4_3D(3, 0, 0x2c)
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#define GEN8_3DSTATE_SAMPLER_STATE_POINTERS_DS GEN4_3D(3, 0, 0x2d)
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#define GEN8_3DSTATE_VF GEN4_3D(3, 0, 0x0c)
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#define GEN8_3DSTATE_VF_TOPOLOGY GEN4_3D(3, 0, 0x4b)
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#define GEN8_3DSTATE_BIND_TABLE_POOL_ALLOC GEN4_3D(3, 1, 0x19)
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#define GEN8_3DSTATE_GATHER_POOL_ALLOC GEN4_3D(3, 1, 0x1a)
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#define GEN8_3DSTATE_DX9_CONSTANT_BUFFER_POOL_ALLOC GEN4_3D(3, 1, 0x1b)
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#define GEN8_3DSTATE_PUSH_CONSTANT_ALLOC_HS GEN4_3D(3, 1, 0x13)
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#define GEN8_3DSTATE_PUSH_CONSTANT_ALLOC_DS GEN4_3D(3, 1, 0x14)
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#define GEN8_3DSTATE_PUSH_CONSTANT_ALLOC_GS GEN4_3D(3, 1, 0x15)
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#define GEN8_3DSTATE_VF_SGVS GEN4_3D(3, 0, 0x4a)
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#define GEN8_3DSTATE_SO_DECL_LIST GEN4_3D(3, 1, 0x17)
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#define GEN8_3DSTATE_SO_BUFFER GEN4_3D(3, 1, 0x18)
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#define GEN8_3DSTATE_SAMPLER_PALETTE_LOAD0 GEN4_3D(3, 1, 0x02)
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#define GEN8_3DSTATE_SAMPLER_PALETTE_LOAD1 GEN4_3D(3, 1, 0x0c)
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/* Some random bits that we care about */
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#define GEN8_VB0_BUFFER_ADDR_MOD_EN (1 << 14)
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#define GEN8_3DSTATE_PS_PERSPECTIVE_PIXEL_BARYCENTRIC (1 << 11)
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#define GEN8_3DSTATE_PS_ATTRIBUTE_ENABLED (1 << 10)
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/* Random shifts */
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#define GEN8_3DSTATE_PS_MAX_THREADS_SHIFT 23
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/* STATE_BASE_ADDRESS state size in pages*/
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#define GEN8_STATE_SIZE_PAGES(x) ((x) << 12)
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#define BDW_MOCS_PTE (0 << 5)
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#define BDW_MOCS_UC (1 << 5)
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#define BDW_MOCS_WT (2 << 5)
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#define BDW_MOCS_WB (3 << 5)
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#define BDW_MOCS_TC_ELLC (0 << 3)
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#define BDW_MOCS_TC_LLC (1 << 3)
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#define BDW_MOCS_TC_LLC_ELLC (2 << 3)
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#define BDW_MOCS_TC_L3_PTE (3 << 3)
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#define BDW_MOCS_AGE(x) ((x) << 0)
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#define CHV_MOCS_UC (0 << 5)
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#define CHV_MOCS_WB (3 << 5)
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#define CHV_MOCS_NO_CACHING (0 << 3)
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#define CHV_MOCS_L3 (3 << 3)
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/* Shamelessly ripped from mesa */
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struct gen8_surface_state
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{
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struct {
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uint32_t cube_pos_z:1;
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uint32_t cube_neg_z:1;
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uint32_t cube_pos_y:1;
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uint32_t cube_neg_y:1;
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uint32_t cube_pos_x:1;
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uint32_t cube_neg_x:1;
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uint32_t media_boundary_pixel_mode:2;
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uint32_t render_cache_read_write:1;
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uint32_t smapler_l2_bypass:1;
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uint32_t vert_line_stride_ofs:1;
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uint32_t vert_line_stride:1;
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uint32_t tiled_mode:2;
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uint32_t horizontal_alignment:2;
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uint32_t vertical_alignment:2;
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uint32_t surface_format:9; /**< BRW_SURFACEFORMAT_x */
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uint32_t pad0:1;
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uint32_t is_array:1;
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uint32_t surface_type:3; /**< BRW_SURFACE_1D/2D/3D/CUBE */
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} ss0;
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struct {
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uint32_t qpitch:15;
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uint32_t pad1:4;
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uint32_t base_mip_level:5;
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uint32_t memory_object_control:7;
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uint32_t pad0:1;
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} ss1;
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struct {
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uint32_t width:14;
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uint32_t pad1:2;
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uint32_t height:14;
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uint32_t pad0:2;
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} ss2;
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struct {
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uint32_t pitch:18;
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uint32_t pad:3;
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uint32_t depth:11;
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} ss3;
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struct {
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uint32_t minimum_array_element:27;
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uint32_t pad0:5;
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} ss4;
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struct {
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uint32_t mip_count:4;
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uint32_t min_lod:4;
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uint32_t pad3:6;
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uint32_t coherency_type:1;
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uint32_t pad2:5;
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uint32_t ewa_disable_for_cube:1;
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uint32_t y_offset:3;
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uint32_t pad0:1;
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uint32_t x_offset:7;
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} ss5;
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struct {
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uint32_t aux_mode:3;
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uint32_t aux_pitch:9;
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uint32_t pad0:4;
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uint32_t aux_qpitch:15;
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uint32_t pad1:1;
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} ss6;
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struct {
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uint32_t resource_min_lod:12;
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/* Only on Haswell */
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uint32_t pad0:4;
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uint32_t shader_chanel_select_a:3;
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uint32_t shader_chanel_select_b:3;
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uint32_t shader_chanel_select_g:3;
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uint32_t shader_chanel_select_r:3;
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uint32_t alpha_clear_color:1;
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uint32_t blue_clear_color:1;
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uint32_t green_clear_color:1;
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uint32_t red_clear_color:1;
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} ss7;
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struct {
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uint32_t base_addr;
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} ss8;
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struct {
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uint32_t base_addr_hi;
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} ss9;
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struct {
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uint32_t aux_base_addr;
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} ss10;
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struct {
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uint32_t aux_base_addr_hi;
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} ss11;
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struct {
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uint32_t hiz_depth_clear_value;
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} ss12;
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struct {
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uint32_t reserved;
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} ss13;
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struct {
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uint32_t reserved;
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} ss14;
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struct {
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uint32_t reserved;
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} ss15;
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};
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struct gen8_sampler_state
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{
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struct
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{
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uint32_t aniso_algorithm:1;
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uint32_t lod_bias:13;
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uint32_t min_filter:3;
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uint32_t mag_filter:3;
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uint32_t mip_filter:2;
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uint32_t base_level:5;
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uint32_t lod_preclamp:2;
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uint32_t default_color_mode:1;
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uint32_t pad0:1;
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uint32_t disable:1;
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} ss0;
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struct
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{
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uint32_t cube_control_mode:1;
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uint32_t shadow_function:3;
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uint32_t chromakey_mode:1;
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uint32_t chromakey_index:2;
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uint32_t chromakey_enable:1;
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uint32_t max_lod:12;
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uint32_t min_lod:12;
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} ss1;
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struct
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{
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uint32_t lod_clamp_mag_mode:1;
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uint32_t flexible_filter_valign:1;
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uint32_t flexible_filter_halign:1;
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uint32_t flexible_filter_coeff_size:1;
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uint32_t flexible_filter_mode:1;
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uint32_t pad1:1;
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uint32_t indirect_state_ptr:18;
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uint32_t pad0:2;
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uint32_t sep_filter_height:2;
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uint32_t sep_filter_width:2;
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uint32_t sep_filter_coeff_table_size:2;
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} ss2;
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struct
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{
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uint32_t r_wrap_mode:3;
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uint32_t t_wrap_mode:3;
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uint32_t s_wrap_mode:3;
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uint32_t pad:1;
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uint32_t non_normalized_coord:1;
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uint32_t trilinear_quality:2;
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uint32_t address_round:6;
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uint32_t max_aniso:3;
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uint32_t pad0:2;
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uint32_t non_sep_filter_footprint_mask:8;
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} ss3;
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};
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struct gen8_blend_state {
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struct {
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uint32_t pad0:19;
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uint32_t y_dither_offset:2;
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uint32_t x_dither_offset:2;
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uint32_t dither_enable:1;
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uint32_t alpha_test_func:3;
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uint32_t alpha_test:1;
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uint32_t alpha_to_coverage_dither:1;
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uint32_t alpha_to_one:1;
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uint32_t ia_blend:1;
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uint32_t alpha_to_coverage:1;
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} bs0;
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struct {
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uint32_t write_disable_blue:1;
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uint32_t write_disable_green:1;
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uint32_t write_disable_red:1;
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uint32_t write_disable_alpha:1;
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uint32_t pad1:1;
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uint32_t alpha_blend_func:3;
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uint32_t dest_alpha_blend_factor:5;
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uint32_t source_alpha_blend_factor:5;
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uint32_t color_blend_func:3;
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uint32_t dest_blend_factor:5;
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uint32_t source_blend_factor:5;
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uint32_t color_buffer_blend:1;
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uint32_t post_blend_color_clamp:1;
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uint32_t pre_blend_color_clamp:1;
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uint32_t color_clamp_range:2;
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uint32_t pre_blend_source_only_clamp:1;
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uint32_t pad0:22;
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uint32_t logic_op_func:4;
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uint32_t logic_op_enable:1;
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} bs[16];
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};
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struct gen7_sf_clip_viewport {
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struct {
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float m00;
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float m11;
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float m22;
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float m30;
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float m31;
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float m32;
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} viewport;
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uint32_t pad0[2];
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struct {
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float xmin;
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float xmax;
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float ymin;
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float ymax;
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} guardband;
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float pad1[4];
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};
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struct gen6_scissor_rect
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{
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uint32_t xmin:16;
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uint32_t ymin:16;
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uint32_t xmax:16;
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uint32_t ymax:16;
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};
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#endif
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