251 lines
6.5 KiB
C
251 lines
6.5 KiB
C
/*
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* Copyright © 2016 Intel Corporation
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
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* IN THE SOFTWARE.
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*/
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#include "igt.h"
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#include <sys/poll.h>
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IGT_TEST_DESCRIPTION("Basic check of polling for prime fences.");
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static bool prime_busy(struct pollfd *pfd, bool excl)
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{
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pfd->events = excl ? POLLOUT : POLLIN;
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return poll(pfd, 1, 0) == 0;
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}
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#define BEFORE 0x1
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#define AFTER 0x2
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#define HANG 0x4
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#define POLL 0x8
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static void busy(int fd, unsigned ring, unsigned flags)
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{
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const int gen = intel_gen(intel_get_drm_devid(fd));
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struct drm_i915_gem_exec_object2 obj[2];
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struct pollfd pfd[2];
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#define SCRATCH 0
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#define BATCH 1
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struct drm_i915_gem_relocation_entry store[1024+1];
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struct drm_i915_gem_execbuffer2 execbuf;
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unsigned size = ALIGN(ARRAY_SIZE(store)*16 + 4, 4096);
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struct timespec tv;
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uint32_t *batch, *bbe;
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int i, count, timeout;
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gem_quiescent_gpu(fd);
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memset(&execbuf, 0, sizeof(execbuf));
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execbuf.buffers_ptr = (uintptr_t)obj;
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execbuf.buffer_count = 2;
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execbuf.flags = ring;
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if (gen < 6)
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execbuf.flags |= I915_EXEC_SECURE;
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memset(obj, 0, sizeof(obj));
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obj[SCRATCH].handle = gem_create(fd, 4096);
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obj[BATCH].handle = gem_create(fd, size);
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obj[BATCH].relocs_ptr = (uintptr_t)store;
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obj[BATCH].relocation_count = ARRAY_SIZE(store);
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memset(store, 0, sizeof(store));
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if (flags & BEFORE) {
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memset(pfd, 0, sizeof(pfd));
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pfd[SCRATCH].fd = prime_handle_to_fd(fd, obj[SCRATCH].handle);
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pfd[BATCH].fd = prime_handle_to_fd(fd, obj[BATCH].handle);
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}
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batch = gem_mmap__wc(fd, obj[BATCH].handle, 0, size, PROT_WRITE);
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gem_set_domain(fd, obj[BATCH].handle,
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I915_GEM_DOMAIN_GTT, I915_GEM_DOMAIN_GTT);
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i = 0;
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for (count = 0; count < 1024; count++) {
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store[count].target_handle = obj[SCRATCH].handle;
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store[count].presumed_offset = -1;
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store[count].offset = sizeof(uint32_t) * (i + 1);
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store[count].delta = sizeof(uint32_t) * count;
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store[count].read_domains = I915_GEM_DOMAIN_INSTRUCTION;
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store[count].write_domain = I915_GEM_DOMAIN_INSTRUCTION;
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batch[i] = MI_STORE_DWORD_IMM | (gen < 6 ? 1 << 22 : 0);
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if (gen >= 8) {
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batch[++i] = 0;
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batch[++i] = 0;
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} else if (gen >= 4) {
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batch[++i] = 0;
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batch[++i] = 0;
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store[count].offset += sizeof(uint32_t);
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} else {
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batch[i]--;
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batch[++i] = 0;
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}
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batch[++i] = count;
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i++;
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}
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bbe = &batch[i];
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store[count].target_handle = obj[BATCH].handle; /* recurse */
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store[count].presumed_offset = 0;
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store[count].offset = sizeof(uint32_t) * (i + 1);
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store[count].delta = 0;
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store[count].read_domains = I915_GEM_DOMAIN_COMMAND;
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store[count].write_domain = 0;
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batch[i] = MI_BATCH_BUFFER_START;
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if (gen >= 8) {
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batch[i] |= 1 << 8 | 1;
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batch[++i] = 0;
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batch[++i] = 0;
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} else if (gen >= 6) {
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batch[i] |= 1 << 8;
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batch[++i] = 0;
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} else {
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batch[i] |= 2 << 6;
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batch[++i] = 0;
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if (gen < 4) {
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batch[i] |= 1;
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store[count].delta = 1;
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}
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}
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i++;
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igt_assert(i < size/sizeof(*batch));
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igt_require(__gem_execbuf(fd, &execbuf) == 0);
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if (flags & AFTER) {
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memset(pfd, 0, sizeof(pfd));
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pfd[SCRATCH].fd = prime_handle_to_fd(fd, obj[SCRATCH].handle);
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pfd[BATCH].fd = prime_handle_to_fd(fd, obj[BATCH].handle);
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}
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igt_assert(prime_busy(&pfd[SCRATCH], false));
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igt_assert(prime_busy(&pfd[SCRATCH], true));
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igt_assert(!prime_busy(&pfd[BATCH], false));
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igt_assert(prime_busy(&pfd[BATCH], true));
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timeout = 120;
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if ((flags & HANG) == 0) {
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*bbe = MI_BATCH_BUFFER_END;
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__sync_synchronize();
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timeout = 1;
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}
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/* Calling busy in a loop should be enough to flush the rendering */
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if (flags & POLL) {
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pfd[BATCH].events = POLLOUT;
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igt_assert(poll(pfd, 1, timeout * 1000) == 1);
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} else {
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memset(&tv, 0, sizeof(tv));
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while (prime_busy(&pfd[BATCH], true))
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igt_assert(igt_seconds_elapsed(&tv) < timeout);
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}
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igt_assert(!prime_busy(&pfd[SCRATCH], true));
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munmap(batch, size);
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batch = gem_mmap__wc(fd, obj[SCRATCH].handle, 0, 4096, PROT_READ);
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for (i = 0; i < 1024; i++)
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igt_assert_eq_u32(batch[i], i);
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munmap(batch, 4096);
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gem_close(fd, obj[BATCH].handle);
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gem_close(fd, obj[SCRATCH].handle);
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close(pfd[BATCH].fd);
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close(pfd[SCRATCH].fd);
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}
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static void test_engine_mode(int fd,
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const struct intel_execution_engine *e,
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const char *name, unsigned int flags)
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{
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igt_hang_t hang = {};
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igt_subtest_group {
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igt_fixture {
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gem_require_ring(fd, e->exec_id | e->flags);
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igt_require(gem_can_store_dword(fd, e->exec_id | e->flags));
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if ((flags & HANG) == 0)
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{
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igt_fork_hang_detector(fd);
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}
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else
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{
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igt_skip_on_simulation();
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hang = igt_allow_hang(fd, 0, 0);
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}
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}
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igt_subtest_f("%s%s-%s",
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!e->exec_id && !(flags & HANG) ? "basic-" : "",
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name, e->name)
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busy(fd, e->exec_id | e->flags, flags);
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igt_subtest_f("%swait-%s-%s",
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!e->exec_id && !(flags & HANG) ? "basic-" : "",
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name, e->name)
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busy(fd, e->exec_id | e->flags, flags | POLL);
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igt_fixture {
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if ((flags & HANG) == 0)
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igt_stop_hang_detector();
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else
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igt_disallow_hang(fd, hang);
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}
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}
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}
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igt_main
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{
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const struct intel_execution_engine *e;
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int fd = -1;
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igt_fixture {
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fd = drm_open_driver_master(DRIVER_INTEL);
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igt_require_gem(fd);
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}
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igt_subtest_group {
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const struct mode {
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const char *name;
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unsigned int flags;
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} modes[] = {
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{ "before", BEFORE },
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{ "after", AFTER },
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{ "hang", BEFORE | HANG },
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{ NULL },
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};
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igt_fixture
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gem_require_mmap_wc(fd);
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for (e = intel_execution_engines; e->name; e++) {
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for (const struct mode *m = modes; m->name; m++)
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test_engine_mode(fd, e, m->name, m->flags);
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}
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}
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igt_fixture
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close(fd);
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}
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