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linux_old1/arch/blackfin/mach-bf537/include/mach/cdefBF534.h

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blackfin architecture This adds support for the Analog Devices Blackfin processor architecture, and currently supports the BF533, BF532, BF531, BF537, BF536, BF534, and BF561 (Dual Core) devices, with a variety of development platforms including those avaliable from Analog Devices (BF533-EZKit, BF533-STAMP, BF537-STAMP, BF561-EZKIT), and Bluetechnix! Tinyboards. The Blackfin architecture was jointly developed by Intel and Analog Devices Inc. (ADI) as the Micro Signal Architecture (MSA) core and introduced it in December of 2000. Since then ADI has put this core into its Blackfin processor family of devices. The Blackfin core has the advantages of a clean, orthogonal,RISC-like microprocessor instruction set. It combines a dual-MAC (Multiply/Accumulate), state-of-the-art signal processing engine and single-instruction, multiple-data (SIMD) multimedia capabilities into a single instruction-set architecture. The Blackfin architecture, including the instruction set, is described by the ADSP-BF53x/BF56x Blackfin Processor Programming Reference http://blackfin.uclinux.org/gf/download/frsrelease/29/2549/Blackfin_PRM.pdf The Blackfin processor is already supported by major releases of gcc, and there are binary and source rpms/tarballs for many architectures at: http://blackfin.uclinux.org/gf/project/toolchain/frs There is complete documentation, including "getting started" guides available at: http://docs.blackfin.uclinux.org/ which provides links to the sources and patches you will need in order to set up a cross-compiling environment for bfin-linux-uclibc This patch, as well as the other patches (toolchain, distribution, uClibc) are actively supported by Analog Devices Inc, at: http://blackfin.uclinux.org/ We have tested this on LTP, and our test plan (including pass/fails) can be found at: http://docs.blackfin.uclinux.org/doku.php?id=testing_the_linux_kernel [m.kozlowski@tuxland.pl: balance parenthesis in blackfin header files] Signed-off-by: Bryan Wu <bryan.wu@analog.com> Signed-off-by: Mariusz Kozlowski <m.kozlowski@tuxland.pl> Signed-off-by: Aubrey Li <aubrey.li@analog.com> Signed-off-by: Jie Zhang <jie.zhang@analog.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-05-07 05:50:22 +08:00
/*
Blackfin: mass clean up of copyright/licensing info Bill Gatliff & David Brownell pointed out we were missing some copyrights, and licensing terms in some of the files in ./arch/blackfin, so this fixes things, and cleans them up. It also removes: - verbose GPL text(refer to the top level ./COPYING file) - file names (you are looking at the file) - bug url (it's in the ./MAINTAINERS file) - "or later" on GPL-2, when we did not have that right It also allows some Blackfin-specific assembly files to be under a BSD like license (for people to use them outside of Linux). Signed-off-by: Robin Getz <robin.getz@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2009-09-24 22:11:24 +08:00
* Copyright 2005-2008 Analog Devices Inc.
blackfin architecture This adds support for the Analog Devices Blackfin processor architecture, and currently supports the BF533, BF532, BF531, BF537, BF536, BF534, and BF561 (Dual Core) devices, with a variety of development platforms including those avaliable from Analog Devices (BF533-EZKit, BF533-STAMP, BF537-STAMP, BF561-EZKIT), and Bluetechnix! Tinyboards. The Blackfin architecture was jointly developed by Intel and Analog Devices Inc. (ADI) as the Micro Signal Architecture (MSA) core and introduced it in December of 2000. Since then ADI has put this core into its Blackfin processor family of devices. The Blackfin core has the advantages of a clean, orthogonal,RISC-like microprocessor instruction set. It combines a dual-MAC (Multiply/Accumulate), state-of-the-art signal processing engine and single-instruction, multiple-data (SIMD) multimedia capabilities into a single instruction-set architecture. The Blackfin architecture, including the instruction set, is described by the ADSP-BF53x/BF56x Blackfin Processor Programming Reference http://blackfin.uclinux.org/gf/download/frsrelease/29/2549/Blackfin_PRM.pdf The Blackfin processor is already supported by major releases of gcc, and there are binary and source rpms/tarballs for many architectures at: http://blackfin.uclinux.org/gf/project/toolchain/frs There is complete documentation, including "getting started" guides available at: http://docs.blackfin.uclinux.org/ which provides links to the sources and patches you will need in order to set up a cross-compiling environment for bfin-linux-uclibc This patch, as well as the other patches (toolchain, distribution, uClibc) are actively supported by Analog Devices Inc, at: http://blackfin.uclinux.org/ We have tested this on LTP, and our test plan (including pass/fails) can be found at: http://docs.blackfin.uclinux.org/doku.php?id=testing_the_linux_kernel [m.kozlowski@tuxland.pl: balance parenthesis in blackfin header files] Signed-off-by: Bryan Wu <bryan.wu@analog.com> Signed-off-by: Mariusz Kozlowski <m.kozlowski@tuxland.pl> Signed-off-by: Aubrey Li <aubrey.li@analog.com> Signed-off-by: Jie Zhang <jie.zhang@analog.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-05-07 05:50:22 +08:00
*
Blackfin: mass clean up of copyright/licensing info Bill Gatliff & David Brownell pointed out we were missing some copyrights, and licensing terms in some of the files in ./arch/blackfin, so this fixes things, and cleans them up. It also removes: - verbose GPL text(refer to the top level ./COPYING file) - file names (you are looking at the file) - bug url (it's in the ./MAINTAINERS file) - "or later" on GPL-2, when we did not have that right It also allows some Blackfin-specific assembly files to be under a BSD like license (for people to use them outside of Linux). Signed-off-by: Robin Getz <robin.getz@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2009-09-24 22:11:24 +08:00
* Licensed under the GPL-2 or later
blackfin architecture This adds support for the Analog Devices Blackfin processor architecture, and currently supports the BF533, BF532, BF531, BF537, BF536, BF534, and BF561 (Dual Core) devices, with a variety of development platforms including those avaliable from Analog Devices (BF533-EZKit, BF533-STAMP, BF537-STAMP, BF561-EZKIT), and Bluetechnix! Tinyboards. The Blackfin architecture was jointly developed by Intel and Analog Devices Inc. (ADI) as the Micro Signal Architecture (MSA) core and introduced it in December of 2000. Since then ADI has put this core into its Blackfin processor family of devices. The Blackfin core has the advantages of a clean, orthogonal,RISC-like microprocessor instruction set. It combines a dual-MAC (Multiply/Accumulate), state-of-the-art signal processing engine and single-instruction, multiple-data (SIMD) multimedia capabilities into a single instruction-set architecture. The Blackfin architecture, including the instruction set, is described by the ADSP-BF53x/BF56x Blackfin Processor Programming Reference http://blackfin.uclinux.org/gf/download/frsrelease/29/2549/Blackfin_PRM.pdf The Blackfin processor is already supported by major releases of gcc, and there are binary and source rpms/tarballs for many architectures at: http://blackfin.uclinux.org/gf/project/toolchain/frs There is complete documentation, including "getting started" guides available at: http://docs.blackfin.uclinux.org/ which provides links to the sources and patches you will need in order to set up a cross-compiling environment for bfin-linux-uclibc This patch, as well as the other patches (toolchain, distribution, uClibc) are actively supported by Analog Devices Inc, at: http://blackfin.uclinux.org/ We have tested this on LTP, and our test plan (including pass/fails) can be found at: http://docs.blackfin.uclinux.org/doku.php?id=testing_the_linux_kernel [m.kozlowski@tuxland.pl: balance parenthesis in blackfin header files] Signed-off-by: Bryan Wu <bryan.wu@analog.com> Signed-off-by: Mariusz Kozlowski <m.kozlowski@tuxland.pl> Signed-off-by: Aubrey Li <aubrey.li@analog.com> Signed-off-by: Jie Zhang <jie.zhang@analog.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-05-07 05:50:22 +08:00
*/
#ifndef _CDEF_BF534_H
#define _CDEF_BF534_H
Blackfin arch: reorganize headers slightly so we can be sure things are defined early enough Signed-off-by: Mike Frysinger <michael.frysinger@analog.com> Signed-off-by: Bryan Wu <bryan.wu@analog.com>
2007-07-25 12:01:19 +08:00
#include <asm/blackfin.h>
blackfin architecture This adds support for the Analog Devices Blackfin processor architecture, and currently supports the BF533, BF532, BF531, BF537, BF536, BF534, and BF561 (Dual Core) devices, with a variety of development platforms including those avaliable from Analog Devices (BF533-EZKit, BF533-STAMP, BF537-STAMP, BF561-EZKIT), and Bluetechnix! Tinyboards. The Blackfin architecture was jointly developed by Intel and Analog Devices Inc. (ADI) as the Micro Signal Architecture (MSA) core and introduced it in December of 2000. Since then ADI has put this core into its Blackfin processor family of devices. The Blackfin core has the advantages of a clean, orthogonal,RISC-like microprocessor instruction set. It combines a dual-MAC (Multiply/Accumulate), state-of-the-art signal processing engine and single-instruction, multiple-data (SIMD) multimedia capabilities into a single instruction-set architecture. The Blackfin architecture, including the instruction set, is described by the ADSP-BF53x/BF56x Blackfin Processor Programming Reference http://blackfin.uclinux.org/gf/download/frsrelease/29/2549/Blackfin_PRM.pdf The Blackfin processor is already supported by major releases of gcc, and there are binary and source rpms/tarballs for many architectures at: http://blackfin.uclinux.org/gf/project/toolchain/frs There is complete documentation, including "getting started" guides available at: http://docs.blackfin.uclinux.org/ which provides links to the sources and patches you will need in order to set up a cross-compiling environment for bfin-linux-uclibc This patch, as well as the other patches (toolchain, distribution, uClibc) are actively supported by Analog Devices Inc, at: http://blackfin.uclinux.org/ We have tested this on LTP, and our test plan (including pass/fails) can be found at: http://docs.blackfin.uclinux.org/doku.php?id=testing_the_linux_kernel [m.kozlowski@tuxland.pl: balance parenthesis in blackfin header files] Signed-off-by: Bryan Wu <bryan.wu@analog.com> Signed-off-by: Mariusz Kozlowski <m.kozlowski@tuxland.pl> Signed-off-by: Aubrey Li <aubrey.li@analog.com> Signed-off-by: Jie Zhang <jie.zhang@analog.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-05-07 05:50:22 +08:00
/* Include all Core registers and bit definitions */
#include "defBF534.h"
/* Include core specific register pointer definitions */
Blackfin arch: move include/asm-blackfin header files to arch/blackfin Signed-off-by: Bryan Wu <cooloney@kernel.org>
2008-08-27 10:51:02 +08:00
#include <asm/cdef_LPBlackfin.h>
blackfin architecture This adds support for the Analog Devices Blackfin processor architecture, and currently supports the BF533, BF532, BF531, BF537, BF536, BF534, and BF561 (Dual Core) devices, with a variety of development platforms including those avaliable from Analog Devices (BF533-EZKit, BF533-STAMP, BF537-STAMP, BF561-EZKIT), and Bluetechnix! Tinyboards. The Blackfin architecture was jointly developed by Intel and Analog Devices Inc. (ADI) as the Micro Signal Architecture (MSA) core and introduced it in December of 2000. Since then ADI has put this core into its Blackfin processor family of devices. The Blackfin core has the advantages of a clean, orthogonal,RISC-like microprocessor instruction set. It combines a dual-MAC (Multiply/Accumulate), state-of-the-art signal processing engine and single-instruction, multiple-data (SIMD) multimedia capabilities into a single instruction-set architecture. The Blackfin architecture, including the instruction set, is described by the ADSP-BF53x/BF56x Blackfin Processor Programming Reference http://blackfin.uclinux.org/gf/download/frsrelease/29/2549/Blackfin_PRM.pdf The Blackfin processor is already supported by major releases of gcc, and there are binary and source rpms/tarballs for many architectures at: http://blackfin.uclinux.org/gf/project/toolchain/frs There is complete documentation, including "getting started" guides available at: http://docs.blackfin.uclinux.org/ which provides links to the sources and patches you will need in order to set up a cross-compiling environment for bfin-linux-uclibc This patch, as well as the other patches (toolchain, distribution, uClibc) are actively supported by Analog Devices Inc, at: http://blackfin.uclinux.org/ We have tested this on LTP, and our test plan (including pass/fails) can be found at: http://docs.blackfin.uclinux.org/doku.php?id=testing_the_linux_kernel [m.kozlowski@tuxland.pl: balance parenthesis in blackfin header files] Signed-off-by: Bryan Wu <bryan.wu@analog.com> Signed-off-by: Mariusz Kozlowski <m.kozlowski@tuxland.pl> Signed-off-by: Aubrey Li <aubrey.li@analog.com> Signed-off-by: Jie Zhang <jie.zhang@analog.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-05-07 05:50:22 +08:00
/* Clock and System Control (0xFFC00000 - 0xFFC000FF) */
#define bfin_read_PLL_CTL() bfin_read16(PLL_CTL)
#define bfin_read_PLL_DIV() bfin_read16(PLL_DIV)
#define bfin_write_PLL_DIV(val) bfin_write16(PLL_DIV,val)
#define bfin_read_VR_CTL() bfin_read16(VR_CTL)
#define bfin_read_PLL_STAT() bfin_read16(PLL_STAT)
#define bfin_write_PLL_STAT(val) bfin_write16(PLL_STAT,val)
#define bfin_read_PLL_LOCKCNT() bfin_read16(PLL_LOCKCNT)
#define bfin_write_PLL_LOCKCNT(val) bfin_write16(PLL_LOCKCNT,val)
#define bfin_read_CHIPID() bfin_read32(CHIPID)
/* System Interrupt Controller (0xFFC00100 - 0xFFC001FF) */
#define bfin_read_SWRST() bfin_read16(SWRST)
#define bfin_write_SWRST(val) bfin_write16(SWRST,val)
#define bfin_read_SYSCR() bfin_read16(SYSCR)
#define bfin_write_SYSCR(val) bfin_write16(SYSCR,val)
#define bfin_read_SIC_RVECT() bfin_read32(SIC_RVECT)
#define bfin_write_SIC_RVECT(val) bfin_write32(SIC_RVECT,val)
#define bfin_read_SIC_IMASK() bfin_read32(SIC_IMASK)
#define bfin_write_SIC_IMASK(val) bfin_write32(SIC_IMASK,val)
#define bfin_read_SIC_IAR0() bfin_read32(SIC_IAR0)
#define bfin_write_SIC_IAR0(val) bfin_write32(SIC_IAR0,val)
#define bfin_read_SIC_IAR1() bfin_read32(SIC_IAR1)
#define bfin_write_SIC_IAR1(val) bfin_write32(SIC_IAR1,val)
#define bfin_read_SIC_IAR2() bfin_read32(SIC_IAR2)
#define bfin_write_SIC_IAR2(val) bfin_write32(SIC_IAR2,val)
#define bfin_read_SIC_IAR3() bfin_read32(SIC_IAR3)
#define bfin_write_SIC_IAR3(val) bfin_write32(SIC_IAR3,val)
#define bfin_read_SIC_ISR() bfin_read32(SIC_ISR)
#define bfin_write_SIC_ISR(val) bfin_write32(SIC_ISR,val)
#define bfin_read_SIC_IWR() bfin_read32(SIC_IWR)
#define bfin_write_SIC_IWR(val) bfin_write32(SIC_IWR,val)
/* Watchdog Timer (0xFFC00200 - 0xFFC002FF) */
#define bfin_read_WDOG_CTL() bfin_read16(WDOG_CTL)
#define bfin_write_WDOG_CTL(val) bfin_write16(WDOG_CTL,val)
#define bfin_read_WDOG_CNT() bfin_read32(WDOG_CNT)
#define bfin_write_WDOG_CNT(val) bfin_write32(WDOG_CNT,val)
#define bfin_read_WDOG_STAT() bfin_read32(WDOG_STAT)
#define bfin_write_WDOG_STAT(val) bfin_write32(WDOG_STAT,val)
/* Real Time Clock (0xFFC00300 - 0xFFC003FF) */
#define bfin_read_RTC_STAT() bfin_read32(RTC_STAT)
#define bfin_write_RTC_STAT(val) bfin_write32(RTC_STAT,val)
#define bfin_read_RTC_ICTL() bfin_read16(RTC_ICTL)
#define bfin_write_RTC_ICTL(val) bfin_write16(RTC_ICTL,val)
#define bfin_read_RTC_ISTAT() bfin_read16(RTC_ISTAT)
#define bfin_write_RTC_ISTAT(val) bfin_write16(RTC_ISTAT,val)
#define bfin_read_RTC_SWCNT() bfin_read16(RTC_SWCNT)
#define bfin_write_RTC_SWCNT(val) bfin_write16(RTC_SWCNT,val)
#define bfin_read_RTC_ALARM() bfin_read32(RTC_ALARM)
#define bfin_write_RTC_ALARM(val) bfin_write32(RTC_ALARM,val)
#define bfin_read_RTC_FAST() bfin_read16(RTC_FAST)
#define bfin_write_RTC_FAST(val) bfin_write16(RTC_FAST,val)
#define bfin_read_RTC_PREN() bfin_read16(RTC_PREN)
#define bfin_write_RTC_PREN(val) bfin_write16(RTC_PREN,val)
/* UART0 Controller (0xFFC00400 - 0xFFC004FF) */
#define bfin_read_UART0_THR() bfin_read16(UART0_THR)
#define bfin_write_UART0_THR(val) bfin_write16(UART0_THR,val)
#define bfin_read_UART0_RBR() bfin_read16(UART0_RBR)
#define bfin_write_UART0_RBR(val) bfin_write16(UART0_RBR,val)
#define bfin_read_UART0_DLL() bfin_read16(UART0_DLL)
#define bfin_write_UART0_DLL(val) bfin_write16(UART0_DLL,val)
#define bfin_read_UART0_IER() bfin_read16(UART0_IER)
#define bfin_write_UART0_IER(val) bfin_write16(UART0_IER,val)
#define bfin_read_UART0_DLH() bfin_read16(UART0_DLH)
#define bfin_write_UART0_DLH(val) bfin_write16(UART0_DLH,val)
#define bfin_read_UART0_IIR() bfin_read16(UART0_IIR)
#define bfin_write_UART0_IIR(val) bfin_write16(UART0_IIR,val)
#define bfin_read_UART0_LCR() bfin_read16(UART0_LCR)
#define bfin_write_UART0_LCR(val) bfin_write16(UART0_LCR,val)
#define bfin_read_UART0_MCR() bfin_read16(UART0_MCR)
#define bfin_write_UART0_MCR(val) bfin_write16(UART0_MCR,val)
#define bfin_read_UART0_LSR() bfin_read16(UART0_LSR)
#define bfin_write_UART0_LSR(val) bfin_write16(UART0_LSR,val)
#define bfin_read_UART0_MSR() bfin_read16(UART0_MSR)
#define bfin_write_UART0_MSR(val) bfin_write16(UART0_MSR,val)
#define bfin_read_UART0_SCR() bfin_read16(UART0_SCR)
#define bfin_write_UART0_SCR(val) bfin_write16(UART0_SCR,val)
#define bfin_read_UART0_GCTL() bfin_read16(UART0_GCTL)
#define bfin_write_UART0_GCTL(val) bfin_write16(UART0_GCTL,val)
/* SPI Controller (0xFFC00500 - 0xFFC005FF) */
#define bfin_read_SPI_CTL() bfin_read16(SPI_CTL)
#define bfin_write_SPI_CTL(val) bfin_write16(SPI_CTL,val)
#define bfin_read_SPI_FLG() bfin_read16(SPI_FLG)
#define bfin_write_SPI_FLG(val) bfin_write16(SPI_FLG,val)
#define bfin_read_SPI_STAT() bfin_read16(SPI_STAT)
#define bfin_write_SPI_STAT(val) bfin_write16(SPI_STAT,val)
#define bfin_read_SPI_TDBR() bfin_read16(SPI_TDBR)
#define bfin_write_SPI_TDBR(val) bfin_write16(SPI_TDBR,val)
#define bfin_read_SPI_RDBR() bfin_read16(SPI_RDBR)
#define bfin_write_SPI_RDBR(val) bfin_write16(SPI_RDBR,val)
#define bfin_read_SPI_BAUD() bfin_read16(SPI_BAUD)
#define bfin_write_SPI_BAUD(val) bfin_write16(SPI_BAUD,val)
#define bfin_read_SPI_SHADOW() bfin_read16(SPI_SHADOW)
#define bfin_write_SPI_SHADOW(val) bfin_write16(SPI_SHADOW,val)
/* TIMER0-7 Registers (0xFFC00600 - 0xFFC006FF) */
#define bfin_read_TIMER0_CONFIG() bfin_read16(TIMER0_CONFIG)
#define bfin_write_TIMER0_CONFIG(val) bfin_write16(TIMER0_CONFIG,val)
#define bfin_read_TIMER0_COUNTER() bfin_read32(TIMER0_COUNTER)
#define bfin_write_TIMER0_COUNTER(val) bfin_write32(TIMER0_COUNTER,val)
#define bfin_read_TIMER0_PERIOD() bfin_read32(TIMER0_PERIOD)
#define bfin_write_TIMER0_PERIOD(val) bfin_write32(TIMER0_PERIOD,val)
#define bfin_read_TIMER0_WIDTH() bfin_read32(TIMER0_WIDTH)
#define bfin_write_TIMER0_WIDTH(val) bfin_write32(TIMER0_WIDTH,val)
#define bfin_read_TIMER1_CONFIG() bfin_read16(TIMER1_CONFIG)
#define bfin_write_TIMER1_CONFIG(val) bfin_write16(TIMER1_CONFIG,val)
#define bfin_read_TIMER1_COUNTER() bfin_read32(TIMER1_COUNTER)
#define bfin_write_TIMER1_COUNTER(val) bfin_write32(TIMER1_COUNTER,val)
#define bfin_read_TIMER1_PERIOD() bfin_read32(TIMER1_PERIOD)
#define bfin_write_TIMER1_PERIOD(val) bfin_write32(TIMER1_PERIOD,val)
#define bfin_read_TIMER1_WIDTH() bfin_read32(TIMER1_WIDTH)
#define bfin_write_TIMER1_WIDTH(val) bfin_write32(TIMER1_WIDTH,val)
#define bfin_read_TIMER2_CONFIG() bfin_read16(TIMER2_CONFIG)
#define bfin_write_TIMER2_CONFIG(val) bfin_write16(TIMER2_CONFIG,val)
#define bfin_read_TIMER2_COUNTER() bfin_read32(TIMER2_COUNTER)
#define bfin_write_TIMER2_COUNTER(val) bfin_write32(TIMER2_COUNTER,val)
#define bfin_read_TIMER2_PERIOD() bfin_read32(TIMER2_PERIOD)
#define bfin_write_TIMER2_PERIOD(val) bfin_write32(TIMER2_PERIOD,val)
#define bfin_read_TIMER2_WIDTH() bfin_read32(TIMER2_WIDTH)
#define bfin_write_TIMER2_WIDTH(val) bfin_write32(TIMER2_WIDTH,val)
#define bfin_read_TIMER3_CONFIG() bfin_read16(TIMER3_CONFIG)
#define bfin_write_TIMER3_CONFIG(val) bfin_write16(TIMER3_CONFIG,val)
#define bfin_read_TIMER3_COUNTER() bfin_read32(TIMER3_COUNTER)
#define bfin_write_TIMER3_COUNTER(val) bfin_write32(TIMER3_COUNTER,val)
#define bfin_read_TIMER3_PERIOD() bfin_read32(TIMER3_PERIOD)
#define bfin_write_TIMER3_PERIOD(val) bfin_write32(TIMER3_PERIOD,val)
#define bfin_read_TIMER3_WIDTH() bfin_read32(TIMER3_WIDTH)
#define bfin_write_TIMER3_WIDTH(val) bfin_write32(TIMER3_WIDTH,val)
#define bfin_read_TIMER4_CONFIG() bfin_read16(TIMER4_CONFIG)
#define bfin_write_TIMER4_CONFIG(val) bfin_write16(TIMER4_CONFIG,val)
#define bfin_read_TIMER4_COUNTER() bfin_read32(TIMER4_COUNTER)
#define bfin_write_TIMER4_COUNTER(val) bfin_write32(TIMER4_COUNTER,val)
#define bfin_read_TIMER4_PERIOD() bfin_read32(TIMER4_PERIOD)
#define bfin_write_TIMER4_PERIOD(val) bfin_write32(TIMER4_PERIOD,val)
#define bfin_read_TIMER4_WIDTH() bfin_read32(TIMER4_WIDTH)
#define bfin_write_TIMER4_WIDTH(val) bfin_write32(TIMER4_WIDTH,val)
#define bfin_read_TIMER5_CONFIG() bfin_read16(TIMER5_CONFIG)
#define bfin_write_TIMER5_CONFIG(val) bfin_write16(TIMER5_CONFIG,val)
#define bfin_read_TIMER5_COUNTER() bfin_read32(TIMER5_COUNTER)
#define bfin_write_TIMER5_COUNTER(val) bfin_write32(TIMER5_COUNTER,val)
#define bfin_read_TIMER5_PERIOD() bfin_read32(TIMER5_PERIOD)
#define bfin_write_TIMER5_PERIOD(val) bfin_write32(TIMER5_PERIOD,val)
#define bfin_read_TIMER5_WIDTH() bfin_read32(TIMER5_WIDTH)
#define bfin_write_TIMER5_WIDTH(val) bfin_write32(TIMER5_WIDTH,val)
#define bfin_read_TIMER6_CONFIG() bfin_read16(TIMER6_CONFIG)
#define bfin_write_TIMER6_CONFIG(val) bfin_write16(TIMER6_CONFIG,val)
#define bfin_read_TIMER6_COUNTER() bfin_read32(TIMER6_COUNTER)
#define bfin_write_TIMER6_COUNTER(val) bfin_write32(TIMER6_COUNTER,val)
#define bfin_read_TIMER6_PERIOD() bfin_read32(TIMER6_PERIOD)
#define bfin_write_TIMER6_PERIOD(val) bfin_write32(TIMER6_PERIOD,val)
#define bfin_read_TIMER6_WIDTH() bfin_read32(TIMER6_WIDTH)
#define bfin_write_TIMER6_WIDTH(val) bfin_write32(TIMER6_WIDTH,val)
#define bfin_read_TIMER7_CONFIG() bfin_read16(TIMER7_CONFIG)
#define bfin_write_TIMER7_CONFIG(val) bfin_write16(TIMER7_CONFIG,val)
#define bfin_read_TIMER7_COUNTER() bfin_read32(TIMER7_COUNTER)
#define bfin_write_TIMER7_COUNTER(val) bfin_write32(TIMER7_COUNTER,val)
#define bfin_read_TIMER7_PERIOD() bfin_read32(TIMER7_PERIOD)
#define bfin_write_TIMER7_PERIOD(val) bfin_write32(TIMER7_PERIOD,val)
#define bfin_read_TIMER7_WIDTH() bfin_read32(TIMER7_WIDTH)
#define bfin_write_TIMER7_WIDTH(val) bfin_write32(TIMER7_WIDTH,val)
#define bfin_read_TIMER_ENABLE() bfin_read16(TIMER_ENABLE)
#define bfin_write_TIMER_ENABLE(val) bfin_write16(TIMER_ENABLE,val)
#define bfin_read_TIMER_DISABLE() bfin_read16(TIMER_DISABLE)
#define bfin_write_TIMER_DISABLE(val) bfin_write16(TIMER_DISABLE,val)
#define bfin_read_TIMER_STATUS() bfin_read32(TIMER_STATUS)
#define bfin_write_TIMER_STATUS(val) bfin_write32(TIMER_STATUS,val)
/* General Purpose I/O Port F (0xFFC00700 - 0xFFC007FF) */
#define bfin_read_PORTFIO() bfin_read16(PORTFIO)
#define bfin_write_PORTFIO(val) bfin_write16(PORTFIO,val)
#define bfin_read_PORTFIO_CLEAR() bfin_read16(PORTFIO_CLEAR)
#define bfin_write_PORTFIO_CLEAR(val) bfin_write16(PORTFIO_CLEAR,val)
#define bfin_read_PORTFIO_SET() bfin_read16(PORTFIO_SET)
#define bfin_write_PORTFIO_SET(val) bfin_write16(PORTFIO_SET,val)
#define bfin_read_PORTFIO_TOGGLE() bfin_read16(PORTFIO_TOGGLE)
#define bfin_write_PORTFIO_TOGGLE(val) bfin_write16(PORTFIO_TOGGLE,val)
#define bfin_read_PORTFIO_MASKA() bfin_read16(PORTFIO_MASKA)
#define bfin_write_PORTFIO_MASKA(val) bfin_write16(PORTFIO_MASKA,val)
#define bfin_read_PORTFIO_MASKA_CLEAR() bfin_read16(PORTFIO_MASKA_CLEAR)
#define bfin_write_PORTFIO_MASKA_CLEAR(val) bfin_write16(PORTFIO_MASKA_CLEAR,val)
#define bfin_read_PORTFIO_MASKA_SET() bfin_read16(PORTFIO_MASKA_SET)
#define bfin_write_PORTFIO_MASKA_SET(val) bfin_write16(PORTFIO_MASKA_SET,val)
#define bfin_read_PORTFIO_MASKA_TOGGLE() bfin_read16(PORTFIO_MASKA_TOGGLE)
#define bfin_write_PORTFIO_MASKA_TOGGLE(val) bfin_write16(PORTFIO_MASKA_TOGGLE,val)
#define bfin_read_PORTFIO_MASKB() bfin_read16(PORTFIO_MASKB)
#define bfin_write_PORTFIO_MASKB(val) bfin_write16(PORTFIO_MASKB,val)
#define bfin_read_PORTFIO_MASKB_CLEAR() bfin_read16(PORTFIO_MASKB_CLEAR)
#define bfin_write_PORTFIO_MASKB_CLEAR(val) bfin_write16(PORTFIO_MASKB_CLEAR,val)
#define bfin_read_PORTFIO_MASKB_SET() bfin_read16(PORTFIO_MASKB_SET)
#define bfin_write_PORTFIO_MASKB_SET(val) bfin_write16(PORTFIO_MASKB_SET,val)
#define bfin_read_PORTFIO_MASKB_TOGGLE() bfin_read16(PORTFIO_MASKB_TOGGLE)
#define bfin_write_PORTFIO_MASKB_TOGGLE(val) bfin_write16(PORTFIO_MASKB_TOGGLE,val)
#define bfin_read_PORTFIO_DIR() bfin_read16(PORTFIO_DIR)
#define bfin_write_PORTFIO_DIR(val) bfin_write16(PORTFIO_DIR,val)
#define bfin_read_PORTFIO_POLAR() bfin_read16(PORTFIO_POLAR)
#define bfin_write_PORTFIO_POLAR(val) bfin_write16(PORTFIO_POLAR,val)
#define bfin_read_PORTFIO_EDGE() bfin_read16(PORTFIO_EDGE)
#define bfin_write_PORTFIO_EDGE(val) bfin_write16(PORTFIO_EDGE,val)
#define bfin_read_PORTFIO_BOTH() bfin_read16(PORTFIO_BOTH)
#define bfin_write_PORTFIO_BOTH(val) bfin_write16(PORTFIO_BOTH,val)
#define bfin_read_PORTFIO_INEN() bfin_read16(PORTFIO_INEN)
#define bfin_write_PORTFIO_INEN(val) bfin_write16(PORTFIO_INEN,val)
/* SPORT0 Controller (0xFFC00800 - 0xFFC008FF) */
#define bfin_read_SPORT0_TCR1() bfin_read16(SPORT0_TCR1)
#define bfin_write_SPORT0_TCR1(val) bfin_write16(SPORT0_TCR1,val)
#define bfin_read_SPORT0_TCR2() bfin_read16(SPORT0_TCR2)
#define bfin_write_SPORT0_TCR2(val) bfin_write16(SPORT0_TCR2,val)
#define bfin_read_SPORT0_TCLKDIV() bfin_read16(SPORT0_TCLKDIV)
#define bfin_write_SPORT0_TCLKDIV(val) bfin_write16(SPORT0_TCLKDIV,val)
#define bfin_read_SPORT0_TFSDIV() bfin_read16(SPORT0_TFSDIV)
#define bfin_write_SPORT0_TFSDIV(val) bfin_write16(SPORT0_TFSDIV,val)
#define bfin_read_SPORT0_TX() bfin_read32(SPORT0_TX)
#define bfin_write_SPORT0_TX(val) bfin_write32(SPORT0_TX,val)
#define bfin_read_SPORT0_RX() bfin_read32(SPORT0_RX)
#define bfin_write_SPORT0_RX(val) bfin_write32(SPORT0_RX,val)
#define bfin_read_SPORT0_TX32() bfin_read32(SPORT0_TX)
#define bfin_write_SPORT0_TX32(val) bfin_write32(SPORT0_TX,val)
#define bfin_read_SPORT0_RX32() bfin_read32(SPORT0_RX)
#define bfin_write_SPORT0_RX32(val) bfin_write32(SPORT0_RX,val)
#define bfin_read_SPORT0_TX16() bfin_read16(SPORT0_TX)
#define bfin_write_SPORT0_TX16(val) bfin_write16(SPORT0_TX,val)
#define bfin_read_SPORT0_RX16() bfin_read16(SPORT0_RX)
#define bfin_write_SPORT0_RX16(val) bfin_write16(SPORT0_RX,val)
#define bfin_read_SPORT0_RCR1() bfin_read16(SPORT0_RCR1)
#define bfin_write_SPORT0_RCR1(val) bfin_write16(SPORT0_RCR1,val)
#define bfin_read_SPORT0_RCR2() bfin_read16(SPORT0_RCR2)
#define bfin_write_SPORT0_RCR2(val) bfin_write16(SPORT0_RCR2,val)
#define bfin_read_SPORT0_RCLKDIV() bfin_read16(SPORT0_RCLKDIV)
#define bfin_write_SPORT0_RCLKDIV(val) bfin_write16(SPORT0_RCLKDIV,val)
#define bfin_read_SPORT0_RFSDIV() bfin_read16(SPORT0_RFSDIV)
#define bfin_write_SPORT0_RFSDIV(val) bfin_write16(SPORT0_RFSDIV,val)
#define bfin_read_SPORT0_STAT() bfin_read16(SPORT0_STAT)
#define bfin_write_SPORT0_STAT(val) bfin_write16(SPORT0_STAT,val)
#define bfin_read_SPORT0_CHNL() bfin_read16(SPORT0_CHNL)
#define bfin_write_SPORT0_CHNL(val) bfin_write16(SPORT0_CHNL,val)
#define bfin_read_SPORT0_MCMC1() bfin_read16(SPORT0_MCMC1)
#define bfin_write_SPORT0_MCMC1(val) bfin_write16(SPORT0_MCMC1,val)
#define bfin_read_SPORT0_MCMC2() bfin_read16(SPORT0_MCMC2)
#define bfin_write_SPORT0_MCMC2(val) bfin_write16(SPORT0_MCMC2,val)
#define bfin_read_SPORT0_MTCS0() bfin_read32(SPORT0_MTCS0)
#define bfin_write_SPORT0_MTCS0(val) bfin_write32(SPORT0_MTCS0,val)
#define bfin_read_SPORT0_MTCS1() bfin_read32(SPORT0_MTCS1)
#define bfin_write_SPORT0_MTCS1(val) bfin_write32(SPORT0_MTCS1,val)
#define bfin_read_SPORT0_MTCS2() bfin_read32(SPORT0_MTCS2)
#define bfin_write_SPORT0_MTCS2(val) bfin_write32(SPORT0_MTCS2,val)
#define bfin_read_SPORT0_MTCS3() bfin_read32(SPORT0_MTCS3)
#define bfin_write_SPORT0_MTCS3(val) bfin_write32(SPORT0_MTCS3,val)
#define bfin_read_SPORT0_MRCS0() bfin_read32(SPORT0_MRCS0)
#define bfin_write_SPORT0_MRCS0(val) bfin_write32(SPORT0_MRCS0,val)
#define bfin_read_SPORT0_MRCS1() bfin_read32(SPORT0_MRCS1)
#define bfin_write_SPORT0_MRCS1(val) bfin_write32(SPORT0_MRCS1,val)
#define bfin_read_SPORT0_MRCS2() bfin_read32(SPORT0_MRCS2)
#define bfin_write_SPORT0_MRCS2(val) bfin_write32(SPORT0_MRCS2,val)
#define bfin_read_SPORT0_MRCS3() bfin_read32(SPORT0_MRCS3)
#define bfin_write_SPORT0_MRCS3(val) bfin_write32(SPORT0_MRCS3,val)
/* SPORT1 Controller (0xFFC00900 - 0xFFC009FF) */
#define bfin_read_SPORT1_TCR1() bfin_read16(SPORT1_TCR1)
#define bfin_write_SPORT1_TCR1(val) bfin_write16(SPORT1_TCR1,val)
#define bfin_read_SPORT1_TCR2() bfin_read16(SPORT1_TCR2)
#define bfin_write_SPORT1_TCR2(val) bfin_write16(SPORT1_TCR2,val)
#define bfin_read_SPORT1_TCLKDIV() bfin_read16(SPORT1_TCLKDIV)
#define bfin_write_SPORT1_TCLKDIV(val) bfin_write16(SPORT1_TCLKDIV,val)
#define bfin_read_SPORT1_TFSDIV() bfin_read16(SPORT1_TFSDIV)
#define bfin_write_SPORT1_TFSDIV(val) bfin_write16(SPORT1_TFSDIV,val)
#define bfin_read_SPORT1_TX() bfin_read32(SPORT1_TX)
#define bfin_write_SPORT1_TX(val) bfin_write32(SPORT1_TX,val)
#define bfin_read_SPORT1_RX() bfin_read32(SPORT1_RX)
#define bfin_write_SPORT1_RX(val) bfin_write32(SPORT1_RX,val)
#define bfin_read_SPORT1_TX32() bfin_read32(SPORT1_TX)
#define bfin_write_SPORT1_TX32(val) bfin_write32(SPORT1_TX,val)
#define bfin_read_SPORT1_RX32() bfin_read32(SPORT1_RX)
#define bfin_write_SPORT1_RX32(val) bfin_write32(SPORT1_RX,val)
#define bfin_read_SPORT1_TX16() bfin_read16(SPORT1_TX)
#define bfin_write_SPORT1_TX16(val) bfin_write16(SPORT1_TX,val)
#define bfin_read_SPORT1_RX16() bfin_read16(SPORT1_RX)
#define bfin_write_SPORT1_RX16(val) bfin_write16(SPORT1_RX,val)
#define bfin_read_SPORT1_RCR1() bfin_read16(SPORT1_RCR1)
#define bfin_write_SPORT1_RCR1(val) bfin_write16(SPORT1_RCR1,val)
#define bfin_read_SPORT1_RCR2() bfin_read16(SPORT1_RCR2)
#define bfin_write_SPORT1_RCR2(val) bfin_write16(SPORT1_RCR2,val)
#define bfin_read_SPORT1_RCLKDIV() bfin_read16(SPORT1_RCLKDIV)
#define bfin_write_SPORT1_RCLKDIV(val) bfin_write16(SPORT1_RCLKDIV,val)
#define bfin_read_SPORT1_RFSDIV() bfin_read16(SPORT1_RFSDIV)
#define bfin_write_SPORT1_RFSDIV(val) bfin_write16(SPORT1_RFSDIV,val)
#define bfin_read_SPORT1_STAT() bfin_read16(SPORT1_STAT)
#define bfin_write_SPORT1_STAT(val) bfin_write16(SPORT1_STAT,val)
#define bfin_read_SPORT1_CHNL() bfin_read16(SPORT1_CHNL)
#define bfin_write_SPORT1_CHNL(val) bfin_write16(SPORT1_CHNL,val)
#define bfin_read_SPORT1_MCMC1() bfin_read16(SPORT1_MCMC1)
#define bfin_write_SPORT1_MCMC1(val) bfin_write16(SPORT1_MCMC1,val)
#define bfin_read_SPORT1_MCMC2() bfin_read16(SPORT1_MCMC2)
#define bfin_write_SPORT1_MCMC2(val) bfin_write16(SPORT1_MCMC2,val)
#define bfin_read_SPORT1_MTCS0() bfin_read32(SPORT1_MTCS0)
#define bfin_write_SPORT1_MTCS0(val) bfin_write32(SPORT1_MTCS0,val)
#define bfin_read_SPORT1_MTCS1() bfin_read32(SPORT1_MTCS1)
#define bfin_write_SPORT1_MTCS1(val) bfin_write32(SPORT1_MTCS1,val)
#define bfin_read_SPORT1_MTCS2() bfin_read32(SPORT1_MTCS2)
#define bfin_write_SPORT1_MTCS2(val) bfin_write32(SPORT1_MTCS2,val)
#define bfin_read_SPORT1_MTCS3() bfin_read32(SPORT1_MTCS3)
#define bfin_write_SPORT1_MTCS3(val) bfin_write32(SPORT1_MTCS3,val)
#define bfin_read_SPORT1_MRCS0() bfin_read32(SPORT1_MRCS0)
#define bfin_write_SPORT1_MRCS0(val) bfin_write32(SPORT1_MRCS0,val)
#define bfin_read_SPORT1_MRCS1() bfin_read32(SPORT1_MRCS1)
#define bfin_write_SPORT1_MRCS1(val) bfin_write32(SPORT1_MRCS1,val)
#define bfin_read_SPORT1_MRCS2() bfin_read32(SPORT1_MRCS2)
#define bfin_write_SPORT1_MRCS2(val) bfin_write32(SPORT1_MRCS2,val)
#define bfin_read_SPORT1_MRCS3() bfin_read32(SPORT1_MRCS3)
#define bfin_write_SPORT1_MRCS3(val) bfin_write32(SPORT1_MRCS3,val)
/* External Bus Interface Unit (0xFFC00A00 - 0xFFC00AFF) */
#define bfin_read_EBIU_AMGCTL() bfin_read16(EBIU_AMGCTL)
#define bfin_write_EBIU_AMGCTL(val) bfin_write16(EBIU_AMGCTL,val)
#define bfin_read_EBIU_AMBCTL0() bfin_read32(EBIU_AMBCTL0)
#define bfin_write_EBIU_AMBCTL0(val) bfin_write32(EBIU_AMBCTL0,val)
#define bfin_read_EBIU_AMBCTL1() bfin_read32(EBIU_AMBCTL1)
#define bfin_write_EBIU_AMBCTL1(val) bfin_write32(EBIU_AMBCTL1,val)
#define bfin_read_EBIU_SDGCTL() bfin_read32(EBIU_SDGCTL)
#define bfin_write_EBIU_SDGCTL(val) bfin_write32(EBIU_SDGCTL,val)
#define bfin_read_EBIU_SDBCTL() bfin_read16(EBIU_SDBCTL)
#define bfin_write_EBIU_SDBCTL(val) bfin_write16(EBIU_SDBCTL,val)
#define bfin_read_EBIU_SDRRC() bfin_read16(EBIU_SDRRC)
#define bfin_write_EBIU_SDRRC(val) bfin_write16(EBIU_SDRRC,val)
#define bfin_read_EBIU_SDSTAT() bfin_read16(EBIU_SDSTAT)
#define bfin_write_EBIU_SDSTAT(val) bfin_write16(EBIU_SDSTAT,val)
/* DMA Traffic Control Registers */
Blackfin arch: update blackfin header files to latest one in VDSP. a) add new processor BF52x/BF54x header files b) update blackfin BF533/BF537/BF561 header files to latest one in VDSP. c) scrub watchdog/rtc masks from headers as we dont need/want them (too generic and the drivers dont use them) Signed-off-by: Mike Frysinger <michael.frysinger@analog.com> Signed-off-by: Roy Huang <roy.huang@analog.com> Signed-off-by: Sonic Zhang <sonic.zhang@analog.com> Signed-off-by: Bryan Wu <bryan.wu@analog.com> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-05-21 18:09:31 +08:00
#define bfin_read_DMA_TC_PER() bfin_read16(DMA_TC_PER)
#define bfin_write_DMA_TC_PER(val) bfin_write16(DMA_TC_PER,val)
#define bfin_read_DMA_TC_CNT() bfin_read16(DMA_TC_CNT)
#define bfin_write_DMA_TC_CNT(val) bfin_write16(DMA_TC_CNT,val)
/* Alternate deprecated register names (below) provided for backwards code compatibility */
blackfin architecture This adds support for the Analog Devices Blackfin processor architecture, and currently supports the BF533, BF532, BF531, BF537, BF536, BF534, and BF561 (Dual Core) devices, with a variety of development platforms including those avaliable from Analog Devices (BF533-EZKit, BF533-STAMP, BF537-STAMP, BF561-EZKIT), and Bluetechnix! Tinyboards. The Blackfin architecture was jointly developed by Intel and Analog Devices Inc. (ADI) as the Micro Signal Architecture (MSA) core and introduced it in December of 2000. Since then ADI has put this core into its Blackfin processor family of devices. The Blackfin core has the advantages of a clean, orthogonal,RISC-like microprocessor instruction set. It combines a dual-MAC (Multiply/Accumulate), state-of-the-art signal processing engine and single-instruction, multiple-data (SIMD) multimedia capabilities into a single instruction-set architecture. The Blackfin architecture, including the instruction set, is described by the ADSP-BF53x/BF56x Blackfin Processor Programming Reference http://blackfin.uclinux.org/gf/download/frsrelease/29/2549/Blackfin_PRM.pdf The Blackfin processor is already supported by major releases of gcc, and there are binary and source rpms/tarballs for many architectures at: http://blackfin.uclinux.org/gf/project/toolchain/frs There is complete documentation, including "getting started" guides available at: http://docs.blackfin.uclinux.org/ which provides links to the sources and patches you will need in order to set up a cross-compiling environment for bfin-linux-uclibc This patch, as well as the other patches (toolchain, distribution, uClibc) are actively supported by Analog Devices Inc, at: http://blackfin.uclinux.org/ We have tested this on LTP, and our test plan (including pass/fails) can be found at: http://docs.blackfin.uclinux.org/doku.php?id=testing_the_linux_kernel [m.kozlowski@tuxland.pl: balance parenthesis in blackfin header files] Signed-off-by: Bryan Wu <bryan.wu@analog.com> Signed-off-by: Mariusz Kozlowski <m.kozlowski@tuxland.pl> Signed-off-by: Aubrey Li <aubrey.li@analog.com> Signed-off-by: Jie Zhang <jie.zhang@analog.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-05-07 05:50:22 +08:00
#define bfin_read_DMA_TCPER() bfin_read16(DMA_TCPER)
#define bfin_write_DMA_TCPER(val) bfin_write16(DMA_TCPER,val)
#define bfin_read_DMA_TCCNT() bfin_read16(DMA_TCCNT)
#define bfin_write_DMA_TCCNT(val) bfin_write16(DMA_TCCNT,val)
/* DMA Controller */
#define bfin_read_DMA0_CONFIG() bfin_read16(DMA0_CONFIG)
#define bfin_write_DMA0_CONFIG(val) bfin_write16(DMA0_CONFIG,val)
#define bfin_read_DMA0_NEXT_DESC_PTR() bfin_read32(DMA0_NEXT_DESC_PTR)
#define bfin_write_DMA0_NEXT_DESC_PTR(val) bfin_write32(DMA0_NEXT_DESC_PTR,val)
#define bfin_read_DMA0_START_ADDR() bfin_read32(DMA0_START_ADDR)
#define bfin_write_DMA0_START_ADDR(val) bfin_write32(DMA0_START_ADDR,val)
#define bfin_read_DMA0_X_COUNT() bfin_read16(DMA0_X_COUNT)
#define bfin_write_DMA0_X_COUNT(val) bfin_write16(DMA0_X_COUNT,val)
#define bfin_read_DMA0_Y_COUNT() bfin_read16(DMA0_Y_COUNT)
#define bfin_write_DMA0_Y_COUNT(val) bfin_write16(DMA0_Y_COUNT,val)
#define bfin_read_DMA0_X_MODIFY() bfin_read16(DMA0_X_MODIFY)
#define bfin_write_DMA0_X_MODIFY(val) bfin_write16(DMA0_X_MODIFY,val)
#define bfin_read_DMA0_Y_MODIFY() bfin_read16(DMA0_Y_MODIFY)
#define bfin_write_DMA0_Y_MODIFY(val) bfin_write16(DMA0_Y_MODIFY,val)
#define bfin_read_DMA0_CURR_DESC_PTR() bfin_read32(DMA0_CURR_DESC_PTR)
#define bfin_write_DMA0_CURR_DESC_PTR(val) bfin_write32(DMA0_CURR_DESC_PTR,val)
#define bfin_read_DMA0_CURR_ADDR() bfin_read32(DMA0_CURR_ADDR)
#define bfin_write_DMA0_CURR_ADDR(val) bfin_write32(DMA0_CURR_ADDR,val)
#define bfin_read_DMA0_CURR_X_COUNT() bfin_read16(DMA0_CURR_X_COUNT)
#define bfin_write_DMA0_CURR_X_COUNT(val) bfin_write16(DMA0_CURR_X_COUNT,val)
#define bfin_read_DMA0_CURR_Y_COUNT() bfin_read16(DMA0_CURR_Y_COUNT)
#define bfin_write_DMA0_CURR_Y_COUNT(val) bfin_write16(DMA0_CURR_Y_COUNT,val)
#define bfin_read_DMA0_IRQ_STATUS() bfin_read16(DMA0_IRQ_STATUS)
#define bfin_write_DMA0_IRQ_STATUS(val) bfin_write16(DMA0_IRQ_STATUS,val)
#define bfin_read_DMA0_PERIPHERAL_MAP() bfin_read16(DMA0_PERIPHERAL_MAP)
#define bfin_write_DMA0_PERIPHERAL_MAP(val) bfin_write16(DMA0_PERIPHERAL_MAP,val)
#define bfin_read_DMA1_CONFIG() bfin_read16(DMA1_CONFIG)
#define bfin_write_DMA1_CONFIG(val) bfin_write16(DMA1_CONFIG,val)
#define bfin_read_DMA1_NEXT_DESC_PTR() bfin_read32(DMA1_NEXT_DESC_PTR)
#define bfin_write_DMA1_NEXT_DESC_PTR(val) bfin_write32(DMA1_NEXT_DESC_PTR,val)
#define bfin_read_DMA1_START_ADDR() bfin_read32(DMA1_START_ADDR)
#define bfin_write_DMA1_START_ADDR(val) bfin_write32(DMA1_START_ADDR,val)
#define bfin_read_DMA1_X_COUNT() bfin_read16(DMA1_X_COUNT)
#define bfin_write_DMA1_X_COUNT(val) bfin_write16(DMA1_X_COUNT,val)
#define bfin_read_DMA1_Y_COUNT() bfin_read16(DMA1_Y_COUNT)
#define bfin_write_DMA1_Y_COUNT(val) bfin_write16(DMA1_Y_COUNT,val)
#define bfin_read_DMA1_X_MODIFY() bfin_read16(DMA1_X_MODIFY)
#define bfin_write_DMA1_X_MODIFY(val) bfin_write16(DMA1_X_MODIFY,val)
#define bfin_read_DMA1_Y_MODIFY() bfin_read16(DMA1_Y_MODIFY)
#define bfin_write_DMA1_Y_MODIFY(val) bfin_write16(DMA1_Y_MODIFY,val)
#define bfin_read_DMA1_CURR_DESC_PTR() bfin_read32(DMA1_CURR_DESC_PTR)
#define bfin_write_DMA1_CURR_DESC_PTR(val) bfin_write32(DMA1_CURR_DESC_PTR,val)
#define bfin_read_DMA1_CURR_ADDR() bfin_read32(DMA1_CURR_ADDR)
#define bfin_write_DMA1_CURR_ADDR(val) bfin_write32(DMA1_CURR_ADDR,val)
#define bfin_read_DMA1_CURR_X_COUNT() bfin_read16(DMA1_CURR_X_COUNT)
#define bfin_write_DMA1_CURR_X_COUNT(val) bfin_write16(DMA1_CURR_X_COUNT,val)
#define bfin_read_DMA1_CURR_Y_COUNT() bfin_read16(DMA1_CURR_Y_COUNT)
#define bfin_write_DMA1_CURR_Y_COUNT(val) bfin_write16(DMA1_CURR_Y_COUNT,val)
#define bfin_read_DMA1_IRQ_STATUS() bfin_read16(DMA1_IRQ_STATUS)
#define bfin_write_DMA1_IRQ_STATUS(val) bfin_write16(DMA1_IRQ_STATUS,val)
#define bfin_read_DMA1_PERIPHERAL_MAP() bfin_read16(DMA1_PERIPHERAL_MAP)
#define bfin_write_DMA1_PERIPHERAL_MAP(val) bfin_write16(DMA1_PERIPHERAL_MAP,val)
#define bfin_read_DMA2_CONFIG() bfin_read16(DMA2_CONFIG)
#define bfin_write_DMA2_CONFIG(val) bfin_write16(DMA2_CONFIG,val)
#define bfin_read_DMA2_NEXT_DESC_PTR() bfin_read32(DMA2_NEXT_DESC_PTR)
#define bfin_write_DMA2_NEXT_DESC_PTR(val) bfin_write32(DMA2_NEXT_DESC_PTR,val)
#define bfin_read_DMA2_START_ADDR() bfin_read32(DMA2_START_ADDR)
#define bfin_write_DMA2_START_ADDR(val) bfin_write32(DMA2_START_ADDR,val)
#define bfin_read_DMA2_X_COUNT() bfin_read16(DMA2_X_COUNT)
#define bfin_write_DMA2_X_COUNT(val) bfin_write16(DMA2_X_COUNT,val)
#define bfin_read_DMA2_Y_COUNT() bfin_read16(DMA2_Y_COUNT)
#define bfin_write_DMA2_Y_COUNT(val) bfin_write16(DMA2_Y_COUNT,val)
#define bfin_read_DMA2_X_MODIFY() bfin_read16(DMA2_X_MODIFY)
#define bfin_write_DMA2_X_MODIFY(val) bfin_write16(DMA2_X_MODIFY,val)
#define bfin_read_DMA2_Y_MODIFY() bfin_read16(DMA2_Y_MODIFY)
#define bfin_write_DMA2_Y_MODIFY(val) bfin_write16(DMA2_Y_MODIFY,val)
#define bfin_read_DMA2_CURR_DESC_PTR() bfin_read32(DMA2_CURR_DESC_PTR)
#define bfin_write_DMA2_CURR_DESC_PTR(val) bfin_write32(DMA2_CURR_DESC_PTR,val)
#define bfin_read_DMA2_CURR_ADDR() bfin_read32(DMA2_CURR_ADDR)
#define bfin_write_DMA2_CURR_ADDR(val) bfin_write32(DMA2_CURR_ADDR,val)
#define bfin_read_DMA2_CURR_X_COUNT() bfin_read16(DMA2_CURR_X_COUNT)
#define bfin_write_DMA2_CURR_X_COUNT(val) bfin_write16(DMA2_CURR_X_COUNT,val)
#define bfin_read_DMA2_CURR_Y_COUNT() bfin_read16(DMA2_CURR_Y_COUNT)
#define bfin_write_DMA2_CURR_Y_COUNT(val) bfin_write16(DMA2_CURR_Y_COUNT,val)
#define bfin_read_DMA2_IRQ_STATUS() bfin_read16(DMA2_IRQ_STATUS)
#define bfin_write_DMA2_IRQ_STATUS(val) bfin_write16(DMA2_IRQ_STATUS,val)
#define bfin_read_DMA2_PERIPHERAL_MAP() bfin_read16(DMA2_PERIPHERAL_MAP)
#define bfin_write_DMA2_PERIPHERAL_MAP(val) bfin_write16(DMA2_PERIPHERAL_MAP,val)
#define bfin_read_DMA3_CONFIG() bfin_read16(DMA3_CONFIG)
#define bfin_write_DMA3_CONFIG(val) bfin_write16(DMA3_CONFIG,val)
#define bfin_read_DMA3_NEXT_DESC_PTR() bfin_read32(DMA3_NEXT_DESC_PTR)
#define bfin_write_DMA3_NEXT_DESC_PTR(val) bfin_write32(DMA3_NEXT_DESC_PTR,val)
#define bfin_read_DMA3_START_ADDR() bfin_read32(DMA3_START_ADDR)
#define bfin_write_DMA3_START_ADDR(val) bfin_write32(DMA3_START_ADDR,val)
#define bfin_read_DMA3_X_COUNT() bfin_read16(DMA3_X_COUNT)
#define bfin_write_DMA3_X_COUNT(val) bfin_write16(DMA3_X_COUNT,val)
#define bfin_read_DMA3_Y_COUNT() bfin_read16(DMA3_Y_COUNT)
#define bfin_write_DMA3_Y_COUNT(val) bfin_write16(DMA3_Y_COUNT,val)
#define bfin_read_DMA3_X_MODIFY() bfin_read16(DMA3_X_MODIFY)
#define bfin_write_DMA3_X_MODIFY(val) bfin_write16(DMA3_X_MODIFY,val)
#define bfin_read_DMA3_Y_MODIFY() bfin_read16(DMA3_Y_MODIFY)
#define bfin_write_DMA3_Y_MODIFY(val) bfin_write16(DMA3_Y_MODIFY,val)
#define bfin_read_DMA3_CURR_DESC_PTR() bfin_read32(DMA3_CURR_DESC_PTR)
#define bfin_write_DMA3_CURR_DESC_PTR(val) bfin_write32(DMA3_CURR_DESC_PTR,val)
#define bfin_read_DMA3_CURR_ADDR() bfin_read32(DMA3_CURR_ADDR)
#define bfin_write_DMA3_CURR_ADDR(val) bfin_write32(DMA3_CURR_ADDR,val)
#define bfin_read_DMA3_CURR_X_COUNT() bfin_read16(DMA3_CURR_X_COUNT)
#define bfin_write_DMA3_CURR_X_COUNT(val) bfin_write16(DMA3_CURR_X_COUNT,val)
#define bfin_read_DMA3_CURR_Y_COUNT() bfin_read16(DMA3_CURR_Y_COUNT)
#define bfin_write_DMA3_CURR_Y_COUNT(val) bfin_write16(DMA3_CURR_Y_COUNT,val)
#define bfin_read_DMA3_IRQ_STATUS() bfin_read16(DMA3_IRQ_STATUS)
#define bfin_write_DMA3_IRQ_STATUS(val) bfin_write16(DMA3_IRQ_STATUS,val)
#define bfin_read_DMA3_PERIPHERAL_MAP() bfin_read16(DMA3_PERIPHERAL_MAP)
#define bfin_write_DMA3_PERIPHERAL_MAP(val) bfin_write16(DMA3_PERIPHERAL_MAP,val)
#define bfin_read_DMA4_CONFIG() bfin_read16(DMA4_CONFIG)
#define bfin_write_DMA4_CONFIG(val) bfin_write16(DMA4_CONFIG,val)
#define bfin_read_DMA4_NEXT_DESC_PTR() bfin_read32(DMA4_NEXT_DESC_PTR)
#define bfin_write_DMA4_NEXT_DESC_PTR(val) bfin_write32(DMA4_NEXT_DESC_PTR,val)
#define bfin_read_DMA4_START_ADDR() bfin_read32(DMA4_START_ADDR)
#define bfin_write_DMA4_START_ADDR(val) bfin_write32(DMA4_START_ADDR,val)
#define bfin_read_DMA4_X_COUNT() bfin_read16(DMA4_X_COUNT)
#define bfin_write_DMA4_X_COUNT(val) bfin_write16(DMA4_X_COUNT,val)
#define bfin_read_DMA4_Y_COUNT() bfin_read16(DMA4_Y_COUNT)
#define bfin_write_DMA4_Y_COUNT(val) bfin_write16(DMA4_Y_COUNT,val)
#define bfin_read_DMA4_X_MODIFY() bfin_read16(DMA4_X_MODIFY)
#define bfin_write_DMA4_X_MODIFY(val) bfin_write16(DMA4_X_MODIFY,val)
#define bfin_read_DMA4_Y_MODIFY() bfin_read16(DMA4_Y_MODIFY)
#define bfin_write_DMA4_Y_MODIFY(val) bfin_write16(DMA4_Y_MODIFY,val)
#define bfin_read_DMA4_CURR_DESC_PTR() bfin_read32(DMA4_CURR_DESC_PTR)
#define bfin_write_DMA4_CURR_DESC_PTR(val) bfin_write32(DMA4_CURR_DESC_PTR,val)
#define bfin_read_DMA4_CURR_ADDR() bfin_read32(DMA4_CURR_ADDR)
#define bfin_write_DMA4_CURR_ADDR(val) bfin_write32(DMA4_CURR_ADDR,val)
#define bfin_read_DMA4_CURR_X_COUNT() bfin_read16(DMA4_CURR_X_COUNT)
#define bfin_write_DMA4_CURR_X_COUNT(val) bfin_write16(DMA4_CURR_X_COUNT,val)
#define bfin_read_DMA4_CURR_Y_COUNT() bfin_read16(DMA4_CURR_Y_COUNT)
#define bfin_write_DMA4_CURR_Y_COUNT(val) bfin_write16(DMA4_CURR_Y_COUNT,val)
#define bfin_read_DMA4_IRQ_STATUS() bfin_read16(DMA4_IRQ_STATUS)
#define bfin_write_DMA4_IRQ_STATUS(val) bfin_write16(DMA4_IRQ_STATUS,val)
#define bfin_read_DMA4_PERIPHERAL_MAP() bfin_read16(DMA4_PERIPHERAL_MAP)
#define bfin_write_DMA4_PERIPHERAL_MAP(val) bfin_write16(DMA4_PERIPHERAL_MAP,val)
#define bfin_read_DMA5_CONFIG() bfin_read16(DMA5_CONFIG)
#define bfin_write_DMA5_CONFIG(val) bfin_write16(DMA5_CONFIG,val)
#define bfin_read_DMA5_NEXT_DESC_PTR() bfin_read32(DMA5_NEXT_DESC_PTR)
#define bfin_write_DMA5_NEXT_DESC_PTR(val) bfin_write32(DMA5_NEXT_DESC_PTR,val)
#define bfin_read_DMA5_START_ADDR() bfin_read32(DMA5_START_ADDR)
#define bfin_write_DMA5_START_ADDR(val) bfin_write32(DMA5_START_ADDR,val)
#define bfin_read_DMA5_X_COUNT() bfin_read16(DMA5_X_COUNT)
#define bfin_write_DMA5_X_COUNT(val) bfin_write16(DMA5_X_COUNT,val)
#define bfin_read_DMA5_Y_COUNT() bfin_read16(DMA5_Y_COUNT)
#define bfin_write_DMA5_Y_COUNT(val) bfin_write16(DMA5_Y_COUNT,val)
#define bfin_read_DMA5_X_MODIFY() bfin_read16(DMA5_X_MODIFY)
#define bfin_write_DMA5_X_MODIFY(val) bfin_write16(DMA5_X_MODIFY,val)
#define bfin_read_DMA5_Y_MODIFY() bfin_read16(DMA5_Y_MODIFY)
#define bfin_write_DMA5_Y_MODIFY(val) bfin_write16(DMA5_Y_MODIFY,val)
#define bfin_read_DMA5_CURR_DESC_PTR() bfin_read32(DMA5_CURR_DESC_PTR)
#define bfin_write_DMA5_CURR_DESC_PTR(val) bfin_write32(DMA5_CURR_DESC_PTR,val)
#define bfin_read_DMA5_CURR_ADDR() bfin_read32(DMA5_CURR_ADDR)
#define bfin_write_DMA5_CURR_ADDR(val) bfin_write32(DMA5_CURR_ADDR,val)
#define bfin_read_DMA5_CURR_X_COUNT() bfin_read16(DMA5_CURR_X_COUNT)
#define bfin_write_DMA5_CURR_X_COUNT(val) bfin_write16(DMA5_CURR_X_COUNT,val)
#define bfin_read_DMA5_CURR_Y_COUNT() bfin_read16(DMA5_CURR_Y_COUNT)
#define bfin_write_DMA5_CURR_Y_COUNT(val) bfin_write16(DMA5_CURR_Y_COUNT,val)
#define bfin_read_DMA5_IRQ_STATUS() bfin_read16(DMA5_IRQ_STATUS)
#define bfin_write_DMA5_IRQ_STATUS(val) bfin_write16(DMA5_IRQ_STATUS,val)
#define bfin_read_DMA5_PERIPHERAL_MAP() bfin_read16(DMA5_PERIPHERAL_MAP)
#define bfin_write_DMA5_PERIPHERAL_MAP(val) bfin_write16(DMA5_PERIPHERAL_MAP,val)
#define bfin_read_DMA6_CONFIG() bfin_read16(DMA6_CONFIG)
#define bfin_write_DMA6_CONFIG(val) bfin_write16(DMA6_CONFIG,val)
#define bfin_read_DMA6_NEXT_DESC_PTR() bfin_read32(DMA6_NEXT_DESC_PTR)
#define bfin_write_DMA6_NEXT_DESC_PTR(val) bfin_write32(DMA6_NEXT_DESC_PTR,val)
#define bfin_read_DMA6_START_ADDR() bfin_read32(DMA6_START_ADDR)
#define bfin_write_DMA6_START_ADDR(val) bfin_write32(DMA6_START_ADDR,val)
#define bfin_read_DMA6_X_COUNT() bfin_read16(DMA6_X_COUNT)
#define bfin_write_DMA6_X_COUNT(val) bfin_write16(DMA6_X_COUNT,val)
#define bfin_read_DMA6_Y_COUNT() bfin_read16(DMA6_Y_COUNT)
#define bfin_write_DMA6_Y_COUNT(val) bfin_write16(DMA6_Y_COUNT,val)
#define bfin_read_DMA6_X_MODIFY() bfin_read16(DMA6_X_MODIFY)
#define bfin_write_DMA6_X_MODIFY(val) bfin_write16(DMA6_X_MODIFY,val)
#define bfin_read_DMA6_Y_MODIFY() bfin_read16(DMA6_Y_MODIFY)
#define bfin_write_DMA6_Y_MODIFY(val) bfin_write16(DMA6_Y_MODIFY,val)
#define bfin_read_DMA6_CURR_DESC_PTR() bfin_read32(DMA6_CURR_DESC_PTR)
#define bfin_write_DMA6_CURR_DESC_PTR(val) bfin_write32(DMA6_CURR_DESC_PTR,val)
#define bfin_read_DMA6_CURR_ADDR() bfin_read32(DMA6_CURR_ADDR)
#define bfin_write_DMA6_CURR_ADDR(val) bfin_write32(DMA6_CURR_ADDR,val)
#define bfin_read_DMA6_CURR_X_COUNT() bfin_read16(DMA6_CURR_X_COUNT)
#define bfin_write_DMA6_CURR_X_COUNT(val) bfin_write16(DMA6_CURR_X_COUNT,val)
#define bfin_read_DMA6_CURR_Y_COUNT() bfin_read16(DMA6_CURR_Y_COUNT)
#define bfin_write_DMA6_CURR_Y_COUNT(val) bfin_write16(DMA6_CURR_Y_COUNT,val)
#define bfin_read_DMA6_IRQ_STATUS() bfin_read16(DMA6_IRQ_STATUS)
#define bfin_write_DMA6_IRQ_STATUS(val) bfin_write16(DMA6_IRQ_STATUS,val)
#define bfin_read_DMA6_PERIPHERAL_MAP() bfin_read16(DMA6_PERIPHERAL_MAP)
#define bfin_write_DMA6_PERIPHERAL_MAP(val) bfin_write16(DMA6_PERIPHERAL_MAP,val)
#define bfin_read_DMA7_CONFIG() bfin_read16(DMA7_CONFIG)
#define bfin_write_DMA7_CONFIG(val) bfin_write16(DMA7_CONFIG,val)
#define bfin_read_DMA7_NEXT_DESC_PTR() bfin_read32(DMA7_NEXT_DESC_PTR)
#define bfin_write_DMA7_NEXT_DESC_PTR(val) bfin_write32(DMA7_NEXT_DESC_PTR,val)
#define bfin_read_DMA7_START_ADDR() bfin_read32(DMA7_START_ADDR)
#define bfin_write_DMA7_START_ADDR(val) bfin_write32(DMA7_START_ADDR,val)
#define bfin_read_DMA7_X_COUNT() bfin_read16(DMA7_X_COUNT)
#define bfin_write_DMA7_X_COUNT(val) bfin_write16(DMA7_X_COUNT,val)
#define bfin_read_DMA7_Y_COUNT() bfin_read16(DMA7_Y_COUNT)
#define bfin_write_DMA7_Y_COUNT(val) bfin_write16(DMA7_Y_COUNT,val)
#define bfin_read_DMA7_X_MODIFY() bfin_read16(DMA7_X_MODIFY)
#define bfin_write_DMA7_X_MODIFY(val) bfin_write16(DMA7_X_MODIFY,val)
#define bfin_read_DMA7_Y_MODIFY() bfin_read16(DMA7_Y_MODIFY)
#define bfin_write_DMA7_Y_MODIFY(val) bfin_write16(DMA7_Y_MODIFY,val)
#define bfin_read_DMA7_CURR_DESC_PTR() bfin_read32(DMA7_CURR_DESC_PTR)
#define bfin_write_DMA7_CURR_DESC_PTR(val) bfin_write32(DMA7_CURR_DESC_PTR,val)
#define bfin_read_DMA7_CURR_ADDR() bfin_read32(DMA7_CURR_ADDR)
#define bfin_write_DMA7_CURR_ADDR(val) bfin_write32(DMA7_CURR_ADDR,val)
#define bfin_read_DMA7_CURR_X_COUNT() bfin_read16(DMA7_CURR_X_COUNT)
#define bfin_write_DMA7_CURR_X_COUNT(val) bfin_write16(DMA7_CURR_X_COUNT,val)
#define bfin_read_DMA7_CURR_Y_COUNT() bfin_read16(DMA7_CURR_Y_COUNT)
#define bfin_write_DMA7_CURR_Y_COUNT(val) bfin_write16(DMA7_CURR_Y_COUNT,val)
#define bfin_read_DMA7_IRQ_STATUS() bfin_read16(DMA7_IRQ_STATUS)
#define bfin_write_DMA7_IRQ_STATUS(val) bfin_write16(DMA7_IRQ_STATUS,val)
#define bfin_read_DMA7_PERIPHERAL_MAP() bfin_read16(DMA7_PERIPHERAL_MAP)
#define bfin_write_DMA7_PERIPHERAL_MAP(val) bfin_write16(DMA7_PERIPHERAL_MAP,val)
#define bfin_read_DMA8_CONFIG() bfin_read16(DMA8_CONFIG)
#define bfin_write_DMA8_CONFIG(val) bfin_write16(DMA8_CONFIG,val)
#define bfin_read_DMA8_NEXT_DESC_PTR() bfin_read32(DMA8_NEXT_DESC_PTR)
#define bfin_write_DMA8_NEXT_DESC_PTR(val) bfin_write32(DMA8_NEXT_DESC_PTR,val)
#define bfin_read_DMA8_START_ADDR() bfin_read32(DMA8_START_ADDR)
#define bfin_write_DMA8_START_ADDR(val) bfin_write32(DMA8_START_ADDR,val)
#define bfin_read_DMA8_X_COUNT() bfin_read16(DMA8_X_COUNT)
#define bfin_write_DMA8_X_COUNT(val) bfin_write16(DMA8_X_COUNT,val)
#define bfin_read_DMA8_Y_COUNT() bfin_read16(DMA8_Y_COUNT)
#define bfin_write_DMA8_Y_COUNT(val) bfin_write16(DMA8_Y_COUNT,val)
#define bfin_read_DMA8_X_MODIFY() bfin_read16(DMA8_X_MODIFY)
#define bfin_write_DMA8_X_MODIFY(val) bfin_write16(DMA8_X_MODIFY,val)
#define bfin_read_DMA8_Y_MODIFY() bfin_read16(DMA8_Y_MODIFY)
#define bfin_write_DMA8_Y_MODIFY(val) bfin_write16(DMA8_Y_MODIFY,val)
#define bfin_read_DMA8_CURR_DESC_PTR() bfin_read32(DMA8_CURR_DESC_PTR)
#define bfin_write_DMA8_CURR_DESC_PTR(val) bfin_write32(DMA8_CURR_DESC_PTR,val)
#define bfin_read_DMA8_CURR_ADDR() bfin_read32(DMA8_CURR_ADDR)
#define bfin_write_DMA8_CURR_ADDR(val) bfin_write32(DMA8_CURR_ADDR,val)
#define bfin_read_DMA8_CURR_X_COUNT() bfin_read16(DMA8_CURR_X_COUNT)
#define bfin_write_DMA8_CURR_X_COUNT(val) bfin_write16(DMA8_CURR_X_COUNT,val)
#define bfin_read_DMA8_CURR_Y_COUNT() bfin_read16(DMA8_CURR_Y_COUNT)
#define bfin_write_DMA8_CURR_Y_COUNT(val) bfin_write16(DMA8_CURR_Y_COUNT,val)
#define bfin_read_DMA8_IRQ_STATUS() bfin_read16(DMA8_IRQ_STATUS)
#define bfin_write_DMA8_IRQ_STATUS(val) bfin_write16(DMA8_IRQ_STATUS,val)
#define bfin_read_DMA8_PERIPHERAL_MAP() bfin_read16(DMA8_PERIPHERAL_MAP)
#define bfin_write_DMA8_PERIPHERAL_MAP(val) bfin_write16(DMA8_PERIPHERAL_MAP,val)
#define bfin_read_DMA9_CONFIG() bfin_read16(DMA9_CONFIG)
#define bfin_write_DMA9_CONFIG(val) bfin_write16(DMA9_CONFIG,val)
#define bfin_read_DMA9_NEXT_DESC_PTR() bfin_read32(DMA9_NEXT_DESC_PTR)
#define bfin_write_DMA9_NEXT_DESC_PTR(val) bfin_write32(DMA9_NEXT_DESC_PTR,val)
#define bfin_read_DMA9_START_ADDR() bfin_read32(DMA9_START_ADDR)
#define bfin_write_DMA9_START_ADDR(val) bfin_write32(DMA9_START_ADDR,val)
#define bfin_read_DMA9_X_COUNT() bfin_read16(DMA9_X_COUNT)
#define bfin_write_DMA9_X_COUNT(val) bfin_write16(DMA9_X_COUNT,val)
#define bfin_read_DMA9_Y_COUNT() bfin_read16(DMA9_Y_COUNT)
#define bfin_write_DMA9_Y_COUNT(val) bfin_write16(DMA9_Y_COUNT,val)
#define bfin_read_DMA9_X_MODIFY() bfin_read16(DMA9_X_MODIFY)
#define bfin_write_DMA9_X_MODIFY(val) bfin_write16(DMA9_X_MODIFY,val)
#define bfin_read_DMA9_Y_MODIFY() bfin_read16(DMA9_Y_MODIFY)
#define bfin_write_DMA9_Y_MODIFY(val) bfin_write16(DMA9_Y_MODIFY,val)
#define bfin_read_DMA9_CURR_DESC_PTR() bfin_read32(DMA9_CURR_DESC_PTR)
#define bfin_write_DMA9_CURR_DESC_PTR(val) bfin_write32(DMA9_CURR_DESC_PTR,val)
#define bfin_read_DMA9_CURR_ADDR() bfin_read32(DMA9_CURR_ADDR)
#define bfin_write_DMA9_CURR_ADDR(val) bfin_write32(DMA9_CURR_ADDR,val)
#define bfin_read_DMA9_CURR_X_COUNT() bfin_read16(DMA9_CURR_X_COUNT)
#define bfin_write_DMA9_CURR_X_COUNT(val) bfin_write16(DMA9_CURR_X_COUNT,val)
#define bfin_read_DMA9_CURR_Y_COUNT() bfin_read16(DMA9_CURR_Y_COUNT)
#define bfin_write_DMA9_CURR_Y_COUNT(val) bfin_write16(DMA9_CURR_Y_COUNT,val)
#define bfin_read_DMA9_IRQ_STATUS() bfin_read16(DMA9_IRQ_STATUS)
#define bfin_write_DMA9_IRQ_STATUS(val) bfin_write16(DMA9_IRQ_STATUS,val)
#define bfin_read_DMA9_PERIPHERAL_MAP() bfin_read16(DMA9_PERIPHERAL_MAP)
#define bfin_write_DMA9_PERIPHERAL_MAP(val) bfin_write16(DMA9_PERIPHERAL_MAP,val)
#define bfin_read_DMA10_CONFIG() bfin_read16(DMA10_CONFIG)
#define bfin_write_DMA10_CONFIG(val) bfin_write16(DMA10_CONFIG,val)
#define bfin_read_DMA10_NEXT_DESC_PTR() bfin_read32(DMA10_NEXT_DESC_PTR)
#define bfin_write_DMA10_NEXT_DESC_PTR(val) bfin_write32(DMA10_NEXT_DESC_PTR,val)
#define bfin_read_DMA10_START_ADDR() bfin_read32(DMA10_START_ADDR)
#define bfin_write_DMA10_START_ADDR(val) bfin_write32(DMA10_START_ADDR,val)
#define bfin_read_DMA10_X_COUNT() bfin_read16(DMA10_X_COUNT)
#define bfin_write_DMA10_X_COUNT(val) bfin_write16(DMA10_X_COUNT,val)
#define bfin_read_DMA10_Y_COUNT() bfin_read16(DMA10_Y_COUNT)
#define bfin_write_DMA10_Y_COUNT(val) bfin_write16(DMA10_Y_COUNT,val)
#define bfin_read_DMA10_X_MODIFY() bfin_read16(DMA10_X_MODIFY)
#define bfin_write_DMA10_X_MODIFY(val) bfin_write16(DMA10_X_MODIFY,val)
#define bfin_read_DMA10_Y_MODIFY() bfin_read16(DMA10_Y_MODIFY)
#define bfin_write_DMA10_Y_MODIFY(val) bfin_write16(DMA10_Y_MODIFY,val)
#define bfin_read_DMA10_CURR_DESC_PTR() bfin_read32(DMA10_CURR_DESC_PTR)
#define bfin_write_DMA10_CURR_DESC_PTR(val) bfin_write32(DMA10_CURR_DESC_PTR,val)
#define bfin_read_DMA10_CURR_ADDR() bfin_read32(DMA10_CURR_ADDR)
#define bfin_write_DMA10_CURR_ADDR(val) bfin_write32(DMA10_CURR_ADDR,val)
#define bfin_read_DMA10_CURR_X_COUNT() bfin_read16(DMA10_CURR_X_COUNT)
#define bfin_write_DMA10_CURR_X_COUNT(val) bfin_write16(DMA10_CURR_X_COUNT,val)
#define bfin_read_DMA10_CURR_Y_COUNT() bfin_read16(DMA10_CURR_Y_COUNT)
#define bfin_write_DMA10_CURR_Y_COUNT(val) bfin_write16(DMA10_CURR_Y_COUNT,val)
#define bfin_read_DMA10_IRQ_STATUS() bfin_read16(DMA10_IRQ_STATUS)
#define bfin_write_DMA10_IRQ_STATUS(val) bfin_write16(DMA10_IRQ_STATUS,val)
#define bfin_read_DMA10_PERIPHERAL_MAP() bfin_read16(DMA10_PERIPHERAL_MAP)
#define bfin_write_DMA10_PERIPHERAL_MAP(val) bfin_write16(DMA10_PERIPHERAL_MAP,val)
#define bfin_read_DMA11_CONFIG() bfin_read16(DMA11_CONFIG)
#define bfin_write_DMA11_CONFIG(val) bfin_write16(DMA11_CONFIG,val)
#define bfin_read_DMA11_NEXT_DESC_PTR() bfin_read32(DMA11_NEXT_DESC_PTR)
#define bfin_write_DMA11_NEXT_DESC_PTR(val) bfin_write32(DMA11_NEXT_DESC_PTR,val)
#define bfin_read_DMA11_START_ADDR() bfin_read32(DMA11_START_ADDR)
#define bfin_write_DMA11_START_ADDR(val) bfin_write32(DMA11_START_ADDR,val)
#define bfin_read_DMA11_X_COUNT() bfin_read16(DMA11_X_COUNT)
#define bfin_write_DMA11_X_COUNT(val) bfin_write16(DMA11_X_COUNT,val)
#define bfin_read_DMA11_Y_COUNT() bfin_read16(DMA11_Y_COUNT)
#define bfin_write_DMA11_Y_COUNT(val) bfin_write16(DMA11_Y_COUNT,val)
#define bfin_read_DMA11_X_MODIFY() bfin_read16(DMA11_X_MODIFY)
#define bfin_write_DMA11_X_MODIFY(val) bfin_write16(DMA11_X_MODIFY,val)
#define bfin_read_DMA11_Y_MODIFY() bfin_read16(DMA11_Y_MODIFY)
#define bfin_write_DMA11_Y_MODIFY(val) bfin_write16(DMA11_Y_MODIFY,val)
#define bfin_read_DMA11_CURR_DESC_PTR() bfin_read32(DMA11_CURR_DESC_PTR)
#define bfin_write_DMA11_CURR_DESC_PTR(val) bfin_write32(DMA11_CURR_DESC_PTR,val)
#define bfin_read_DMA11_CURR_ADDR() bfin_read32(DMA11_CURR_ADDR)
#define bfin_write_DMA11_CURR_ADDR(val) bfin_write32(DMA11_CURR_ADDR,val)
#define bfin_read_DMA11_CURR_X_COUNT() bfin_read16(DMA11_CURR_X_COUNT)
#define bfin_write_DMA11_CURR_X_COUNT(val) bfin_write16(DMA11_CURR_X_COUNT,val)
#define bfin_read_DMA11_CURR_Y_COUNT() bfin_read16(DMA11_CURR_Y_COUNT)
#define bfin_write_DMA11_CURR_Y_COUNT(val) bfin_write16(DMA11_CURR_Y_COUNT,val)
#define bfin_read_DMA11_IRQ_STATUS() bfin_read16(DMA11_IRQ_STATUS)
#define bfin_write_DMA11_IRQ_STATUS(val) bfin_write16(DMA11_IRQ_STATUS,val)
#define bfin_read_DMA11_PERIPHERAL_MAP() bfin_read16(DMA11_PERIPHERAL_MAP)
#define bfin_write_DMA11_PERIPHERAL_MAP(val) bfin_write16(DMA11_PERIPHERAL_MAP,val)
#define bfin_read_MDMA_D0_CONFIG() bfin_read16(MDMA_D0_CONFIG)
#define bfin_write_MDMA_D0_CONFIG(val) bfin_write16(MDMA_D0_CONFIG,val)
#define bfin_read_MDMA_D0_NEXT_DESC_PTR() bfin_read32(MDMA_D0_NEXT_DESC_PTR)
#define bfin_write_MDMA_D0_NEXT_DESC_PTR(val) bfin_write32(MDMA_D0_NEXT_DESC_PTR,val)
#define bfin_read_MDMA_D0_START_ADDR() bfin_read32(MDMA_D0_START_ADDR)
#define bfin_write_MDMA_D0_START_ADDR(val) bfin_write32(MDMA_D0_START_ADDR,val)
#define bfin_read_MDMA_D0_X_COUNT() bfin_read16(MDMA_D0_X_COUNT)
#define bfin_write_MDMA_D0_X_COUNT(val) bfin_write16(MDMA_D0_X_COUNT,val)
#define bfin_read_MDMA_D0_Y_COUNT() bfin_read16(MDMA_D0_Y_COUNT)
#define bfin_write_MDMA_D0_Y_COUNT(val) bfin_write16(MDMA_D0_Y_COUNT,val)
#define bfin_read_MDMA_D0_X_MODIFY() bfin_read16(MDMA_D0_X_MODIFY)
#define bfin_write_MDMA_D0_X_MODIFY(val) bfin_write16(MDMA_D0_X_MODIFY,val)
#define bfin_read_MDMA_D0_Y_MODIFY() bfin_read16(MDMA_D0_Y_MODIFY)
#define bfin_write_MDMA_D0_Y_MODIFY(val) bfin_write16(MDMA_D0_Y_MODIFY,val)
#define bfin_read_MDMA_D0_CURR_DESC_PTR() bfin_read32(MDMA_D0_CURR_DESC_PTR)
#define bfin_write_MDMA_D0_CURR_DESC_PTR(val) bfin_write32(MDMA_D0_CURR_DESC_PTR,val)
#define bfin_read_MDMA_D0_CURR_ADDR() bfin_read32(MDMA_D0_CURR_ADDR)
#define bfin_write_MDMA_D0_CURR_ADDR(val) bfin_write32(MDMA_D0_CURR_ADDR,val)
#define bfin_read_MDMA_D0_CURR_X_COUNT() bfin_read16(MDMA_D0_CURR_X_COUNT)
#define bfin_write_MDMA_D0_CURR_X_COUNT(val) bfin_write16(MDMA_D0_CURR_X_COUNT,val)
#define bfin_read_MDMA_D0_CURR_Y_COUNT() bfin_read16(MDMA_D0_CURR_Y_COUNT)
#define bfin_write_MDMA_D0_CURR_Y_COUNT(val) bfin_write16(MDMA_D0_CURR_Y_COUNT,val)
#define bfin_read_MDMA_D0_IRQ_STATUS() bfin_read16(MDMA_D0_IRQ_STATUS)
#define bfin_write_MDMA_D0_IRQ_STATUS(val) bfin_write16(MDMA_D0_IRQ_STATUS,val)
#define bfin_read_MDMA_D0_PERIPHERAL_MAP() bfin_read16(MDMA_D0_PERIPHERAL_MAP)
#define bfin_write_MDMA_D0_PERIPHERAL_MAP(val) bfin_write16(MDMA_D0_PERIPHERAL_MAP,val)
#define bfin_read_MDMA_S0_CONFIG() bfin_read16(MDMA_S0_CONFIG)
#define bfin_write_MDMA_S0_CONFIG(val) bfin_write16(MDMA_S0_CONFIG,val)
#define bfin_read_MDMA_S0_NEXT_DESC_PTR() bfin_read32(MDMA_S0_NEXT_DESC_PTR)
#define bfin_write_MDMA_S0_NEXT_DESC_PTR(val) bfin_write32(MDMA_S0_NEXT_DESC_PTR,val)
#define bfin_read_MDMA_S0_START_ADDR() bfin_read32(MDMA_S0_START_ADDR)
#define bfin_write_MDMA_S0_START_ADDR(val) bfin_write32(MDMA_S0_START_ADDR,val)
#define bfin_read_MDMA_S0_X_COUNT() bfin_read16(MDMA_S0_X_COUNT)
#define bfin_write_MDMA_S0_X_COUNT(val) bfin_write16(MDMA_S0_X_COUNT,val)
#define bfin_read_MDMA_S0_Y_COUNT() bfin_read16(MDMA_S0_Y_COUNT)
#define bfin_write_MDMA_S0_Y_COUNT(val) bfin_write16(MDMA_S0_Y_COUNT,val)
#define bfin_read_MDMA_S0_X_MODIFY() bfin_read16(MDMA_S0_X_MODIFY)
#define bfin_write_MDMA_S0_X_MODIFY(val) bfin_write16(MDMA_S0_X_MODIFY,val)
#define bfin_read_MDMA_S0_Y_MODIFY() bfin_read16(MDMA_S0_Y_MODIFY)
#define bfin_write_MDMA_S0_Y_MODIFY(val) bfin_write16(MDMA_S0_Y_MODIFY,val)
#define bfin_read_MDMA_S0_CURR_DESC_PTR() bfin_read32(MDMA_S0_CURR_DESC_PTR)
#define bfin_write_MDMA_S0_CURR_DESC_PTR(val) bfin_write32(MDMA_S0_CURR_DESC_PTR,val)
#define bfin_read_MDMA_S0_CURR_ADDR() bfin_read32(MDMA_S0_CURR_ADDR)
#define bfin_write_MDMA_S0_CURR_ADDR(val) bfin_write32(MDMA_S0_CURR_ADDR,val)
#define bfin_read_MDMA_S0_CURR_X_COUNT() bfin_read16(MDMA_S0_CURR_X_COUNT)
#define bfin_write_MDMA_S0_CURR_X_COUNT(val) bfin_write16(MDMA_S0_CURR_X_COUNT,val)
#define bfin_read_MDMA_S0_CURR_Y_COUNT() bfin_read16(MDMA_S0_CURR_Y_COUNT)
#define bfin_write_MDMA_S0_CURR_Y_COUNT(val) bfin_write16(MDMA_S0_CURR_Y_COUNT,val)
#define bfin_read_MDMA_S0_IRQ_STATUS() bfin_read16(MDMA_S0_IRQ_STATUS)
#define bfin_write_MDMA_S0_IRQ_STATUS(val) bfin_write16(MDMA_S0_IRQ_STATUS,val)
#define bfin_read_MDMA_S0_PERIPHERAL_MAP() bfin_read16(MDMA_S0_PERIPHERAL_MAP)
#define bfin_write_MDMA_S0_PERIPHERAL_MAP(val) bfin_write16(MDMA_S0_PERIPHERAL_MAP,val)
#define bfin_read_MDMA_D1_CONFIG() bfin_read16(MDMA_D1_CONFIG)
#define bfin_write_MDMA_D1_CONFIG(val) bfin_write16(MDMA_D1_CONFIG,val)
#define bfin_read_MDMA_D1_NEXT_DESC_PTR() bfin_read32(MDMA_D1_NEXT_DESC_PTR)
#define bfin_write_MDMA_D1_NEXT_DESC_PTR(val) bfin_write32(MDMA_D1_NEXT_DESC_PTR,val)
#define bfin_read_MDMA_D1_START_ADDR() bfin_read32(MDMA_D1_START_ADDR)
#define bfin_write_MDMA_D1_START_ADDR(val) bfin_write32(MDMA_D1_START_ADDR,val)
#define bfin_read_MDMA_D1_X_COUNT() bfin_read16(MDMA_D1_X_COUNT)
#define bfin_write_MDMA_D1_X_COUNT(val) bfin_write16(MDMA_D1_X_COUNT,val)
#define bfin_read_MDMA_D1_Y_COUNT() bfin_read16(MDMA_D1_Y_COUNT)
#define bfin_write_MDMA_D1_Y_COUNT(val) bfin_write16(MDMA_D1_Y_COUNT,val)
#define bfin_read_MDMA_D1_X_MODIFY() bfin_read16(MDMA_D1_X_MODIFY)
#define bfin_write_MDMA_D1_X_MODIFY(val) bfin_write16(MDMA_D1_X_MODIFY,val)
#define bfin_read_MDMA_D1_Y_MODIFY() bfin_read16(MDMA_D1_Y_MODIFY)
#define bfin_write_MDMA_D1_Y_MODIFY(val) bfin_write16(MDMA_D1_Y_MODIFY,val)
#define bfin_read_MDMA_D1_CURR_DESC_PTR() bfin_read32(MDMA_D1_CURR_DESC_PTR)
#define bfin_write_MDMA_D1_CURR_DESC_PTR(val) bfin_write32(MDMA_D1_CURR_DESC_PTR,val)
#define bfin_read_MDMA_D1_CURR_ADDR() bfin_read32(MDMA_D1_CURR_ADDR)
#define bfin_write_MDMA_D1_CURR_ADDR(val) bfin_write32(MDMA_D1_CURR_ADDR,val)
#define bfin_read_MDMA_D1_CURR_X_COUNT() bfin_read16(MDMA_D1_CURR_X_COUNT)
#define bfin_write_MDMA_D1_CURR_X_COUNT(val) bfin_write16(MDMA_D1_CURR_X_COUNT,val)
#define bfin_read_MDMA_D1_CURR_Y_COUNT() bfin_read16(MDMA_D1_CURR_Y_COUNT)
#define bfin_write_MDMA_D1_CURR_Y_COUNT(val) bfin_write16(MDMA_D1_CURR_Y_COUNT,val)
#define bfin_read_MDMA_D1_IRQ_STATUS() bfin_read16(MDMA_D1_IRQ_STATUS)
#define bfin_write_MDMA_D1_IRQ_STATUS(val) bfin_write16(MDMA_D1_IRQ_STATUS,val)
#define bfin_read_MDMA_D1_PERIPHERAL_MAP() bfin_read16(MDMA_D1_PERIPHERAL_MAP)
#define bfin_write_MDMA_D1_PERIPHERAL_MAP(val) bfin_write16(MDMA_D1_PERIPHERAL_MAP,val)
#define bfin_read_MDMA_S1_CONFIG() bfin_read16(MDMA_S1_CONFIG)
#define bfin_write_MDMA_S1_CONFIG(val) bfin_write16(MDMA_S1_CONFIG,val)
#define bfin_read_MDMA_S1_NEXT_DESC_PTR() bfin_read32(MDMA_S1_NEXT_DESC_PTR)
#define bfin_write_MDMA_S1_NEXT_DESC_PTR(val) bfin_write32(MDMA_S1_NEXT_DESC_PTR,val)
#define bfin_read_MDMA_S1_START_ADDR() bfin_read32(MDMA_S1_START_ADDR)
#define bfin_write_MDMA_S1_START_ADDR(val) bfin_write32(MDMA_S1_START_ADDR,val)
#define bfin_read_MDMA_S1_X_COUNT() bfin_read16(MDMA_S1_X_COUNT)
#define bfin_write_MDMA_S1_X_COUNT(val) bfin_write16(MDMA_S1_X_COUNT,val)
#define bfin_read_MDMA_S1_Y_COUNT() bfin_read16(MDMA_S1_Y_COUNT)
#define bfin_write_MDMA_S1_Y_COUNT(val) bfin_write16(MDMA_S1_Y_COUNT,val)
#define bfin_read_MDMA_S1_X_MODIFY() bfin_read16(MDMA_S1_X_MODIFY)
#define bfin_write_MDMA_S1_X_MODIFY(val) bfin_write16(MDMA_S1_X_MODIFY,val)
#define bfin_read_MDMA_S1_Y_MODIFY() bfin_read16(MDMA_S1_Y_MODIFY)
#define bfin_write_MDMA_S1_Y_MODIFY(val) bfin_write16(MDMA_S1_Y_MODIFY,val)
#define bfin_read_MDMA_S1_CURR_DESC_PTR() bfin_read32(MDMA_S1_CURR_DESC_PTR)
#define bfin_write_MDMA_S1_CURR_DESC_PTR(val) bfin_write32(MDMA_S1_CURR_DESC_PTR,val)
#define bfin_read_MDMA_S1_CURR_ADDR() bfin_read32(MDMA_S1_CURR_ADDR)
#define bfin_write_MDMA_S1_CURR_ADDR(val) bfin_write32(MDMA_S1_CURR_ADDR,val)
#define bfin_read_MDMA_S1_CURR_X_COUNT() bfin_read16(MDMA_S1_CURR_X_COUNT)
#define bfin_write_MDMA_S1_CURR_X_COUNT(val) bfin_write16(MDMA_S1_CURR_X_COUNT,val)
#define bfin_read_MDMA_S1_CURR_Y_COUNT() bfin_read16(MDMA_S1_CURR_Y_COUNT)
#define bfin_write_MDMA_S1_CURR_Y_COUNT(val) bfin_write16(MDMA_S1_CURR_Y_COUNT,val)
#define bfin_read_MDMA_S1_IRQ_STATUS() bfin_read16(MDMA_S1_IRQ_STATUS)
#define bfin_write_MDMA_S1_IRQ_STATUS(val) bfin_write16(MDMA_S1_IRQ_STATUS,val)
#define bfin_read_MDMA_S1_PERIPHERAL_MAP() bfin_read16(MDMA_S1_PERIPHERAL_MAP)
#define bfin_write_MDMA_S1_PERIPHERAL_MAP(val) bfin_write16(MDMA_S1_PERIPHERAL_MAP,val)
/* Parallel Peripheral Interface (0xFFC01000 - 0xFFC010FF) */
#define bfin_read_PPI_CONTROL() bfin_read16(PPI_CONTROL)
#define bfin_write_PPI_CONTROL(val) bfin_write16(PPI_CONTROL,val)
#define bfin_read_PPI_STATUS() bfin_read16(PPI_STATUS)
#define bfin_write_PPI_STATUS(val) bfin_write16(PPI_STATUS,val)
#define bfin_clear_PPI_STATUS() bfin_write_PPI_STATUS(0xFFFF)
#define bfin_read_PPI_DELAY() bfin_read16(PPI_DELAY)
#define bfin_write_PPI_DELAY(val) bfin_write16(PPI_DELAY,val)
#define bfin_read_PPI_COUNT() bfin_read16(PPI_COUNT)
#define bfin_write_PPI_COUNT(val) bfin_write16(PPI_COUNT,val)
#define bfin_read_PPI_FRAME() bfin_read16(PPI_FRAME)
#define bfin_write_PPI_FRAME(val) bfin_write16(PPI_FRAME,val)
[Blackfin] arch: remove TWI I2C register accessing helper macros, because we moved to use i2c new-style interface Signed-off-by: Bryan Wu <cooloney@kernel.org>
2008-03-27 07:25:21 +08:00
/* Two-Wire Interface (0xFFC01400 - 0xFFC014FF) */
blackfin architecture This adds support for the Analog Devices Blackfin processor architecture, and currently supports the BF533, BF532, BF531, BF537, BF536, BF534, and BF561 (Dual Core) devices, with a variety of development platforms including those avaliable from Analog Devices (BF533-EZKit, BF533-STAMP, BF537-STAMP, BF561-EZKIT), and Bluetechnix! Tinyboards. The Blackfin architecture was jointly developed by Intel and Analog Devices Inc. (ADI) as the Micro Signal Architecture (MSA) core and introduced it in December of 2000. Since then ADI has put this core into its Blackfin processor family of devices. The Blackfin core has the advantages of a clean, orthogonal,RISC-like microprocessor instruction set. It combines a dual-MAC (Multiply/Accumulate), state-of-the-art signal processing engine and single-instruction, multiple-data (SIMD) multimedia capabilities into a single instruction-set architecture. The Blackfin architecture, including the instruction set, is described by the ADSP-BF53x/BF56x Blackfin Processor Programming Reference http://blackfin.uclinux.org/gf/download/frsrelease/29/2549/Blackfin_PRM.pdf The Blackfin processor is already supported by major releases of gcc, and there are binary and source rpms/tarballs for many architectures at: http://blackfin.uclinux.org/gf/project/toolchain/frs There is complete documentation, including "getting started" guides available at: http://docs.blackfin.uclinux.org/ which provides links to the sources and patches you will need in order to set up a cross-compiling environment for bfin-linux-uclibc This patch, as well as the other patches (toolchain, distribution, uClibc) are actively supported by Analog Devices Inc, at: http://blackfin.uclinux.org/ We have tested this on LTP, and our test plan (including pass/fails) can be found at: http://docs.blackfin.uclinux.org/doku.php?id=testing_the_linux_kernel [m.kozlowski@tuxland.pl: balance parenthesis in blackfin header files] Signed-off-by: Bryan Wu <bryan.wu@analog.com> Signed-off-by: Mariusz Kozlowski <m.kozlowski@tuxland.pl> Signed-off-by: Aubrey Li <aubrey.li@analog.com> Signed-off-by: Jie Zhang <jie.zhang@analog.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-05-07 05:50:22 +08:00
/* General Purpose I/O Port G (0xFFC01500 - 0xFFC015FF) */
#define bfin_read_PORTGIO() bfin_read16(PORTGIO)
#define bfin_write_PORTGIO(val) bfin_write16(PORTGIO,val)
#define bfin_read_PORTGIO_CLEAR() bfin_read16(PORTGIO_CLEAR)
#define bfin_write_PORTGIO_CLEAR(val) bfin_write16(PORTGIO_CLEAR,val)
#define bfin_read_PORTGIO_SET() bfin_read16(PORTGIO_SET)
#define bfin_write_PORTGIO_SET(val) bfin_write16(PORTGIO_SET,val)
#define bfin_read_PORTGIO_TOGGLE() bfin_read16(PORTGIO_TOGGLE)
#define bfin_write_PORTGIO_TOGGLE(val) bfin_write16(PORTGIO_TOGGLE,val)
#define bfin_read_PORTGIO_MASKA() bfin_read16(PORTGIO_MASKA)
#define bfin_write_PORTGIO_MASKA(val) bfin_write16(PORTGIO_MASKA,val)
#define bfin_read_PORTGIO_MASKA_CLEAR() bfin_read16(PORTGIO_MASKA_CLEAR)
#define bfin_write_PORTGIO_MASKA_CLEAR(val) bfin_write16(PORTGIO_MASKA_CLEAR,val)
#define bfin_read_PORTGIO_MASKA_SET() bfin_read16(PORTGIO_MASKA_SET)
#define bfin_write_PORTGIO_MASKA_SET(val) bfin_write16(PORTGIO_MASKA_SET,val)
#define bfin_read_PORTGIO_MASKA_TOGGLE() bfin_read16(PORTGIO_MASKA_TOGGLE)
#define bfin_write_PORTGIO_MASKA_TOGGLE(val) bfin_write16(PORTGIO_MASKA_TOGGLE,val)
#define bfin_read_PORTGIO_MASKB() bfin_read16(PORTGIO_MASKB)
#define bfin_write_PORTGIO_MASKB(val) bfin_write16(PORTGIO_MASKB,val)
#define bfin_read_PORTGIO_MASKB_CLEAR() bfin_read16(PORTGIO_MASKB_CLEAR)
#define bfin_write_PORTGIO_MASKB_CLEAR(val) bfin_write16(PORTGIO_MASKB_CLEAR,val)
#define bfin_read_PORTGIO_MASKB_SET() bfin_read16(PORTGIO_MASKB_SET)
#define bfin_write_PORTGIO_MASKB_SET(val) bfin_write16(PORTGIO_MASKB_SET,val)
#define bfin_read_PORTGIO_MASKB_TOGGLE() bfin_read16(PORTGIO_MASKB_TOGGLE)
#define bfin_write_PORTGIO_MASKB_TOGGLE(val) bfin_write16(PORTGIO_MASKB_TOGGLE,val)
#define bfin_read_PORTGIO_DIR() bfin_read16(PORTGIO_DIR)
#define bfin_write_PORTGIO_DIR(val) bfin_write16(PORTGIO_DIR,val)
#define bfin_read_PORTGIO_POLAR() bfin_read16(PORTGIO_POLAR)
#define bfin_write_PORTGIO_POLAR(val) bfin_write16(PORTGIO_POLAR,val)
#define bfin_read_PORTGIO_EDGE() bfin_read16(PORTGIO_EDGE)
#define bfin_write_PORTGIO_EDGE(val) bfin_write16(PORTGIO_EDGE,val)
#define bfin_read_PORTGIO_BOTH() bfin_read16(PORTGIO_BOTH)
#define bfin_write_PORTGIO_BOTH(val) bfin_write16(PORTGIO_BOTH,val)
#define bfin_read_PORTGIO_INEN() bfin_read16(PORTGIO_INEN)
#define bfin_write_PORTGIO_INEN(val) bfin_write16(PORTGIO_INEN,val)
/* General Purpose I/O Port H (0xFFC01700 - 0xFFC017FF) */
#define bfin_read_PORTHIO() bfin_read16(PORTHIO)
#define bfin_write_PORTHIO(val) bfin_write16(PORTHIO,val)
#define bfin_read_PORTHIO_CLEAR() bfin_read16(PORTHIO_CLEAR)
#define bfin_write_PORTHIO_CLEAR(val) bfin_write16(PORTHIO_CLEAR,val)
#define bfin_read_PORTHIO_SET() bfin_read16(PORTHIO_SET)
#define bfin_write_PORTHIO_SET(val) bfin_write16(PORTHIO_SET,val)
#define bfin_read_PORTHIO_TOGGLE() bfin_read16(PORTHIO_TOGGLE)
#define bfin_write_PORTHIO_TOGGLE(val) bfin_write16(PORTHIO_TOGGLE,val)
#define bfin_read_PORTHIO_MASKA() bfin_read16(PORTHIO_MASKA)
#define bfin_write_PORTHIO_MASKA(val) bfin_write16(PORTHIO_MASKA,val)
#define bfin_read_PORTHIO_MASKA_CLEAR() bfin_read16(PORTHIO_MASKA_CLEAR)
#define bfin_write_PORTHIO_MASKA_CLEAR(val) bfin_write16(PORTHIO_MASKA_CLEAR,val)
#define bfin_read_PORTHIO_MASKA_SET() bfin_read16(PORTHIO_MASKA_SET)
#define bfin_write_PORTHIO_MASKA_SET(val) bfin_write16(PORTHIO_MASKA_SET,val)
#define bfin_read_PORTHIO_MASKA_TOGGLE() bfin_read16(PORTHIO_MASKA_TOGGLE)
#define bfin_write_PORTHIO_MASKA_TOGGLE(val) bfin_write16(PORTHIO_MASKA_TOGGLE,val)
#define bfin_read_PORTHIO_MASKB() bfin_read16(PORTHIO_MASKB)
#define bfin_write_PORTHIO_MASKB(val) bfin_write16(PORTHIO_MASKB,val)
#define bfin_read_PORTHIO_MASKB_CLEAR() bfin_read16(PORTHIO_MASKB_CLEAR)
#define bfin_write_PORTHIO_MASKB_CLEAR(val) bfin_write16(PORTHIO_MASKB_CLEAR,val)
#define bfin_read_PORTHIO_MASKB_SET() bfin_read16(PORTHIO_MASKB_SET)
#define bfin_write_PORTHIO_MASKB_SET(val) bfin_write16(PORTHIO_MASKB_SET,val)
#define bfin_read_PORTHIO_MASKB_TOGGLE() bfin_read16(PORTHIO_MASKB_TOGGLE)
#define bfin_write_PORTHIO_MASKB_TOGGLE(val) bfin_write16(PORTHIO_MASKB_TOGGLE,val)
#define bfin_read_PORTHIO_DIR() bfin_read16(PORTHIO_DIR)
#define bfin_write_PORTHIO_DIR(val) bfin_write16(PORTHIO_DIR,val)
#define bfin_read_PORTHIO_POLAR() bfin_read16(PORTHIO_POLAR)
#define bfin_write_PORTHIO_POLAR(val) bfin_write16(PORTHIO_POLAR,val)
#define bfin_read_PORTHIO_EDGE() bfin_read16(PORTHIO_EDGE)
#define bfin_write_PORTHIO_EDGE(val) bfin_write16(PORTHIO_EDGE,val)
#define bfin_read_PORTHIO_BOTH() bfin_read16(PORTHIO_BOTH)
#define bfin_write_PORTHIO_BOTH(val) bfin_write16(PORTHIO_BOTH,val)
#define bfin_read_PORTHIO_INEN() bfin_read16(PORTHIO_INEN)
#define bfin_write_PORTHIO_INEN(val) bfin_write16(PORTHIO_INEN,val)
/* UART1 Controller (0xFFC02000 - 0xFFC020FF) */
#define bfin_read_UART1_THR() bfin_read16(UART1_THR)
#define bfin_write_UART1_THR(val) bfin_write16(UART1_THR,val)
#define bfin_read_UART1_RBR() bfin_read16(UART1_RBR)
#define bfin_write_UART1_RBR(val) bfin_write16(UART1_RBR,val)
#define bfin_read_UART1_DLL() bfin_read16(UART1_DLL)
#define bfin_write_UART1_DLL(val) bfin_write16(UART1_DLL,val)
#define bfin_read_UART1_IER() bfin_read16(UART1_IER)
#define bfin_write_UART1_IER(val) bfin_write16(UART1_IER,val)
#define bfin_read_UART1_DLH() bfin_read16(UART1_DLH)
#define bfin_write_UART1_DLH(val) bfin_write16(UART1_DLH,val)
#define bfin_read_UART1_IIR() bfin_read16(UART1_IIR)
#define bfin_write_UART1_IIR(val) bfin_write16(UART1_IIR,val)
#define bfin_read_UART1_LCR() bfin_read16(UART1_LCR)
#define bfin_write_UART1_LCR(val) bfin_write16(UART1_LCR,val)
#define bfin_read_UART1_MCR() bfin_read16(UART1_MCR)
#define bfin_write_UART1_MCR(val) bfin_write16(UART1_MCR,val)
#define bfin_read_UART1_LSR() bfin_read16(UART1_LSR)
#define bfin_write_UART1_LSR(val) bfin_write16(UART1_LSR,val)
#define bfin_read_UART1_MSR() bfin_read16(UART1_MSR)
#define bfin_write_UART1_MSR(val) bfin_write16(UART1_MSR,val)
#define bfin_read_UART1_SCR() bfin_read16(UART1_SCR)
#define bfin_write_UART1_SCR(val) bfin_write16(UART1_SCR,val)
#define bfin_read_UART1_GCTL() bfin_read16(UART1_GCTL)
#define bfin_write_UART1_GCTL(val) bfin_write16(UART1_GCTL,val)
/* CAN Controller (0xFFC02A00 - 0xFFC02FFF) */
/* For Mailboxes 0-15 */
#define bfin_read_CAN_MC1() bfin_read16(CAN_MC1)
#define bfin_write_CAN_MC1(val) bfin_write16(CAN_MC1,val)
#define bfin_read_CAN_MD1() bfin_read16(CAN_MD1)
#define bfin_write_CAN_MD1(val) bfin_write16(CAN_MD1,val)
#define bfin_read_CAN_TRS1() bfin_read16(CAN_TRS1)
#define bfin_write_CAN_TRS1(val) bfin_write16(CAN_TRS1,val)
#define bfin_read_CAN_TRR1() bfin_read16(CAN_TRR1)
#define bfin_write_CAN_TRR1(val) bfin_write16(CAN_TRR1,val)
#define bfin_read_CAN_TA1() bfin_read16(CAN_TA1)
#define bfin_write_CAN_TA1(val) bfin_write16(CAN_TA1,val)
#define bfin_read_CAN_AA1() bfin_read16(CAN_AA1)
#define bfin_write_CAN_AA1(val) bfin_write16(CAN_AA1,val)
#define bfin_read_CAN_RMP1() bfin_read16(CAN_RMP1)
#define bfin_write_CAN_RMP1(val) bfin_write16(CAN_RMP1,val)
#define bfin_read_CAN_RML1() bfin_read16(CAN_RML1)
#define bfin_write_CAN_RML1(val) bfin_write16(CAN_RML1,val)
#define bfin_read_CAN_MBTIF1() bfin_read16(CAN_MBTIF1)
#define bfin_write_CAN_MBTIF1(val) bfin_write16(CAN_MBTIF1,val)
#define bfin_read_CAN_MBRIF1() bfin_read16(CAN_MBRIF1)
#define bfin_write_CAN_MBRIF1(val) bfin_write16(CAN_MBRIF1,val)
#define bfin_read_CAN_MBIM1() bfin_read16(CAN_MBIM1)
#define bfin_write_CAN_MBIM1(val) bfin_write16(CAN_MBIM1,val)
#define bfin_read_CAN_RFH1() bfin_read16(CAN_RFH1)
#define bfin_write_CAN_RFH1(val) bfin_write16(CAN_RFH1,val)
#define bfin_read_CAN_OPSS1() bfin_read16(CAN_OPSS1)
#define bfin_write_CAN_OPSS1(val) bfin_write16(CAN_OPSS1,val)
/* For Mailboxes 16-31 */
#define bfin_read_CAN_MC2() bfin_read16(CAN_MC2)
#define bfin_write_CAN_MC2(val) bfin_write16(CAN_MC2,val)
#define bfin_read_CAN_MD2() bfin_read16(CAN_MD2)
#define bfin_write_CAN_MD2(val) bfin_write16(CAN_MD2,val)
#define bfin_read_CAN_TRS2() bfin_read16(CAN_TRS2)
#define bfin_write_CAN_TRS2(val) bfin_write16(CAN_TRS2,val)
#define bfin_read_CAN_TRR2() bfin_read16(CAN_TRR2)
#define bfin_write_CAN_TRR2(val) bfin_write16(CAN_TRR2,val)
#define bfin_read_CAN_TA2() bfin_read16(CAN_TA2)
#define bfin_write_CAN_TA2(val) bfin_write16(CAN_TA2,val)
#define bfin_read_CAN_AA2() bfin_read16(CAN_AA2)
#define bfin_write_CAN_AA2(val) bfin_write16(CAN_AA2,val)
#define bfin_read_CAN_RMP2() bfin_read16(CAN_RMP2)
#define bfin_write_CAN_RMP2(val) bfin_write16(CAN_RMP2,val)
#define bfin_read_CAN_RML2() bfin_read16(CAN_RML2)
#define bfin_write_CAN_RML2(val) bfin_write16(CAN_RML2,val)
#define bfin_read_CAN_MBTIF2() bfin_read16(CAN_MBTIF2)
#define bfin_write_CAN_MBTIF2(val) bfin_write16(CAN_MBTIF2,val)
#define bfin_read_CAN_MBRIF2() bfin_read16(CAN_MBRIF2)
#define bfin_write_CAN_MBRIF2(val) bfin_write16(CAN_MBRIF2,val)
#define bfin_read_CAN_MBIM2() bfin_read16(CAN_MBIM2)
#define bfin_write_CAN_MBIM2(val) bfin_write16(CAN_MBIM2,val)
#define bfin_read_CAN_RFH2() bfin_read16(CAN_RFH2)
#define bfin_write_CAN_RFH2(val) bfin_write16(CAN_RFH2,val)
#define bfin_read_CAN_OPSS2() bfin_read16(CAN_OPSS2)
#define bfin_write_CAN_OPSS2(val) bfin_write16(CAN_OPSS2,val)
#define bfin_read_CAN_CLOCK() bfin_read16(CAN_CLOCK)
#define bfin_write_CAN_CLOCK(val) bfin_write16(CAN_CLOCK,val)
#define bfin_read_CAN_TIMING() bfin_read16(CAN_TIMING)
#define bfin_write_CAN_TIMING(val) bfin_write16(CAN_TIMING,val)
#define bfin_read_CAN_DEBUG() bfin_read16(CAN_DEBUG)
#define bfin_write_CAN_DEBUG(val) bfin_write16(CAN_DEBUG,val)
#define bfin_read_CAN_STATUS() bfin_read16(CAN_STATUS)
#define bfin_write_CAN_STATUS(val) bfin_write16(CAN_STATUS,val)
#define bfin_read_CAN_CEC() bfin_read16(CAN_CEC)
#define bfin_write_CAN_CEC(val) bfin_write16(CAN_CEC,val)
#define bfin_read_CAN_GIS() bfin_read16(CAN_GIS)
#define bfin_write_CAN_GIS(val) bfin_write16(CAN_GIS,val)
#define bfin_read_CAN_GIM() bfin_read16(CAN_GIM)
#define bfin_write_CAN_GIM(val) bfin_write16(CAN_GIM,val)
#define bfin_read_CAN_GIF() bfin_read16(CAN_GIF)
#define bfin_write_CAN_GIF(val) bfin_write16(CAN_GIF,val)
#define bfin_read_CAN_CONTROL() bfin_read16(CAN_CONTROL)
#define bfin_write_CAN_CONTROL(val) bfin_write16(CAN_CONTROL,val)
#define bfin_read_CAN_INTR() bfin_read16(CAN_INTR)
#define bfin_write_CAN_INTR(val) bfin_write16(CAN_INTR,val)
#define bfin_read_CAN_SFCMVER() bfin_read16(CAN_SFCMVER)
#define bfin_write_CAN_SFCMVER(val) bfin_write16(CAN_SFCMVER,val)
#define bfin_read_CAN_MBTD() bfin_read16(CAN_MBTD)
#define bfin_write_CAN_MBTD(val) bfin_write16(CAN_MBTD,val)
#define bfin_read_CAN_EWR() bfin_read16(CAN_EWR)
#define bfin_write_CAN_EWR(val) bfin_write16(CAN_EWR,val)
#define bfin_read_CAN_ESR() bfin_read16(CAN_ESR)
#define bfin_write_CAN_ESR(val) bfin_write16(CAN_ESR,val)
#define bfin_read_CAN_UCREG() bfin_read16(CAN_UCREG)
#define bfin_write_CAN_UCREG(val) bfin_write16(CAN_UCREG,val)
#define bfin_read_CAN_UCCNT() bfin_read16(CAN_UCCNT)
#define bfin_write_CAN_UCCNT(val) bfin_write16(CAN_UCCNT,val)
#define bfin_read_CAN_UCRC() bfin_read16(CAN_UCRC)
#define bfin_write_CAN_UCRC(val) bfin_write16(CAN_UCRC,val)
#define bfin_read_CAN_UCCNF() bfin_read16(CAN_UCCNF)
#define bfin_write_CAN_UCCNF(val) bfin_write16(CAN_UCCNF,val)
/* Mailbox Acceptance Masks */
#define bfin_read_CAN_AM00L() bfin_read16(CAN_AM00L)
#define bfin_write_CAN_AM00L(val) bfin_write16(CAN_AM00L,val)
#define bfin_read_CAN_AM00H() bfin_read16(CAN_AM00H)
#define bfin_write_CAN_AM00H(val) bfin_write16(CAN_AM00H,val)
#define bfin_read_CAN_AM01L() bfin_read16(CAN_AM01L)
#define bfin_write_CAN_AM01L(val) bfin_write16(CAN_AM01L,val)
#define bfin_read_CAN_AM01H() bfin_read16(CAN_AM01H)
#define bfin_write_CAN_AM01H(val) bfin_write16(CAN_AM01H,val)
#define bfin_read_CAN_AM02L() bfin_read16(CAN_AM02L)
#define bfin_write_CAN_AM02L(val) bfin_write16(CAN_AM02L,val)
#define bfin_read_CAN_AM02H() bfin_read16(CAN_AM02H)
#define bfin_write_CAN_AM02H(val) bfin_write16(CAN_AM02H,val)
#define bfin_read_CAN_AM03L() bfin_read16(CAN_AM03L)
#define bfin_write_CAN_AM03L(val) bfin_write16(CAN_AM03L,val)
#define bfin_read_CAN_AM03H() bfin_read16(CAN_AM03H)
#define bfin_write_CAN_AM03H(val) bfin_write16(CAN_AM03H,val)
#define bfin_read_CAN_AM04L() bfin_read16(CAN_AM04L)
#define bfin_write_CAN_AM04L(val) bfin_write16(CAN_AM04L,val)
#define bfin_read_CAN_AM04H() bfin_read16(CAN_AM04H)
#define bfin_write_CAN_AM04H(val) bfin_write16(CAN_AM04H,val)
#define bfin_read_CAN_AM05L() bfin_read16(CAN_AM05L)
#define bfin_write_CAN_AM05L(val) bfin_write16(CAN_AM05L,val)
#define bfin_read_CAN_AM05H() bfin_read16(CAN_AM05H)
#define bfin_write_CAN_AM05H(val) bfin_write16(CAN_AM05H,val)
#define bfin_read_CAN_AM06L() bfin_read16(CAN_AM06L)
#define bfin_write_CAN_AM06L(val) bfin_write16(CAN_AM06L,val)
#define bfin_read_CAN_AM06H() bfin_read16(CAN_AM06H)
#define bfin_write_CAN_AM06H(val) bfin_write16(CAN_AM06H,val)
#define bfin_read_CAN_AM07L() bfin_read16(CAN_AM07L)
#define bfin_write_CAN_AM07L(val) bfin_write16(CAN_AM07L,val)
#define bfin_read_CAN_AM07H() bfin_read16(CAN_AM07H)
#define bfin_write_CAN_AM07H(val) bfin_write16(CAN_AM07H,val)
#define bfin_read_CAN_AM08L() bfin_read16(CAN_AM08L)
#define bfin_write_CAN_AM08L(val) bfin_write16(CAN_AM08L,val)
#define bfin_read_CAN_AM08H() bfin_read16(CAN_AM08H)
#define bfin_write_CAN_AM08H(val) bfin_write16(CAN_AM08H,val)
#define bfin_read_CAN_AM09L() bfin_read16(CAN_AM09L)
#define bfin_write_CAN_AM09L(val) bfin_write16(CAN_AM09L,val)
#define bfin_read_CAN_AM09H() bfin_read16(CAN_AM09H)
#define bfin_write_CAN_AM09H(val) bfin_write16(CAN_AM09H,val)
#define bfin_read_CAN_AM10L() bfin_read16(CAN_AM10L)
#define bfin_write_CAN_AM10L(val) bfin_write16(CAN_AM10L,val)
#define bfin_read_CAN_AM10H() bfin_read16(CAN_AM10H)
#define bfin_write_CAN_AM10H(val) bfin_write16(CAN_AM10H,val)
#define bfin_read_CAN_AM11L() bfin_read16(CAN_AM11L)
#define bfin_write_CAN_AM11L(val) bfin_write16(CAN_AM11L,val)
#define bfin_read_CAN_AM11H() bfin_read16(CAN_AM11H)
#define bfin_write_CAN_AM11H(val) bfin_write16(CAN_AM11H,val)
#define bfin_read_CAN_AM12L() bfin_read16(CAN_AM12L)
#define bfin_write_CAN_AM12L(val) bfin_write16(CAN_AM12L,val)
#define bfin_read_CAN_AM12H() bfin_read16(CAN_AM12H)
#define bfin_write_CAN_AM12H(val) bfin_write16(CAN_AM12H,val)
#define bfin_read_CAN_AM13L() bfin_read16(CAN_AM13L)
#define bfin_write_CAN_AM13L(val) bfin_write16(CAN_AM13L,val)
#define bfin_read_CAN_AM13H() bfin_read16(CAN_AM13H)
#define bfin_write_CAN_AM13H(val) bfin_write16(CAN_AM13H,val)
#define bfin_read_CAN_AM14L() bfin_read16(CAN_AM14L)
#define bfin_write_CAN_AM14L(val) bfin_write16(CAN_AM14L,val)
#define bfin_read_CAN_AM14H() bfin_read16(CAN_AM14H)
#define bfin_write_CAN_AM14H(val) bfin_write16(CAN_AM14H,val)
#define bfin_read_CAN_AM15L() bfin_read16(CAN_AM15L)
#define bfin_write_CAN_AM15L(val) bfin_write16(CAN_AM15L,val)
#define bfin_read_CAN_AM15H() bfin_read16(CAN_AM15H)
#define bfin_write_CAN_AM15H(val) bfin_write16(CAN_AM15H,val)
#define bfin_read_CAN_AM16L() bfin_read16(CAN_AM16L)
#define bfin_write_CAN_AM16L(val) bfin_write16(CAN_AM16L,val)
#define bfin_read_CAN_AM16H() bfin_read16(CAN_AM16H)
#define bfin_write_CAN_AM16H(val) bfin_write16(CAN_AM16H,val)
#define bfin_read_CAN_AM17L() bfin_read16(CAN_AM17L)
#define bfin_write_CAN_AM17L(val) bfin_write16(CAN_AM17L,val)
#define bfin_read_CAN_AM17H() bfin_read16(CAN_AM17H)
#define bfin_write_CAN_AM17H(val) bfin_write16(CAN_AM17H,val)
#define bfin_read_CAN_AM18L() bfin_read16(CAN_AM18L)
#define bfin_write_CAN_AM18L(val) bfin_write16(CAN_AM18L,val)
#define bfin_read_CAN_AM18H() bfin_read16(CAN_AM18H)
#define bfin_write_CAN_AM18H(val) bfin_write16(CAN_AM18H,val)
#define bfin_read_CAN_AM19L() bfin_read16(CAN_AM19L)
#define bfin_write_CAN_AM19L(val) bfin_write16(CAN_AM19L,val)
#define bfin_read_CAN_AM19H() bfin_read16(CAN_AM19H)
#define bfin_write_CAN_AM19H(val) bfin_write16(CAN_AM19H,val)
#define bfin_read_CAN_AM20L() bfin_read16(CAN_AM20L)
#define bfin_write_CAN_AM20L(val) bfin_write16(CAN_AM20L,val)
#define bfin_read_CAN_AM20H() bfin_read16(CAN_AM20H)
#define bfin_write_CAN_AM20H(val) bfin_write16(CAN_AM20H,val)
#define bfin_read_CAN_AM21L() bfin_read16(CAN_AM21L)
#define bfin_write_CAN_AM21L(val) bfin_write16(CAN_AM21L,val)
#define bfin_read_CAN_AM21H() bfin_read16(CAN_AM21H)
#define bfin_write_CAN_AM21H(val) bfin_write16(CAN_AM21H,val)
#define bfin_read_CAN_AM22L() bfin_read16(CAN_AM22L)
#define bfin_write_CAN_AM22L(val) bfin_write16(CAN_AM22L,val)
#define bfin_read_CAN_AM22H() bfin_read16(CAN_AM22H)
#define bfin_write_CAN_AM22H(val) bfin_write16(CAN_AM22H,val)
#define bfin_read_CAN_AM23L() bfin_read16(CAN_AM23L)
#define bfin_write_CAN_AM23L(val) bfin_write16(CAN_AM23L,val)
#define bfin_read_CAN_AM23H() bfin_read16(CAN_AM23H)
#define bfin_write_CAN_AM23H(val) bfin_write16(CAN_AM23H,val)
#define bfin_read_CAN_AM24L() bfin_read16(CAN_AM24L)
#define bfin_write_CAN_AM24L(val) bfin_write16(CAN_AM24L,val)
#define bfin_read_CAN_AM24H() bfin_read16(CAN_AM24H)
#define bfin_write_CAN_AM24H(val) bfin_write16(CAN_AM24H,val)
#define bfin_read_CAN_AM25L() bfin_read16(CAN_AM25L)
#define bfin_write_CAN_AM25L(val) bfin_write16(CAN_AM25L,val)
#define bfin_read_CAN_AM25H() bfin_read16(CAN_AM25H)
#define bfin_write_CAN_AM25H(val) bfin_write16(CAN_AM25H,val)
#define bfin_read_CAN_AM26L() bfin_read16(CAN_AM26L)
#define bfin_write_CAN_AM26L(val) bfin_write16(CAN_AM26L,val)
#define bfin_read_CAN_AM26H() bfin_read16(CAN_AM26H)
#define bfin_write_CAN_AM26H(val) bfin_write16(CAN_AM26H,val)
#define bfin_read_CAN_AM27L() bfin_read16(CAN_AM27L)
#define bfin_write_CAN_AM27L(val) bfin_write16(CAN_AM27L,val)
#define bfin_read_CAN_AM27H() bfin_read16(CAN_AM27H)
#define bfin_write_CAN_AM27H(val) bfin_write16(CAN_AM27H,val)
#define bfin_read_CAN_AM28L() bfin_read16(CAN_AM28L)
#define bfin_write_CAN_AM28L(val) bfin_write16(CAN_AM28L,val)
#define bfin_read_CAN_AM28H() bfin_read16(CAN_AM28H)
#define bfin_write_CAN_AM28H(val) bfin_write16(CAN_AM28H,val)
#define bfin_read_CAN_AM29L() bfin_read16(CAN_AM29L)
#define bfin_write_CAN_AM29L(val) bfin_write16(CAN_AM29L,val)
#define bfin_read_CAN_AM29H() bfin_read16(CAN_AM29H)
#define bfin_write_CAN_AM29H(val) bfin_write16(CAN_AM29H,val)
#define bfin_read_CAN_AM30L() bfin_read16(CAN_AM30L)
#define bfin_write_CAN_AM30L(val) bfin_write16(CAN_AM30L,val)
#define bfin_read_CAN_AM30H() bfin_read16(CAN_AM30H)
#define bfin_write_CAN_AM30H(val) bfin_write16(CAN_AM30H,val)
#define bfin_read_CAN_AM31L() bfin_read16(CAN_AM31L)
#define bfin_write_CAN_AM31L(val) bfin_write16(CAN_AM31L,val)
#define bfin_read_CAN_AM31H() bfin_read16(CAN_AM31H)
#define bfin_write_CAN_AM31H(val) bfin_write16(CAN_AM31H,val)
/* CAN Acceptance Mask Area Macros */
#define bfin_read_CAN_AM_L(x)() bfin_read16(CAN_AM_L(x))
#define bfin_write_CAN_AM_L(x)(val) bfin_write16(CAN_AM_L(x),val)
#define bfin_read_CAN_AM_H(x)() bfin_read16(CAN_AM_H(x))
#define bfin_write_CAN_AM_H(x)(val) bfin_write16(CAN_AM_H(x),val)
/* Mailbox Registers */
#define bfin_read_CAN_MB00_ID1() bfin_read16(CAN_MB00_ID1)
#define bfin_write_CAN_MB00_ID1(val) bfin_write16(CAN_MB00_ID1,val)
#define bfin_read_CAN_MB00_ID0() bfin_read16(CAN_MB00_ID0)
#define bfin_write_CAN_MB00_ID0(val) bfin_write16(CAN_MB00_ID0,val)
#define bfin_read_CAN_MB00_TIMESTAMP() bfin_read16(CAN_MB00_TIMESTAMP)
#define bfin_write_CAN_MB00_TIMESTAMP(val) bfin_write16(CAN_MB00_TIMESTAMP,val)
#define bfin_read_CAN_MB00_LENGTH() bfin_read16(CAN_MB00_LENGTH)
#define bfin_write_CAN_MB00_LENGTH(val) bfin_write16(CAN_MB00_LENGTH,val)
#define bfin_read_CAN_MB00_DATA3() bfin_read16(CAN_MB00_DATA3)
#define bfin_write_CAN_MB00_DATA3(val) bfin_write16(CAN_MB00_DATA3,val)
#define bfin_read_CAN_MB00_DATA2() bfin_read16(CAN_MB00_DATA2)
#define bfin_write_CAN_MB00_DATA2(val) bfin_write16(CAN_MB00_DATA2,val)
#define bfin_read_CAN_MB00_DATA1() bfin_read16(CAN_MB00_DATA1)
#define bfin_write_CAN_MB00_DATA1(val) bfin_write16(CAN_MB00_DATA1,val)
#define bfin_read_CAN_MB00_DATA0() bfin_read16(CAN_MB00_DATA0)
#define bfin_write_CAN_MB00_DATA0(val) bfin_write16(CAN_MB00_DATA0,val)
#define bfin_read_CAN_MB01_ID1() bfin_read16(CAN_MB01_ID1)
#define bfin_write_CAN_MB01_ID1(val) bfin_write16(CAN_MB01_ID1,val)
#define bfin_read_CAN_MB01_ID0() bfin_read16(CAN_MB01_ID0)
#define bfin_write_CAN_MB01_ID0(val) bfin_write16(CAN_MB01_ID0,val)
#define bfin_read_CAN_MB01_TIMESTAMP() bfin_read16(CAN_MB01_TIMESTAMP)
#define bfin_write_CAN_MB01_TIMESTAMP(val) bfin_write16(CAN_MB01_TIMESTAMP,val)
#define bfin_read_CAN_MB01_LENGTH() bfin_read16(CAN_MB01_LENGTH)
#define bfin_write_CAN_MB01_LENGTH(val) bfin_write16(CAN_MB01_LENGTH,val)
#define bfin_read_CAN_MB01_DATA3() bfin_read16(CAN_MB01_DATA3)
#define bfin_write_CAN_MB01_DATA3(val) bfin_write16(CAN_MB01_DATA3,val)
#define bfin_read_CAN_MB01_DATA2() bfin_read16(CAN_MB01_DATA2)
#define bfin_write_CAN_MB01_DATA2(val) bfin_write16(CAN_MB01_DATA2,val)
#define bfin_read_CAN_MB01_DATA1() bfin_read16(CAN_MB01_DATA1)
#define bfin_write_CAN_MB01_DATA1(val) bfin_write16(CAN_MB01_DATA1,val)
#define bfin_read_CAN_MB01_DATA0() bfin_read16(CAN_MB01_DATA0)
#define bfin_write_CAN_MB01_DATA0(val) bfin_write16(CAN_MB01_DATA0,val)
#define bfin_read_CAN_MB02_ID1() bfin_read16(CAN_MB02_ID1)
#define bfin_write_CAN_MB02_ID1(val) bfin_write16(CAN_MB02_ID1,val)
#define bfin_read_CAN_MB02_ID0() bfin_read16(CAN_MB02_ID0)
#define bfin_write_CAN_MB02_ID0(val) bfin_write16(CAN_MB02_ID0,val)
#define bfin_read_CAN_MB02_TIMESTAMP() bfin_read16(CAN_MB02_TIMESTAMP)
#define bfin_write_CAN_MB02_TIMESTAMP(val) bfin_write16(CAN_MB02_TIMESTAMP,val)
#define bfin_read_CAN_MB02_LENGTH() bfin_read16(CAN_MB02_LENGTH)
#define bfin_write_CAN_MB02_LENGTH(val) bfin_write16(CAN_MB02_LENGTH,val)
#define bfin_read_CAN_MB02_DATA3() bfin_read16(CAN_MB02_DATA3)
#define bfin_write_CAN_MB02_DATA3(val) bfin_write16(CAN_MB02_DATA3,val)
#define bfin_read_CAN_MB02_DATA2() bfin_read16(CAN_MB02_DATA2)
#define bfin_write_CAN_MB02_DATA2(val) bfin_write16(CAN_MB02_DATA2,val)
#define bfin_read_CAN_MB02_DATA1() bfin_read16(CAN_MB02_DATA1)
#define bfin_write_CAN_MB02_DATA1(val) bfin_write16(CAN_MB02_DATA1,val)
#define bfin_read_CAN_MB02_DATA0() bfin_read16(CAN_MB02_DATA0)
#define bfin_write_CAN_MB02_DATA0(val) bfin_write16(CAN_MB02_DATA0,val)
#define bfin_read_CAN_MB03_ID1() bfin_read16(CAN_MB03_ID1)
#define bfin_write_CAN_MB03_ID1(val) bfin_write16(CAN_MB03_ID1,val)
#define bfin_read_CAN_MB03_ID0() bfin_read16(CAN_MB03_ID0)
#define bfin_write_CAN_MB03_ID0(val) bfin_write16(CAN_MB03_ID0,val)
#define bfin_read_CAN_MB03_TIMESTAMP() bfin_read16(CAN_MB03_TIMESTAMP)
#define bfin_write_CAN_MB03_TIMESTAMP(val) bfin_write16(CAN_MB03_TIMESTAMP,val)
#define bfin_read_CAN_MB03_LENGTH() bfin_read16(CAN_MB03_LENGTH)
#define bfin_write_CAN_MB03_LENGTH(val) bfin_write16(CAN_MB03_LENGTH,val)
#define bfin_read_CAN_MB03_DATA3() bfin_read16(CAN_MB03_DATA3)
#define bfin_write_CAN_MB03_DATA3(val) bfin_write16(CAN_MB03_DATA3,val)
#define bfin_read_CAN_MB03_DATA2() bfin_read16(CAN_MB03_DATA2)
#define bfin_write_CAN_MB03_DATA2(val) bfin_write16(CAN_MB03_DATA2,val)
#define bfin_read_CAN_MB03_DATA1() bfin_read16(CAN_MB03_DATA1)
#define bfin_write_CAN_MB03_DATA1(val) bfin_write16(CAN_MB03_DATA1,val)
#define bfin_read_CAN_MB03_DATA0() bfin_read16(CAN_MB03_DATA0)
#define bfin_write_CAN_MB03_DATA0(val) bfin_write16(CAN_MB03_DATA0,val)
#define bfin_read_CAN_MB04_ID1() bfin_read16(CAN_MB04_ID1)
#define bfin_write_CAN_MB04_ID1(val) bfin_write16(CAN_MB04_ID1,val)
#define bfin_read_CAN_MB04_ID0() bfin_read16(CAN_MB04_ID0)
#define bfin_write_CAN_MB04_ID0(val) bfin_write16(CAN_MB04_ID0,val)
#define bfin_read_CAN_MB04_TIMESTAMP() bfin_read16(CAN_MB04_TIMESTAMP)
#define bfin_write_CAN_MB04_TIMESTAMP(val) bfin_write16(CAN_MB04_TIMESTAMP,val)
#define bfin_read_CAN_MB04_LENGTH() bfin_read16(CAN_MB04_LENGTH)
#define bfin_write_CAN_MB04_LENGTH(val) bfin_write16(CAN_MB04_LENGTH,val)
#define bfin_read_CAN_MB04_DATA3() bfin_read16(CAN_MB04_DATA3)
#define bfin_write_CAN_MB04_DATA3(val) bfin_write16(CAN_MB04_DATA3,val)
#define bfin_read_CAN_MB04_DATA2() bfin_read16(CAN_MB04_DATA2)
#define bfin_write_CAN_MB04_DATA2(val) bfin_write16(CAN_MB04_DATA2,val)
#define bfin_read_CAN_MB04_DATA1() bfin_read16(CAN_MB04_DATA1)
#define bfin_write_CAN_MB04_DATA1(val) bfin_write16(CAN_MB04_DATA1,val)
#define bfin_read_CAN_MB04_DATA0() bfin_read16(CAN_MB04_DATA0)
#define bfin_write_CAN_MB04_DATA0(val) bfin_write16(CAN_MB04_DATA0,val)
#define bfin_read_CAN_MB05_ID1() bfin_read16(CAN_MB05_ID1)
#define bfin_write_CAN_MB05_ID1(val) bfin_write16(CAN_MB05_ID1,val)
#define bfin_read_CAN_MB05_ID0() bfin_read16(CAN_MB05_ID0)
#define bfin_write_CAN_MB05_ID0(val) bfin_write16(CAN_MB05_ID0,val)
#define bfin_read_CAN_MB05_TIMESTAMP() bfin_read16(CAN_MB05_TIMESTAMP)
#define bfin_write_CAN_MB05_TIMESTAMP(val) bfin_write16(CAN_MB05_TIMESTAMP,val)
#define bfin_read_CAN_MB05_LENGTH() bfin_read16(CAN_MB05_LENGTH)
#define bfin_write_CAN_MB05_LENGTH(val) bfin_write16(CAN_MB05_LENGTH,val)
#define bfin_read_CAN_MB05_DATA3() bfin_read16(CAN_MB05_DATA3)
#define bfin_write_CAN_MB05_DATA3(val) bfin_write16(CAN_MB05_DATA3,val)
#define bfin_read_CAN_MB05_DATA2() bfin_read16(CAN_MB05_DATA2)
#define bfin_write_CAN_MB05_DATA2(val) bfin_write16(CAN_MB05_DATA2,val)
#define bfin_read_CAN_MB05_DATA1() bfin_read16(CAN_MB05_DATA1)
#define bfin_write_CAN_MB05_DATA1(val) bfin_write16(CAN_MB05_DATA1,val)
#define bfin_read_CAN_MB05_DATA0() bfin_read16(CAN_MB05_DATA0)
#define bfin_write_CAN_MB05_DATA0(val) bfin_write16(CAN_MB05_DATA0,val)
#define bfin_read_CAN_MB06_ID1() bfin_read16(CAN_MB06_ID1)
#define bfin_write_CAN_MB06_ID1(val) bfin_write16(CAN_MB06_ID1,val)
#define bfin_read_CAN_MB06_ID0() bfin_read16(CAN_MB06_ID0)
#define bfin_write_CAN_MB06_ID0(val) bfin_write16(CAN_MB06_ID0,val)
#define bfin_read_CAN_MB06_TIMESTAMP() bfin_read16(CAN_MB06_TIMESTAMP)
#define bfin_write_CAN_MB06_TIMESTAMP(val) bfin_write16(CAN_MB06_TIMESTAMP,val)
#define bfin_read_CAN_MB06_LENGTH() bfin_read16(CAN_MB06_LENGTH)
#define bfin_write_CAN_MB06_LENGTH(val) bfin_write16(CAN_MB06_LENGTH,val)
#define bfin_read_CAN_MB06_DATA3() bfin_read16(CAN_MB06_DATA3)
#define bfin_write_CAN_MB06_DATA3(val) bfin_write16(CAN_MB06_DATA3,val)
#define bfin_read_CAN_MB06_DATA2() bfin_read16(CAN_MB06_DATA2)
#define bfin_write_CAN_MB06_DATA2(val) bfin_write16(CAN_MB06_DATA2,val)
#define bfin_read_CAN_MB06_DATA1() bfin_read16(CAN_MB06_DATA1)
#define bfin_write_CAN_MB06_DATA1(val) bfin_write16(CAN_MB06_DATA1,val)
#define bfin_read_CAN_MB06_DATA0() bfin_read16(CAN_MB06_DATA0)
#define bfin_write_CAN_MB06_DATA0(val) bfin_write16(CAN_MB06_DATA0,val)
#define bfin_read_CAN_MB07_ID1() bfin_read16(CAN_MB07_ID1)
#define bfin_write_CAN_MB07_ID1(val) bfin_write16(CAN_MB07_ID1,val)
#define bfin_read_CAN_MB07_ID0() bfin_read16(CAN_MB07_ID0)
#define bfin_write_CAN_MB07_ID0(val) bfin_write16(CAN_MB07_ID0,val)
#define bfin_read_CAN_MB07_TIMESTAMP() bfin_read16(CAN_MB07_TIMESTAMP)
#define bfin_write_CAN_MB07_TIMESTAMP(val) bfin_write16(CAN_MB07_TIMESTAMP,val)
#define bfin_read_CAN_MB07_LENGTH() bfin_read16(CAN_MB07_LENGTH)
#define bfin_write_CAN_MB07_LENGTH(val) bfin_write16(CAN_MB07_LENGTH,val)
#define bfin_read_CAN_MB07_DATA3() bfin_read16(CAN_MB07_DATA3)
#define bfin_write_CAN_MB07_DATA3(val) bfin_write16(CAN_MB07_DATA3,val)
#define bfin_read_CAN_MB07_DATA2() bfin_read16(CAN_MB07_DATA2)
#define bfin_write_CAN_MB07_DATA2(val) bfin_write16(CAN_MB07_DATA2,val)
#define bfin_read_CAN_MB07_DATA1() bfin_read16(CAN_MB07_DATA1)
#define bfin_write_CAN_MB07_DATA1(val) bfin_write16(CAN_MB07_DATA1,val)
#define bfin_read_CAN_MB07_DATA0() bfin_read16(CAN_MB07_DATA0)
#define bfin_write_CAN_MB07_DATA0(val) bfin_write16(CAN_MB07_DATA0,val)
#define bfin_read_CAN_MB08_ID1() bfin_read16(CAN_MB08_ID1)
#define bfin_write_CAN_MB08_ID1(val) bfin_write16(CAN_MB08_ID1,val)
#define bfin_read_CAN_MB08_ID0() bfin_read16(CAN_MB08_ID0)
#define bfin_write_CAN_MB08_ID0(val) bfin_write16(CAN_MB08_ID0,val)
#define bfin_read_CAN_MB08_TIMESTAMP() bfin_read16(CAN_MB08_TIMESTAMP)
#define bfin_write_CAN_MB08_TIMESTAMP(val) bfin_write16(CAN_MB08_TIMESTAMP,val)
#define bfin_read_CAN_MB08_LENGTH() bfin_read16(CAN_MB08_LENGTH)
#define bfin_write_CAN_MB08_LENGTH(val) bfin_write16(CAN_MB08_LENGTH,val)
#define bfin_read_CAN_MB08_DATA3() bfin_read16(CAN_MB08_DATA3)
#define bfin_write_CAN_MB08_DATA3(val) bfin_write16(CAN_MB08_DATA3,val)
#define bfin_read_CAN_MB08_DATA2() bfin_read16(CAN_MB08_DATA2)
#define bfin_write_CAN_MB08_DATA2(val) bfin_write16(CAN_MB08_DATA2,val)
#define bfin_read_CAN_MB08_DATA1() bfin_read16(CAN_MB08_DATA1)
#define bfin_write_CAN_MB08_DATA1(val) bfin_write16(CAN_MB08_DATA1,val)
#define bfin_read_CAN_MB08_DATA0() bfin_read16(CAN_MB08_DATA0)
#define bfin_write_CAN_MB08_DATA0(val) bfin_write16(CAN_MB08_DATA0,val)
#define bfin_read_CAN_MB09_ID1() bfin_read16(CAN_MB09_ID1)
#define bfin_write_CAN_MB09_ID1(val) bfin_write16(CAN_MB09_ID1,val)
#define bfin_read_CAN_MB09_ID0() bfin_read16(CAN_MB09_ID0)
#define bfin_write_CAN_MB09_ID0(val) bfin_write16(CAN_MB09_ID0,val)
#define bfin_read_CAN_MB09_TIMESTAMP() bfin_read16(CAN_MB09_TIMESTAMP)
#define bfin_write_CAN_MB09_TIMESTAMP(val) bfin_write16(CAN_MB09_TIMESTAMP,val)
#define bfin_read_CAN_MB09_LENGTH() bfin_read16(CAN_MB09_LENGTH)
#define bfin_write_CAN_MB09_LENGTH(val) bfin_write16(CAN_MB09_LENGTH,val)
#define bfin_read_CAN_MB09_DATA3() bfin_read16(CAN_MB09_DATA3)
#define bfin_write_CAN_MB09_DATA3(val) bfin_write16(CAN_MB09_DATA3,val)
#define bfin_read_CAN_MB09_DATA2() bfin_read16(CAN_MB09_DATA2)
#define bfin_write_CAN_MB09_DATA2(val) bfin_write16(CAN_MB09_DATA2,val)
#define bfin_read_CAN_MB09_DATA1() bfin_read16(CAN_MB09_DATA1)
#define bfin_write_CAN_MB09_DATA1(val) bfin_write16(CAN_MB09_DATA1,val)
#define bfin_read_CAN_MB09_DATA0() bfin_read16(CAN_MB09_DATA0)
#define bfin_write_CAN_MB09_DATA0(val) bfin_write16(CAN_MB09_DATA0,val)
#define bfin_read_CAN_MB10_ID1() bfin_read16(CAN_MB10_ID1)
#define bfin_write_CAN_MB10_ID1(val) bfin_write16(CAN_MB10_ID1,val)
#define bfin_read_CAN_MB10_ID0() bfin_read16(CAN_MB10_ID0)
#define bfin_write_CAN_MB10_ID0(val) bfin_write16(CAN_MB10_ID0,val)
#define bfin_read_CAN_MB10_TIMESTAMP() bfin_read16(CAN_MB10_TIMESTAMP)
#define bfin_write_CAN_MB10_TIMESTAMP(val) bfin_write16(CAN_MB10_TIMESTAMP,val)
#define bfin_read_CAN_MB10_LENGTH() bfin_read16(CAN_MB10_LENGTH)
#define bfin_write_CAN_MB10_LENGTH(val) bfin_write16(CAN_MB10_LENGTH,val)
#define bfin_read_CAN_MB10_DATA3() bfin_read16(CAN_MB10_DATA3)
#define bfin_write_CAN_MB10_DATA3(val) bfin_write16(CAN_MB10_DATA3,val)
#define bfin_read_CAN_MB10_DATA2() bfin_read16(CAN_MB10_DATA2)
#define bfin_write_CAN_MB10_DATA2(val) bfin_write16(CAN_MB10_DATA2,val)
#define bfin_read_CAN_MB10_DATA1() bfin_read16(CAN_MB10_DATA1)
#define bfin_write_CAN_MB10_DATA1(val) bfin_write16(CAN_MB10_DATA1,val)
#define bfin_read_CAN_MB10_DATA0() bfin_read16(CAN_MB10_DATA0)
#define bfin_write_CAN_MB10_DATA0(val) bfin_write16(CAN_MB10_DATA0,val)
#define bfin_read_CAN_MB11_ID1() bfin_read16(CAN_MB11_ID1)
#define bfin_write_CAN_MB11_ID1(val) bfin_write16(CAN_MB11_ID1,val)
#define bfin_read_CAN_MB11_ID0() bfin_read16(CAN_MB11_ID0)
#define bfin_write_CAN_MB11_ID0(val) bfin_write16(CAN_MB11_ID0,val)
#define bfin_read_CAN_MB11_TIMESTAMP() bfin_read16(CAN_MB11_TIMESTAMP)
#define bfin_write_CAN_MB11_TIMESTAMP(val) bfin_write16(CAN_MB11_TIMESTAMP,val)
#define bfin_read_CAN_MB11_LENGTH() bfin_read16(CAN_MB11_LENGTH)
#define bfin_write_CAN_MB11_LENGTH(val) bfin_write16(CAN_MB11_LENGTH,val)
#define bfin_read_CAN_MB11_DATA3() bfin_read16(CAN_MB11_DATA3)
#define bfin_write_CAN_MB11_DATA3(val) bfin_write16(CAN_MB11_DATA3,val)
#define bfin_read_CAN_MB11_DATA2() bfin_read16(CAN_MB11_DATA2)
#define bfin_write_CAN_MB11_DATA2(val) bfin_write16(CAN_MB11_DATA2,val)
#define bfin_read_CAN_MB11_DATA1() bfin_read16(CAN_MB11_DATA1)
#define bfin_write_CAN_MB11_DATA1(val) bfin_write16(CAN_MB11_DATA1,val)
#define bfin_read_CAN_MB11_DATA0() bfin_read16(CAN_MB11_DATA0)
#define bfin_write_CAN_MB11_DATA0(val) bfin_write16(CAN_MB11_DATA0,val)
#define bfin_read_CAN_MB12_ID1() bfin_read16(CAN_MB12_ID1)
#define bfin_write_CAN_MB12_ID1(val) bfin_write16(CAN_MB12_ID1,val)
#define bfin_read_CAN_MB12_ID0() bfin_read16(CAN_MB12_ID0)
#define bfin_write_CAN_MB12_ID0(val) bfin_write16(CAN_MB12_ID0,val)
#define bfin_read_CAN_MB12_TIMESTAMP() bfin_read16(CAN_MB12_TIMESTAMP)
#define bfin_write_CAN_MB12_TIMESTAMP(val) bfin_write16(CAN_MB12_TIMESTAMP,val)
#define bfin_read_CAN_MB12_LENGTH() bfin_read16(CAN_MB12_LENGTH)
#define bfin_write_CAN_MB12_LENGTH(val) bfin_write16(CAN_MB12_LENGTH,val)
#define bfin_read_CAN_MB12_DATA3() bfin_read16(CAN_MB12_DATA3)
#define bfin_write_CAN_MB12_DATA3(val) bfin_write16(CAN_MB12_DATA3,val)
#define bfin_read_CAN_MB12_DATA2() bfin_read16(CAN_MB12_DATA2)
#define bfin_write_CAN_MB12_DATA2(val) bfin_write16(CAN_MB12_DATA2,val)
#define bfin_read_CAN_MB12_DATA1() bfin_read16(CAN_MB12_DATA1)
#define bfin_write_CAN_MB12_DATA1(val) bfin_write16(CAN_MB12_DATA1,val)
#define bfin_read_CAN_MB12_DATA0() bfin_read16(CAN_MB12_DATA0)
#define bfin_write_CAN_MB12_DATA0(val) bfin_write16(CAN_MB12_DATA0,val)
#define bfin_read_CAN_MB13_ID1() bfin_read16(CAN_MB13_ID1)
#define bfin_write_CAN_MB13_ID1(val) bfin_write16(CAN_MB13_ID1,val)
#define bfin_read_CAN_MB13_ID0() bfin_read16(CAN_MB13_ID0)
#define bfin_write_CAN_MB13_ID0(val) bfin_write16(CAN_MB13_ID0,val)
#define bfin_read_CAN_MB13_TIMESTAMP() bfin_read16(CAN_MB13_TIMESTAMP)
#define bfin_write_CAN_MB13_TIMESTAMP(val) bfin_write16(CAN_MB13_TIMESTAMP,val)
#define bfin_read_CAN_MB13_LENGTH() bfin_read16(CAN_MB13_LENGTH)
#define bfin_write_CAN_MB13_LENGTH(val) bfin_write16(CAN_MB13_LENGTH,val)
#define bfin_read_CAN_MB13_DATA3() bfin_read16(CAN_MB13_DATA3)
#define bfin_write_CAN_MB13_DATA3(val) bfin_write16(CAN_MB13_DATA3,val)
#define bfin_read_CAN_MB13_DATA2() bfin_read16(CAN_MB13_DATA2)
#define bfin_write_CAN_MB13_DATA2(val) bfin_write16(CAN_MB13_DATA2,val)
#define bfin_read_CAN_MB13_DATA1() bfin_read16(CAN_MB13_DATA1)
#define bfin_write_CAN_MB13_DATA1(val) bfin_write16(CAN_MB13_DATA1,val)
#define bfin_read_CAN_MB13_DATA0() bfin_read16(CAN_MB13_DATA0)
#define bfin_write_CAN_MB13_DATA0(val) bfin_write16(CAN_MB13_DATA0,val)
#define bfin_read_CAN_MB14_ID1() bfin_read16(CAN_MB14_ID1)
#define bfin_write_CAN_MB14_ID1(val) bfin_write16(CAN_MB14_ID1,val)
#define bfin_read_CAN_MB14_ID0() bfin_read16(CAN_MB14_ID0)
#define bfin_write_CAN_MB14_ID0(val) bfin_write16(CAN_MB14_ID0,val)
#define bfin_read_CAN_MB14_TIMESTAMP() bfin_read16(CAN_MB14_TIMESTAMP)
#define bfin_write_CAN_MB14_TIMESTAMP(val) bfin_write16(CAN_MB14_TIMESTAMP,val)
#define bfin_read_CAN_MB14_LENGTH() bfin_read16(CAN_MB14_LENGTH)
#define bfin_write_CAN_MB14_LENGTH(val) bfin_write16(CAN_MB14_LENGTH,val)
#define bfin_read_CAN_MB14_DATA3() bfin_read16(CAN_MB14_DATA3)
#define bfin_write_CAN_MB14_DATA3(val) bfin_write16(CAN_MB14_DATA3,val)
#define bfin_read_CAN_MB14_DATA2() bfin_read16(CAN_MB14_DATA2)
#define bfin_write_CAN_MB14_DATA2(val) bfin_write16(CAN_MB14_DATA2,val)
#define bfin_read_CAN_MB14_DATA1() bfin_read16(CAN_MB14_DATA1)
#define bfin_write_CAN_MB14_DATA1(val) bfin_write16(CAN_MB14_DATA1,val)
#define bfin_read_CAN_MB14_DATA0() bfin_read16(CAN_MB14_DATA0)
#define bfin_write_CAN_MB14_DATA0(val) bfin_write16(CAN_MB14_DATA0,val)
#define bfin_read_CAN_MB15_ID1() bfin_read16(CAN_MB15_ID1)
#define bfin_write_CAN_MB15_ID1(val) bfin_write16(CAN_MB15_ID1,val)
#define bfin_read_CAN_MB15_ID0() bfin_read16(CAN_MB15_ID0)
#define bfin_write_CAN_MB15_ID0(val) bfin_write16(CAN_MB15_ID0,val)
#define bfin_read_CAN_MB15_TIMESTAMP() bfin_read16(CAN_MB15_TIMESTAMP)
#define bfin_write_CAN_MB15_TIMESTAMP(val) bfin_write16(CAN_MB15_TIMESTAMP,val)
#define bfin_read_CAN_MB15_LENGTH() bfin_read16(CAN_MB15_LENGTH)
#define bfin_write_CAN_MB15_LENGTH(val) bfin_write16(CAN_MB15_LENGTH,val)
#define bfin_read_CAN_MB15_DATA3() bfin_read16(CAN_MB15_DATA3)
#define bfin_write_CAN_MB15_DATA3(val) bfin_write16(CAN_MB15_DATA3,val)
#define bfin_read_CAN_MB15_DATA2() bfin_read16(CAN_MB15_DATA2)
#define bfin_write_CAN_MB15_DATA2(val) bfin_write16(CAN_MB15_DATA2,val)
#define bfin_read_CAN_MB15_DATA1() bfin_read16(CAN_MB15_DATA1)
#define bfin_write_CAN_MB15_DATA1(val) bfin_write16(CAN_MB15_DATA1,val)
#define bfin_read_CAN_MB15_DATA0() bfin_read16(CAN_MB15_DATA0)
#define bfin_write_CAN_MB15_DATA0(val) bfin_write16(CAN_MB15_DATA0,val)
#define bfin_read_CAN_MB16_ID1() bfin_read16(CAN_MB16_ID1)
#define bfin_write_CAN_MB16_ID1(val) bfin_write16(CAN_MB16_ID1,val)
#define bfin_read_CAN_MB16_ID0() bfin_read16(CAN_MB16_ID0)
#define bfin_write_CAN_MB16_ID0(val) bfin_write16(CAN_MB16_ID0,val)
#define bfin_read_CAN_MB16_TIMESTAMP() bfin_read16(CAN_MB16_TIMESTAMP)
#define bfin_write_CAN_MB16_TIMESTAMP(val) bfin_write16(CAN_MB16_TIMESTAMP,val)
#define bfin_read_CAN_MB16_LENGTH() bfin_read16(CAN_MB16_LENGTH)
#define bfin_write_CAN_MB16_LENGTH(val) bfin_write16(CAN_MB16_LENGTH,val)
#define bfin_read_CAN_MB16_DATA3() bfin_read16(CAN_MB16_DATA3)
#define bfin_write_CAN_MB16_DATA3(val) bfin_write16(CAN_MB16_DATA3,val)
#define bfin_read_CAN_MB16_DATA2() bfin_read16(CAN_MB16_DATA2)
#define bfin_write_CAN_MB16_DATA2(val) bfin_write16(CAN_MB16_DATA2,val)
#define bfin_read_CAN_MB16_DATA1() bfin_read16(CAN_MB16_DATA1)
#define bfin_write_CAN_MB16_DATA1(val) bfin_write16(CAN_MB16_DATA1,val)
#define bfin_read_CAN_MB16_DATA0() bfin_read16(CAN_MB16_DATA0)
#define bfin_write_CAN_MB16_DATA0(val) bfin_write16(CAN_MB16_DATA0,val)
#define bfin_read_CAN_MB17_ID1() bfin_read16(CAN_MB17_ID1)
#define bfin_write_CAN_MB17_ID1(val) bfin_write16(CAN_MB17_ID1,val)
#define bfin_read_CAN_MB17_ID0() bfin_read16(CAN_MB17_ID0)
#define bfin_write_CAN_MB17_ID0(val) bfin_write16(CAN_MB17_ID0,val)
#define bfin_read_CAN_MB17_TIMESTAMP() bfin_read16(CAN_MB17_TIMESTAMP)
#define bfin_write_CAN_MB17_TIMESTAMP(val) bfin_write16(CAN_MB17_TIMESTAMP,val)
#define bfin_read_CAN_MB17_LENGTH() bfin_read16(CAN_MB17_LENGTH)
#define bfin_write_CAN_MB17_LENGTH(val) bfin_write16(CAN_MB17_LENGTH,val)
#define bfin_read_CAN_MB17_DATA3() bfin_read16(CAN_MB17_DATA3)
#define bfin_write_CAN_MB17_DATA3(val) bfin_write16(CAN_MB17_DATA3,val)
#define bfin_read_CAN_MB17_DATA2() bfin_read16(CAN_MB17_DATA2)
#define bfin_write_CAN_MB17_DATA2(val) bfin_write16(CAN_MB17_DATA2,val)
#define bfin_read_CAN_MB17_DATA1() bfin_read16(CAN_MB17_DATA1)
#define bfin_write_CAN_MB17_DATA1(val) bfin_write16(CAN_MB17_DATA1,val)
#define bfin_read_CAN_MB17_DATA0() bfin_read16(CAN_MB17_DATA0)
#define bfin_write_CAN_MB17_DATA0(val) bfin_write16(CAN_MB17_DATA0,val)
#define bfin_read_CAN_MB18_ID1() bfin_read16(CAN_MB18_ID1)
#define bfin_write_CAN_MB18_ID1(val) bfin_write16(CAN_MB18_ID1,val)
#define bfin_read_CAN_MB18_ID0() bfin_read16(CAN_MB18_ID0)
#define bfin_write_CAN_MB18_ID0(val) bfin_write16(CAN_MB18_ID0,val)
#define bfin_read_CAN_MB18_TIMESTAMP() bfin_read16(CAN_MB18_TIMESTAMP)
#define bfin_write_CAN_MB18_TIMESTAMP(val) bfin_write16(CAN_MB18_TIMESTAMP,val)
#define bfin_read_CAN_MB18_LENGTH() bfin_read16(CAN_MB18_LENGTH)
#define bfin_write_CAN_MB18_LENGTH(val) bfin_write16(CAN_MB18_LENGTH,val)
#define bfin_read_CAN_MB18_DATA3() bfin_read16(CAN_MB18_DATA3)
#define bfin_write_CAN_MB18_DATA3(val) bfin_write16(CAN_MB18_DATA3,val)
#define bfin_read_CAN_MB18_DATA2() bfin_read16(CAN_MB18_DATA2)
#define bfin_write_CAN_MB18_DATA2(val) bfin_write16(CAN_MB18_DATA2,val)
#define bfin_read_CAN_MB18_DATA1() bfin_read16(CAN_MB18_DATA1)
#define bfin_write_CAN_MB18_DATA1(val) bfin_write16(CAN_MB18_DATA1,val)
#define bfin_read_CAN_MB18_DATA0() bfin_read16(CAN_MB18_DATA0)
#define bfin_write_CAN_MB18_DATA0(val) bfin_write16(CAN_MB18_DATA0,val)
#define bfin_read_CAN_MB19_ID1() bfin_read16(CAN_MB19_ID1)
#define bfin_write_CAN_MB19_ID1(val) bfin_write16(CAN_MB19_ID1,val)
#define bfin_read_CAN_MB19_ID0() bfin_read16(CAN_MB19_ID0)
#define bfin_write_CAN_MB19_ID0(val) bfin_write16(CAN_MB19_ID0,val)
#define bfin_read_CAN_MB19_TIMESTAMP() bfin_read16(CAN_MB19_TIMESTAMP)
#define bfin_write_CAN_MB19_TIMESTAMP(val) bfin_write16(CAN_MB19_TIMESTAMP,val)
#define bfin_read_CAN_MB19_LENGTH() bfin_read16(CAN_MB19_LENGTH)
#define bfin_write_CAN_MB19_LENGTH(val) bfin_write16(CAN_MB19_LENGTH,val)
#define bfin_read_CAN_MB19_DATA3() bfin_read16(CAN_MB19_DATA3)
#define bfin_write_CAN_MB19_DATA3(val) bfin_write16(CAN_MB19_DATA3,val)
#define bfin_read_CAN_MB19_DATA2() bfin_read16(CAN_MB19_DATA2)
#define bfin_write_CAN_MB19_DATA2(val) bfin_write16(CAN_MB19_DATA2,val)
#define bfin_read_CAN_MB19_DATA1() bfin_read16(CAN_MB19_DATA1)
#define bfin_write_CAN_MB19_DATA1(val) bfin_write16(CAN_MB19_DATA1,val)
#define bfin_read_CAN_MB19_DATA0() bfin_read16(CAN_MB19_DATA0)
#define bfin_write_CAN_MB19_DATA0(val) bfin_write16(CAN_MB19_DATA0,val)
#define bfin_read_CAN_MB20_ID1() bfin_read16(CAN_MB20_ID1)
#define bfin_write_CAN_MB20_ID1(val) bfin_write16(CAN_MB20_ID1,val)
#define bfin_read_CAN_MB20_ID0() bfin_read16(CAN_MB20_ID0)
#define bfin_write_CAN_MB20_ID0(val) bfin_write16(CAN_MB20_ID0,val)
#define bfin_read_CAN_MB20_TIMESTAMP() bfin_read16(CAN_MB20_TIMESTAMP)
#define bfin_write_CAN_MB20_TIMESTAMP(val) bfin_write16(CAN_MB20_TIMESTAMP,val)
#define bfin_read_CAN_MB20_LENGTH() bfin_read16(CAN_MB20_LENGTH)
#define bfin_write_CAN_MB20_LENGTH(val) bfin_write16(CAN_MB20_LENGTH,val)
#define bfin_read_CAN_MB20_DATA3() bfin_read16(CAN_MB20_DATA3)
#define bfin_write_CAN_MB20_DATA3(val) bfin_write16(CAN_MB20_DATA3,val)
#define bfin_read_CAN_MB20_DATA2() bfin_read16(CAN_MB20_DATA2)
#define bfin_write_CAN_MB20_DATA2(val) bfin_write16(CAN_MB20_DATA2,val)
#define bfin_read_CAN_MB20_DATA1() bfin_read16(CAN_MB20_DATA1)
#define bfin_write_CAN_MB20_DATA1(val) bfin_write16(CAN_MB20_DATA1,val)
#define bfin_read_CAN_MB20_DATA0() bfin_read16(CAN_MB20_DATA0)
#define bfin_write_CAN_MB20_DATA0(val) bfin_write16(CAN_MB20_DATA0,val)
#define bfin_read_CAN_MB21_ID1() bfin_read16(CAN_MB21_ID1)
#define bfin_write_CAN_MB21_ID1(val) bfin_write16(CAN_MB21_ID1,val)
#define bfin_read_CAN_MB21_ID0() bfin_read16(CAN_MB21_ID0)
#define bfin_write_CAN_MB21_ID0(val) bfin_write16(CAN_MB21_ID0,val)
#define bfin_read_CAN_MB21_TIMESTAMP() bfin_read16(CAN_MB21_TIMESTAMP)
#define bfin_write_CAN_MB21_TIMESTAMP(val) bfin_write16(CAN_MB21_TIMESTAMP,val)
#define bfin_read_CAN_MB21_LENGTH() bfin_read16(CAN_MB21_LENGTH)
#define bfin_write_CAN_MB21_LENGTH(val) bfin_write16(CAN_MB21_LENGTH,val)
#define bfin_read_CAN_MB21_DATA3() bfin_read16(CAN_MB21_DATA3)
#define bfin_write_CAN_MB21_DATA3(val) bfin_write16(CAN_MB21_DATA3,val)
#define bfin_read_CAN_MB21_DATA2() bfin_read16(CAN_MB21_DATA2)
#define bfin_write_CAN_MB21_DATA2(val) bfin_write16(CAN_MB21_DATA2,val)
#define bfin_read_CAN_MB21_DATA1() bfin_read16(CAN_MB21_DATA1)
#define bfin_write_CAN_MB21_DATA1(val) bfin_write16(CAN_MB21_DATA1,val)
#define bfin_read_CAN_MB21_DATA0() bfin_read16(CAN_MB21_DATA0)
#define bfin_write_CAN_MB21_DATA0(val) bfin_write16(CAN_MB21_DATA0,val)
#define bfin_read_CAN_MB22_ID1() bfin_read16(CAN_MB22_ID1)
#define bfin_write_CAN_MB22_ID1(val) bfin_write16(CAN_MB22_ID1,val)
#define bfin_read_CAN_MB22_ID0() bfin_read16(CAN_MB22_ID0)
#define bfin_write_CAN_MB22_ID0(val) bfin_write16(CAN_MB22_ID0,val)
#define bfin_read_CAN_MB22_TIMESTAMP() bfin_read16(CAN_MB22_TIMESTAMP)
#define bfin_write_CAN_MB22_TIMESTAMP(val) bfin_write16(CAN_MB22_TIMESTAMP,val)
#define bfin_read_CAN_MB22_LENGTH() bfin_read16(CAN_MB22_LENGTH)
#define bfin_write_CAN_MB22_LENGTH(val) bfin_write16(CAN_MB22_LENGTH,val)
#define bfin_read_CAN_MB22_DATA3() bfin_read16(CAN_MB22_DATA3)
#define bfin_write_CAN_MB22_DATA3(val) bfin_write16(CAN_MB22_DATA3,val)
#define bfin_read_CAN_MB22_DATA2() bfin_read16(CAN_MB22_DATA2)
#define bfin_write_CAN_MB22_DATA2(val) bfin_write16(CAN_MB22_DATA2,val)
#define bfin_read_CAN_MB22_DATA1() bfin_read16(CAN_MB22_DATA1)
#define bfin_write_CAN_MB22_DATA1(val) bfin_write16(CAN_MB22_DATA1,val)
#define bfin_read_CAN_MB22_DATA0() bfin_read16(CAN_MB22_DATA0)
#define bfin_write_CAN_MB22_DATA0(val) bfin_write16(CAN_MB22_DATA0,val)
#define bfin_read_CAN_MB23_ID1() bfin_read16(CAN_MB23_ID1)
#define bfin_write_CAN_MB23_ID1(val) bfin_write16(CAN_MB23_ID1,val)
#define bfin_read_CAN_MB23_ID0() bfin_read16(CAN_MB23_ID0)
#define bfin_write_CAN_MB23_ID0(val) bfin_write16(CAN_MB23_ID0,val)
#define bfin_read_CAN_MB23_TIMESTAMP() bfin_read16(CAN_MB23_TIMESTAMP)
#define bfin_write_CAN_MB23_TIMESTAMP(val) bfin_write16(CAN_MB23_TIMESTAMP,val)
#define bfin_read_CAN_MB23_LENGTH() bfin_read16(CAN_MB23_LENGTH)
#define bfin_write_CAN_MB23_LENGTH(val) bfin_write16(CAN_MB23_LENGTH,val)
#define bfin_read_CAN_MB23_DATA3() bfin_read16(CAN_MB23_DATA3)
#define bfin_write_CAN_MB23_DATA3(val) bfin_write16(CAN_MB23_DATA3,val)
#define bfin_read_CAN_MB23_DATA2() bfin_read16(CAN_MB23_DATA2)
#define bfin_write_CAN_MB23_DATA2(val) bfin_write16(CAN_MB23_DATA2,val)
#define bfin_read_CAN_MB23_DATA1() bfin_read16(CAN_MB23_DATA1)
#define bfin_write_CAN_MB23_DATA1(val) bfin_write16(CAN_MB23_DATA1,val)
#define bfin_read_CAN_MB23_DATA0() bfin_read16(CAN_MB23_DATA0)
#define bfin_write_CAN_MB23_DATA0(val) bfin_write16(CAN_MB23_DATA0,val)
#define bfin_read_CAN_MB24_ID1() bfin_read16(CAN_MB24_ID1)
#define bfin_write_CAN_MB24_ID1(val) bfin_write16(CAN_MB24_ID1,val)
#define bfin_read_CAN_MB24_ID0() bfin_read16(CAN_MB24_ID0)
#define bfin_write_CAN_MB24_ID0(val) bfin_write16(CAN_MB24_ID0,val)
#define bfin_read_CAN_MB24_TIMESTAMP() bfin_read16(CAN_MB24_TIMESTAMP)
#define bfin_write_CAN_MB24_TIMESTAMP(val) bfin_write16(CAN_MB24_TIMESTAMP,val)
#define bfin_read_CAN_MB24_LENGTH() bfin_read16(CAN_MB24_LENGTH)
#define bfin_write_CAN_MB24_LENGTH(val) bfin_write16(CAN_MB24_LENGTH,val)
#define bfin_read_CAN_MB24_DATA3() bfin_read16(CAN_MB24_DATA3)
#define bfin_write_CAN_MB24_DATA3(val) bfin_write16(CAN_MB24_DATA3,val)
#define bfin_read_CAN_MB24_DATA2() bfin_read16(CAN_MB24_DATA2)
#define bfin_write_CAN_MB24_DATA2(val) bfin_write16(CAN_MB24_DATA2,val)
#define bfin_read_CAN_MB24_DATA1() bfin_read16(CAN_MB24_DATA1)
#define bfin_write_CAN_MB24_DATA1(val) bfin_write16(CAN_MB24_DATA1,val)
#define bfin_read_CAN_MB24_DATA0() bfin_read16(CAN_MB24_DATA0)
#define bfin_write_CAN_MB24_DATA0(val) bfin_write16(CAN_MB24_DATA0,val)
#define bfin_read_CAN_MB25_ID1() bfin_read16(CAN_MB25_ID1)
#define bfin_write_CAN_MB25_ID1(val) bfin_write16(CAN_MB25_ID1,val)
#define bfin_read_CAN_MB25_ID0() bfin_read16(CAN_MB25_ID0)
#define bfin_write_CAN_MB25_ID0(val) bfin_write16(CAN_MB25_ID0,val)
#define bfin_read_CAN_MB25_TIMESTAMP() bfin_read16(CAN_MB25_TIMESTAMP)
#define bfin_write_CAN_MB25_TIMESTAMP(val) bfin_write16(CAN_MB25_TIMESTAMP,val)
#define bfin_read_CAN_MB25_LENGTH() bfin_read16(CAN_MB25_LENGTH)
#define bfin_write_CAN_MB25_LENGTH(val) bfin_write16(CAN_MB25_LENGTH,val)
#define bfin_read_CAN_MB25_DATA3() bfin_read16(CAN_MB25_DATA3)
#define bfin_write_CAN_MB25_DATA3(val) bfin_write16(CAN_MB25_DATA3,val)
#define bfin_read_CAN_MB25_DATA2() bfin_read16(CAN_MB25_DATA2)
#define bfin_write_CAN_MB25_DATA2(val) bfin_write16(CAN_MB25_DATA2,val)
#define bfin_read_CAN_MB25_DATA1() bfin_read16(CAN_MB25_DATA1)
#define bfin_write_CAN_MB25_DATA1(val) bfin_write16(CAN_MB25_DATA1,val)
#define bfin_read_CAN_MB25_DATA0() bfin_read16(CAN_MB25_DATA0)
#define bfin_write_CAN_MB25_DATA0(val) bfin_write16(CAN_MB25_DATA0,val)
#define bfin_read_CAN_MB26_ID1() bfin_read16(CAN_MB26_ID1)
#define bfin_write_CAN_MB26_ID1(val) bfin_write16(CAN_MB26_ID1,val)
#define bfin_read_CAN_MB26_ID0() bfin_read16(CAN_MB26_ID0)
#define bfin_write_CAN_MB26_ID0(val) bfin_write16(CAN_MB26_ID0,val)
#define bfin_read_CAN_MB26_TIMESTAMP() bfin_read16(CAN_MB26_TIMESTAMP)
#define bfin_write_CAN_MB26_TIMESTAMP(val) bfin_write16(CAN_MB26_TIMESTAMP,val)
#define bfin_read_CAN_MB26_LENGTH() bfin_read16(CAN_MB26_LENGTH)
#define bfin_write_CAN_MB26_LENGTH(val) bfin_write16(CAN_MB26_LENGTH,val)
#define bfin_read_CAN_MB26_DATA3() bfin_read16(CAN_MB26_DATA3)
#define bfin_write_CAN_MB26_DATA3(val) bfin_write16(CAN_MB26_DATA3,val)
#define bfin_read_CAN_MB26_DATA2() bfin_read16(CAN_MB26_DATA2)
#define bfin_write_CAN_MB26_DATA2(val) bfin_write16(CAN_MB26_DATA2,val)
#define bfin_read_CAN_MB26_DATA1() bfin_read16(CAN_MB26_DATA1)
#define bfin_write_CAN_MB26_DATA1(val) bfin_write16(CAN_MB26_DATA1,val)
#define bfin_read_CAN_MB26_DATA0() bfin_read16(CAN_MB26_DATA0)
#define bfin_write_CAN_MB26_DATA0(val) bfin_write16(CAN_MB26_DATA0,val)
#define bfin_read_CAN_MB27_ID1() bfin_read16(CAN_MB27_ID1)
#define bfin_write_CAN_MB27_ID1(val) bfin_write16(CAN_MB27_ID1,val)
#define bfin_read_CAN_MB27_ID0() bfin_read16(CAN_MB27_ID0)
#define bfin_write_CAN_MB27_ID0(val) bfin_write16(CAN_MB27_ID0,val)
#define bfin_read_CAN_MB27_TIMESTAMP() bfin_read16(CAN_MB27_TIMESTAMP)
#define bfin_write_CAN_MB27_TIMESTAMP(val) bfin_write16(CAN_MB27_TIMESTAMP,val)
#define bfin_read_CAN_MB27_LENGTH() bfin_read16(CAN_MB27_LENGTH)
#define bfin_write_CAN_MB27_LENGTH(val) bfin_write16(CAN_MB27_LENGTH,val)
#define bfin_read_CAN_MB27_DATA3() bfin_read16(CAN_MB27_DATA3)
#define bfin_write_CAN_MB27_DATA3(val) bfin_write16(CAN_MB27_DATA3,val)
#define bfin_read_CAN_MB27_DATA2() bfin_read16(CAN_MB27_DATA2)
#define bfin_write_CAN_MB27_DATA2(val) bfin_write16(CAN_MB27_DATA2,val)
#define bfin_read_CAN_MB27_DATA1() bfin_read16(CAN_MB27_DATA1)
#define bfin_write_CAN_MB27_DATA1(val) bfin_write16(CAN_MB27_DATA1,val)
#define bfin_read_CAN_MB27_DATA0() bfin_read16(CAN_MB27_DATA0)
#define bfin_write_CAN_MB27_DATA0(val) bfin_write16(CAN_MB27_DATA0,val)
#define bfin_read_CAN_MB28_ID1() bfin_read16(CAN_MB28_ID1)
#define bfin_write_CAN_MB28_ID1(val) bfin_write16(CAN_MB28_ID1,val)
#define bfin_read_CAN_MB28_ID0() bfin_read16(CAN_MB28_ID0)
#define bfin_write_CAN_MB28_ID0(val) bfin_write16(CAN_MB28_ID0,val)
#define bfin_read_CAN_MB28_TIMESTAMP() bfin_read16(CAN_MB28_TIMESTAMP)
#define bfin_write_CAN_MB28_TIMESTAMP(val) bfin_write16(CAN_MB28_TIMESTAMP,val)
#define bfin_read_CAN_MB28_LENGTH() bfin_read16(CAN_MB28_LENGTH)
#define bfin_write_CAN_MB28_LENGTH(val) bfin_write16(CAN_MB28_LENGTH,val)
#define bfin_read_CAN_MB28_DATA3() bfin_read16(CAN_MB28_DATA3)
#define bfin_write_CAN_MB28_DATA3(val) bfin_write16(CAN_MB28_DATA3,val)
#define bfin_read_CAN_MB28_DATA2() bfin_read16(CAN_MB28_DATA2)
#define bfin_write_CAN_MB28_DATA2(val) bfin_write16(CAN_MB28_DATA2,val)
#define bfin_read_CAN_MB28_DATA1() bfin_read16(CAN_MB28_DATA1)
#define bfin_write_CAN_MB28_DATA1(val) bfin_write16(CAN_MB28_DATA1,val)
#define bfin_read_CAN_MB28_DATA0() bfin_read16(CAN_MB28_DATA0)
#define bfin_write_CAN_MB28_DATA0(val) bfin_write16(CAN_MB28_DATA0,val)
#define bfin_read_CAN_MB29_ID1() bfin_read16(CAN_MB29_ID1)
#define bfin_write_CAN_MB29_ID1(val) bfin_write16(CAN_MB29_ID1,val)
#define bfin_read_CAN_MB29_ID0() bfin_read16(CAN_MB29_ID0)
#define bfin_write_CAN_MB29_ID0(val) bfin_write16(CAN_MB29_ID0,val)
#define bfin_read_CAN_MB29_TIMESTAMP() bfin_read16(CAN_MB29_TIMESTAMP)
#define bfin_write_CAN_MB29_TIMESTAMP(val) bfin_write16(CAN_MB29_TIMESTAMP,val)
#define bfin_read_CAN_MB29_LENGTH() bfin_read16(CAN_MB29_LENGTH)
#define bfin_write_CAN_MB29_LENGTH(val) bfin_write16(CAN_MB29_LENGTH,val)
#define bfin_read_CAN_MB29_DATA3() bfin_read16(CAN_MB29_DATA3)
#define bfin_write_CAN_MB29_DATA3(val) bfin_write16(CAN_MB29_DATA3,val)
#define bfin_read_CAN_MB29_DATA2() bfin_read16(CAN_MB29_DATA2)
#define bfin_write_CAN_MB29_DATA2(val) bfin_write16(CAN_MB29_DATA2,val)
#define bfin_read_CAN_MB29_DATA1() bfin_read16(CAN_MB29_DATA1)
#define bfin_write_CAN_MB29_DATA1(val) bfin_write16(CAN_MB29_DATA1,val)
#define bfin_read_CAN_MB29_DATA0() bfin_read16(CAN_MB29_DATA0)
#define bfin_write_CAN_MB29_DATA0(val) bfin_write16(CAN_MB29_DATA0,val)
#define bfin_read_CAN_MB30_ID1() bfin_read16(CAN_MB30_ID1)
#define bfin_write_CAN_MB30_ID1(val) bfin_write16(CAN_MB30_ID1,val)
#define bfin_read_CAN_MB30_ID0() bfin_read16(CAN_MB30_ID0)
#define bfin_write_CAN_MB30_ID0(val) bfin_write16(CAN_MB30_ID0,val)
#define bfin_read_CAN_MB30_TIMESTAMP() bfin_read16(CAN_MB30_TIMESTAMP)
#define bfin_write_CAN_MB30_TIMESTAMP(val) bfin_write16(CAN_MB30_TIMESTAMP,val)
#define bfin_read_CAN_MB30_LENGTH() bfin_read16(CAN_MB30_LENGTH)
#define bfin_write_CAN_MB30_LENGTH(val) bfin_write16(CAN_MB30_LENGTH,val)
#define bfin_read_CAN_MB30_DATA3() bfin_read16(CAN_MB30_DATA3)
#define bfin_write_CAN_MB30_DATA3(val) bfin_write16(CAN_MB30_DATA3,val)
#define bfin_read_CAN_MB30_DATA2() bfin_read16(CAN_MB30_DATA2)
#define bfin_write_CAN_MB30_DATA2(val) bfin_write16(CAN_MB30_DATA2,val)
#define bfin_read_CAN_MB30_DATA1() bfin_read16(CAN_MB30_DATA1)
#define bfin_write_CAN_MB30_DATA1(val) bfin_write16(CAN_MB30_DATA1,val)
#define bfin_read_CAN_MB30_DATA0() bfin_read16(CAN_MB30_DATA0)
#define bfin_write_CAN_MB30_DATA0(val) bfin_write16(CAN_MB30_DATA0,val)
#define bfin_read_CAN_MB31_ID1() bfin_read16(CAN_MB31_ID1)
#define bfin_write_CAN_MB31_ID1(val) bfin_write16(CAN_MB31_ID1,val)
#define bfin_read_CAN_MB31_ID0() bfin_read16(CAN_MB31_ID0)
#define bfin_write_CAN_MB31_ID0(val) bfin_write16(CAN_MB31_ID0,val)
#define bfin_read_CAN_MB31_TIMESTAMP() bfin_read16(CAN_MB31_TIMESTAMP)
#define bfin_write_CAN_MB31_TIMESTAMP(val) bfin_write16(CAN_MB31_TIMESTAMP,val)
#define bfin_read_CAN_MB31_LENGTH() bfin_read16(CAN_MB31_LENGTH)
#define bfin_write_CAN_MB31_LENGTH(val) bfin_write16(CAN_MB31_LENGTH,val)
#define bfin_read_CAN_MB31_DATA3() bfin_read16(CAN_MB31_DATA3)
#define bfin_write_CAN_MB31_DATA3(val) bfin_write16(CAN_MB31_DATA3,val)
#define bfin_read_CAN_MB31_DATA2() bfin_read16(CAN_MB31_DATA2)
#define bfin_write_CAN_MB31_DATA2(val) bfin_write16(CAN_MB31_DATA2,val)
#define bfin_read_CAN_MB31_DATA1() bfin_read16(CAN_MB31_DATA1)
#define bfin_write_CAN_MB31_DATA1(val) bfin_write16(CAN_MB31_DATA1,val)
#define bfin_read_CAN_MB31_DATA0() bfin_read16(CAN_MB31_DATA0)
#define bfin_write_CAN_MB31_DATA0(val) bfin_write16(CAN_MB31_DATA0,val)
/* CAN Mailbox Area Macros */
#define bfin_read_CAN_MB_ID1(x)() bfin_read16(CAN_MB_ID1(x))
#define bfin_write_CAN_MB_ID1(x)(val) bfin_write16(CAN_MB_ID1(x),val)
#define bfin_read_CAN_MB_ID0(x)() bfin_read16(CAN_MB_ID0(x))
#define bfin_write_CAN_MB_ID0(x)(val) bfin_write16(CAN_MB_ID0(x),val)
#define bfin_read_CAN_MB_TIMESTAMP(x)() bfin_read16(CAN_MB_TIMESTAMP(x))
#define bfin_write_CAN_MB_TIMESTAMP(x)(val) bfin_write16(CAN_MB_TIMESTAMP(x),val)
#define bfin_read_CAN_MB_LENGTH(x)() bfin_read16(CAN_MB_LENGTH(x))
#define bfin_write_CAN_MB_LENGTH(x)(val) bfin_write16(CAN_MB_LENGTH(x),val)
#define bfin_read_CAN_MB_DATA3(x)() bfin_read16(CAN_MB_DATA3(x))
#define bfin_write_CAN_MB_DATA3(x)(val) bfin_write16(CAN_MB_DATA3(x),val)
#define bfin_read_CAN_MB_DATA2(x)() bfin_read16(CAN_MB_DATA2(x))
#define bfin_write_CAN_MB_DATA2(x)(val) bfin_write16(CAN_MB_DATA2(x),val)
#define bfin_read_CAN_MB_DATA1(x)() bfin_read16(CAN_MB_DATA1(x))
#define bfin_write_CAN_MB_DATA1(x)(val) bfin_write16(CAN_MB_DATA1(x),val)
#define bfin_read_CAN_MB_DATA0(x)() bfin_read16(CAN_MB_DATA0(x))
#define bfin_write_CAN_MB_DATA0(x)(val) bfin_write16(CAN_MB_DATA0(x),val)
/* Pin Control Registers (0xFFC03200 - 0xFFC032FF) */
#define bfin_read_PORTF_FER() bfin_read16(PORTF_FER)
#define bfin_write_PORTF_FER(val) bfin_write16(PORTF_FER,val)
#define bfin_read_PORTG_FER() bfin_read16(PORTG_FER)
#define bfin_write_PORTG_FER(val) bfin_write16(PORTG_FER,val)
#define bfin_read_PORTH_FER() bfin_read16(PORTH_FER)
#define bfin_write_PORTH_FER(val) bfin_write16(PORTH_FER,val)
#define bfin_read_PORT_MUX() bfin_read16(BFIN_PORT_MUX)
#define bfin_write_PORT_MUX(val) bfin_write16(BFIN_PORT_MUX,val)
/* Handshake MDMA Registers (0xFFC03300 - 0xFFC033FF) */
#define bfin_read_HMDMA0_CONTROL() bfin_read16(HMDMA0_CONTROL)
#define bfin_write_HMDMA0_CONTROL(val) bfin_write16(HMDMA0_CONTROL,val)
#define bfin_read_HMDMA0_ECINIT() bfin_read16(HMDMA0_ECINIT)
#define bfin_write_HMDMA0_ECINIT(val) bfin_write16(HMDMA0_ECINIT,val)
#define bfin_read_HMDMA0_BCINIT() bfin_read16(HMDMA0_BCINIT)
#define bfin_write_HMDMA0_BCINIT(val) bfin_write16(HMDMA0_BCINIT,val)
#define bfin_read_HMDMA0_ECURGENT() bfin_read16(HMDMA0_ECURGENT)
#define bfin_write_HMDMA0_ECURGENT(val) bfin_write16(HMDMA0_ECURGENT,val)
#define bfin_read_HMDMA0_ECOVERFLOW() bfin_read16(HMDMA0_ECOVERFLOW)
#define bfin_write_HMDMA0_ECOVERFLOW(val) bfin_write16(HMDMA0_ECOVERFLOW,val)
#define bfin_read_HMDMA0_ECOUNT() bfin_read16(HMDMA0_ECOUNT)
#define bfin_write_HMDMA0_ECOUNT(val) bfin_write16(HMDMA0_ECOUNT,val)
#define bfin_read_HMDMA0_BCOUNT() bfin_read16(HMDMA0_BCOUNT)
#define bfin_write_HMDMA0_BCOUNT(val) bfin_write16(HMDMA0_BCOUNT,val)
#define bfin_read_HMDMA1_CONTROL() bfin_read16(HMDMA1_CONTROL)
#define bfin_write_HMDMA1_CONTROL(val) bfin_write16(HMDMA1_CONTROL,val)
#define bfin_read_HMDMA1_ECINIT() bfin_read16(HMDMA1_ECINIT)
#define bfin_write_HMDMA1_ECINIT(val) bfin_write16(HMDMA1_ECINIT,val)
#define bfin_read_HMDMA1_BCINIT() bfin_read16(HMDMA1_BCINIT)
#define bfin_write_HMDMA1_BCINIT(val) bfin_write16(HMDMA1_BCINIT,val)
#define bfin_read_HMDMA1_ECURGENT() bfin_read16(HMDMA1_ECURGENT)
#define bfin_write_HMDMA1_ECURGENT(val) bfin_write16(HMDMA1_ECURGENT,val)
#define bfin_read_HMDMA1_ECOVERFLOW() bfin_read16(HMDMA1_ECOVERFLOW)
#define bfin_write_HMDMA1_ECOVERFLOW(val) bfin_write16(HMDMA1_ECOVERFLOW,val)
#define bfin_read_HMDMA1_ECOUNT() bfin_read16(HMDMA1_ECOUNT)
#define bfin_write_HMDMA1_ECOUNT(val) bfin_write16(HMDMA1_ECOUNT,val)
#define bfin_read_HMDMA1_BCOUNT() bfin_read16(HMDMA1_BCOUNT)
#define bfin_write_HMDMA1_BCOUNT(val) bfin_write16(HMDMA1_BCOUNT,val)
Blackfin arch: delay PLL_CTL/VR_CTL wrappers Delay PLL_CTL/VR_CTL wrappers as much as possible to avoid the inter-dependency problems with cdef and common headers Signed-off-by: Mike Frysinger <vapier.adi@gmail.com> Signed-off-by: Bryan Wu <cooloney@kernel.org>
2008-11-18 17:48:22 +08:00
/* These need to be last due to the cdef/linux inter-dependencies */
Blackfin arch: move out irq related functions move irq related functions into asm/irq.h and out of the mondo asm/system.h Signed-off-by: Mike Frysinger <vapier.adi@gmail.com> Signed-off-by: Bryan Wu <cooloney@kernel.org>
2008-11-18 17:48:22 +08:00
#include <asm/irq.h>
Blackfin arch: delay PLL_CTL/VR_CTL wrappers Delay PLL_CTL/VR_CTL wrappers as much as possible to avoid the inter-dependency problems with cdef and common headers Signed-off-by: Mike Frysinger <vapier.adi@gmail.com> Signed-off-by: Bryan Wu <cooloney@kernel.org>
2008-11-18 17:48:22 +08:00
blackfin architecture This adds support for the Analog Devices Blackfin processor architecture, and currently supports the BF533, BF532, BF531, BF537, BF536, BF534, and BF561 (Dual Core) devices, with a variety of development platforms including those avaliable from Analog Devices (BF533-EZKit, BF533-STAMP, BF537-STAMP, BF561-EZKIT), and Bluetechnix! Tinyboards. The Blackfin architecture was jointly developed by Intel and Analog Devices Inc. (ADI) as the Micro Signal Architecture (MSA) core and introduced it in December of 2000. Since then ADI has put this core into its Blackfin processor family of devices. The Blackfin core has the advantages of a clean, orthogonal,RISC-like microprocessor instruction set. It combines a dual-MAC (Multiply/Accumulate), state-of-the-art signal processing engine and single-instruction, multiple-data (SIMD) multimedia capabilities into a single instruction-set architecture. The Blackfin architecture, including the instruction set, is described by the ADSP-BF53x/BF56x Blackfin Processor Programming Reference http://blackfin.uclinux.org/gf/download/frsrelease/29/2549/Blackfin_PRM.pdf The Blackfin processor is already supported by major releases of gcc, and there are binary and source rpms/tarballs for many architectures at: http://blackfin.uclinux.org/gf/project/toolchain/frs There is complete documentation, including "getting started" guides available at: http://docs.blackfin.uclinux.org/ which provides links to the sources and patches you will need in order to set up a cross-compiling environment for bfin-linux-uclibc This patch, as well as the other patches (toolchain, distribution, uClibc) are actively supported by Analog Devices Inc, at: http://blackfin.uclinux.org/ We have tested this on LTP, and our test plan (including pass/fails) can be found at: http://docs.blackfin.uclinux.org/doku.php?id=testing_the_linux_kernel [m.kozlowski@tuxland.pl: balance parenthesis in blackfin header files] Signed-off-by: Bryan Wu <bryan.wu@analog.com> Signed-off-by: Mariusz Kozlowski <m.kozlowski@tuxland.pl> Signed-off-by: Aubrey Li <aubrey.li@analog.com> Signed-off-by: Jie Zhang <jie.zhang@analog.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-05-07 05:50:22 +08:00
#endif /* _CDEF_BF534_H */