2009-04-28 10:57:12 +08:00
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/*
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* xHCI host controller driver
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*
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* Copyright (C) 2008 Intel Corp.
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*
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* Author: Sarah Sharp
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* Some code borrowed from the Linux EHCI driver.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but
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* WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
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* or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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* for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software Foundation,
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* Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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*/
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2011-07-19 02:42:00 +08:00
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#include <linux/gfp.h>
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2009-04-28 10:57:12 +08:00
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#include <asm/unaligned.h>
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#include "xhci.h"
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2010-10-14 22:23:03 +08:00
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#define PORT_WAKE_BITS (PORT_WKOC_E | PORT_WKDISC_E | PORT_WKCONN_E)
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#define PORT_RWC_BITS (PORT_CSC | PORT_PEC | PORT_WRC | PORT_OCC | \
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PORT_RC | PORT_PLC | PORT_PE)
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2012-08-22 21:12:06 +08:00
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/* USB 3.0 BOS descriptor and a capability descriptor, combined */
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2011-10-07 02:54:23 +08:00
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static u8 usb_bos_descriptor [] = {
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USB_DT_BOS_SIZE, /* __u8 bLength, 5 bytes */
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USB_DT_BOS, /* __u8 bDescriptorType */
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0x0F, 0x00, /* __le16 wTotalLength, 15 bytes */
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0x1, /* __u8 bNumDeviceCaps */
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/* First device capability */
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USB_DT_USB_SS_CAP_SIZE, /* __u8 bLength, 10 bytes */
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USB_DT_DEVICE_CAPABILITY, /* Device Capability */
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USB_SS_CAP_TYPE, /* bDevCapabilityType, SUPERSPEED_USB */
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0x00, /* bmAttributes, LTM off by default */
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USB_5GBPS_OPERATION, 0x00, /* wSpeedsSupported, 5Gbps only */
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0x03, /* bFunctionalitySupport,
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USB 3.0 speed only */
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0x00, /* bU1DevExitLat, set later. */
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0x00, 0x00 /* __le16 bU2DevExitLat, set later. */
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};
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2010-11-30 08:14:37 +08:00
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static void xhci_common_hub_descriptor(struct xhci_hcd *xhci,
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struct usb_hub_descriptor *desc, int ports)
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2009-04-28 10:57:12 +08:00
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{
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u16 temp;
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desc->bPwrOn2PwrGood = 10; /* xhci section 5.4.9 says 20ms max */
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desc->bHubContrCurrent = 0;
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desc->bNbrPorts = ports;
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temp = 0;
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2011-11-22 22:03:36 +08:00
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/* Bits 1:0 - support per-port power switching, or power always on */
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2009-04-28 10:57:12 +08:00
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if (HCC_PPC(xhci->hcc_params))
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2011-11-22 22:03:36 +08:00
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temp |= HUB_CHAR_INDV_PORT_LPSM;
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2009-04-28 10:57:12 +08:00
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else
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2011-11-22 22:03:36 +08:00
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temp |= HUB_CHAR_NO_LPSM;
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2009-04-28 10:57:12 +08:00
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/* Bit 2 - root hubs are not part of a compound device */
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/* Bits 4:3 - individual port over current protection */
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2011-11-22 22:03:36 +08:00
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temp |= HUB_CHAR_INDV_PORT_OCPM;
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2009-04-28 10:57:12 +08:00
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/* Bits 6:5 - no TTs in root ports */
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/* Bit 7 - no port indicators */
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2011-03-29 10:40:46 +08:00
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desc->wHubCharacteristics = cpu_to_le16(temp);
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2009-04-28 10:57:12 +08:00
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}
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2010-11-30 08:14:37 +08:00
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/* Fill in the USB 2.0 roothub descriptor */
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static void xhci_usb2_hub_descriptor(struct usb_hcd *hcd, struct xhci_hcd *xhci,
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struct usb_hub_descriptor *desc)
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{
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int ports;
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u16 temp;
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__u8 port_removable[(USB_MAXCHILDREN + 1 + 7) / 8];
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u32 portsc;
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unsigned int i;
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ports = xhci->num_usb2_ports;
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xhci_common_hub_descriptor(xhci, desc, ports);
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2011-11-22 22:03:36 +08:00
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desc->bDescriptorType = USB_DT_HUB;
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2010-11-30 08:14:37 +08:00
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temp = 1 + (ports / 8);
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2011-11-22 22:03:36 +08:00
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desc->bDescLength = USB_DT_HUB_NONVAR_SIZE + 2 * temp;
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2010-11-30 08:14:37 +08:00
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/* The Device Removable bits are reported on a byte granularity.
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* If the port doesn't exist within that byte, the bit is set to 0.
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*/
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memset(port_removable, 0, sizeof(port_removable));
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for (i = 0; i < ports; i++) {
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2012-02-10 06:43:44 +08:00
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portsc = xhci_readl(xhci, xhci->usb2_ports[i]);
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2010-11-30 08:14:37 +08:00
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/* If a device is removable, PORTSC reports a 0, same as in the
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* hub descriptor DeviceRemovable bits.
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*/
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if (portsc & PORT_DEV_REMOVE)
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/* This math is hairy because bit 0 of DeviceRemovable
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* is reserved, and bit 1 is for port 1, etc.
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*/
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port_removable[(i + 1) / 8] |= 1 << ((i + 1) % 8);
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}
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/* ch11.h defines a hub descriptor that has room for USB_MAXCHILDREN
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* ports on it. The USB 2.0 specification says that there are two
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* variable length fields at the end of the hub descriptor:
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* DeviceRemovable and PortPwrCtrlMask. But since we can have less than
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* USB_MAXCHILDREN ports, we may need to use the DeviceRemovable array
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* to set PortPwrCtrlMask bits. PortPwrCtrlMask must always be set to
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* 0xFF, so we initialize the both arrays (DeviceRemovable and
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* PortPwrCtrlMask) to 0xFF. Then we set the DeviceRemovable for each
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* set of ports that actually exist.
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*/
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memset(desc->u.hs.DeviceRemovable, 0xff,
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sizeof(desc->u.hs.DeviceRemovable));
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memset(desc->u.hs.PortPwrCtrlMask, 0xff,
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sizeof(desc->u.hs.PortPwrCtrlMask));
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for (i = 0; i < (ports + 1 + 7) / 8; i++)
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memset(&desc->u.hs.DeviceRemovable[i], port_removable[i],
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sizeof(__u8));
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}
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/* Fill in the USB 3.0 roothub descriptor */
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static void xhci_usb3_hub_descriptor(struct usb_hcd *hcd, struct xhci_hcd *xhci,
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struct usb_hub_descriptor *desc)
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{
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int ports;
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u16 port_removable;
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u32 portsc;
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unsigned int i;
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ports = xhci->num_usb3_ports;
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xhci_common_hub_descriptor(xhci, desc, ports);
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2011-11-22 22:03:36 +08:00
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desc->bDescriptorType = USB_DT_SS_HUB;
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desc->bDescLength = USB_DT_SS_HUB_SIZE;
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2010-11-30 08:14:37 +08:00
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/* header decode latency should be zero for roothubs,
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* see section 4.23.5.2.
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*/
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desc->u.ss.bHubHdrDecLat = 0;
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desc->u.ss.wHubDelay = 0;
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port_removable = 0;
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/* bit 0 is reserved, bit 1 is for port 1, etc. */
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for (i = 0; i < ports; i++) {
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portsc = xhci_readl(xhci, xhci->usb3_ports[i]);
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if (portsc & PORT_DEV_REMOVE)
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port_removable |= 1 << (i + 1);
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}
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2012-10-15 15:38:35 +08:00
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desc->u.ss.DeviceRemovable = cpu_to_le16(port_removable);
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2010-11-30 08:14:37 +08:00
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}
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static void xhci_hub_descriptor(struct usb_hcd *hcd, struct xhci_hcd *xhci,
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struct usb_hub_descriptor *desc)
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{
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if (hcd->speed == HCD_USB3)
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xhci_usb3_hub_descriptor(hcd, xhci, desc);
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else
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xhci_usb2_hub_descriptor(hcd, xhci, desc);
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}
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2009-04-28 10:57:12 +08:00
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static unsigned int xhci_port_speed(unsigned int port_status)
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{
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if (DEV_LOWSPEED(port_status))
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2010-03-05 00:32:30 +08:00
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return USB_PORT_STAT_LOW_SPEED;
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2009-04-28 10:57:12 +08:00
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if (DEV_HIGHSPEED(port_status))
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2010-03-05 00:32:30 +08:00
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return USB_PORT_STAT_HIGH_SPEED;
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2009-04-28 10:57:12 +08:00
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/*
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* FIXME: Yes, we should check for full speed, but the core uses that as
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* a default in portspeed() in usb/core/hub.c (which is the only place
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2010-03-05 00:32:30 +08:00
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* USB_PORT_STAT_*_SPEED is used).
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2009-04-28 10:57:12 +08:00
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*/
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return 0;
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}
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/*
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* These bits are Read Only (RO) and should be saved and written to the
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* registers: 0, 3, 10:13, 30
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* connect status, over-current status, port speed, and device removable.
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* connect status and port speed are also sticky - meaning they're in
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* the AUX well and they aren't changed by a hot, warm, or cold reset.
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*/
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#define XHCI_PORT_RO ((1<<0) | (1<<3) | (0xf<<10) | (1<<30))
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/*
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* These bits are RW; writing a 0 clears the bit, writing a 1 sets the bit:
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* bits 5:8, 9, 14:15, 25:27
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* link state, port power, port indicator state, "wake on" enable state
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*/
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#define XHCI_PORT_RWS ((0xf<<5) | (1<<9) | (0x3<<14) | (0x7<<25))
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/*
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* These bits are RW; writing a 1 sets the bit, writing a 0 has no effect:
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* bit 4 (port reset)
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*/
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#define XHCI_PORT_RW1S ((1<<4))
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/*
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* These bits are RW; writing a 1 clears the bit, writing a 0 has no effect:
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* bits 1, 17, 18, 19, 20, 21, 22, 23
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* port enable/disable, and
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* change bits: connect, PED, warm port reset changed (reserved zero for USB 2.0 ports),
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* over-current, reset, link state, and L1 change
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*/
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#define XHCI_PORT_RW1CS ((1<<1) | (0x7f<<17))
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/*
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* Bit 16 is RW, and writing a '1' to it causes the link state control to be
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* latched in
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*/
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#define XHCI_PORT_RW ((1<<16))
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/*
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* These bits are Reserved Zero (RsvdZ) and zero should be written to them:
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* bits 2, 24, 28:31
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*/
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#define XHCI_PORT_RZ ((1<<2) | (1<<24) | (0xf<<28))
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/*
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* Given a port state, this function returns a value that would result in the
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* port being in the same state, if the value was written to the port status
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* control register.
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* Save Read Only (RO) bits and save read/write bits where
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* writing a 0 clears the bit and writing a 1 sets the bit (RWS).
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* For all other types (RW1S, RW1CS, RW, and RZ), writing a '0' has no effect.
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*/
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2010-10-14 22:23:00 +08:00
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u32 xhci_port_state_to_neutral(u32 state)
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2009-04-28 10:57:12 +08:00
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{
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/* Save read-only status and port state */
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return (state & XHCI_PORT_RO) | (state & XHCI_PORT_RWS);
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}
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2010-10-14 22:22:57 +08:00
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/*
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* find slot id based on port number.
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xhci: Register second xHCI roothub.
This patch changes the xHCI driver to allocate two roothubs. This touches
the driver initialization and shutdown paths, roothub emulation code, and
port status change event handlers. This is a rather large patch, but it
can't be broken up, or it would break git-bisect.
Make the xHCI driver register its own PCI probe function. This will call
the USB core to create the USB 2.0 roothub, and then create the USB 3.0
roothub. This gets the code for registering a shared roothub out of the
USB core, and allows other HCDs later to decide if and how many shared
roothubs they want to allocate.
Make sure the xHCI's reset method marks the xHCI host controller's primary
roothub as the USB 2.0 roothub. This ensures that the high speed bus will
be processed first when the PCI device is resumed, and any USB 3.0 devices
that have migrated over to high speed will migrate back after being reset.
This ensures that USB persist works with these odd devices.
The reset method will also mark the xHCI USB2 roothub as having an
integrated TT. Like EHCI host controllers with a "rate matching hub" the
xHCI USB 2.0 roothub doesn't have an OHCI or UHCI companion controller.
It doesn't really have a TT, but we'll lie and say it has an integrated
TT. We need to do this because the USB core will reject LS/FS devices
under a HS hub without a TT.
Other details:
-------------
The roothub emulation code is changed to return the correct number of
ports for the two roothubs. For the USB 3.0 roothub, it only reports the
USB 3.0 ports. For the USB 2.0 roothub, it reports all the LS/FS/HS
ports. The code to disable a port now checks the speed of the roothub,
and refuses to disable SuperSpeed ports under the USB 3.0 roothub.
The code for initializing a new device context must be changed to set the
proper roothub port number. Since we've split the xHCI host into two
roothubs, we can't just use the port number in the ancestor hub. Instead,
we loop through the array of hardware port status register speeds and find
the Nth port with a similar speed.
The port status change event handler is updated to figure out whether the
port that reported the change is a USB 3.0 port, or a non-SuperSpeed port.
Once it figures out the port speed, it kicks the proper roothub.
The function to find a slot ID based on the port index is updated to take
into account that the two roothubs will have over-lapping port indexes.
It checks that the virtual device with a matching port index is the same
speed as the passed in roothub.
There's also changes to the driver initialization and shutdown paths:
1. Make sure that the xhci_hcd pointer is shared across the two
usb_hcd structures. The xhci_hcd pointer is allocated and the
registers are mapped in when xhci_pci_setup() is called with the
primary HCD. When xhci_pci_setup() is called with the non-primary
HCD, the xhci_hcd pointer is stored.
2. Make sure to set the sg_tablesize for both usb_hcd structures. Set
the PCI DMA mask for the non-primary HCD to allow for 64-bit or 32-bit
DMA. (The PCI DMA mask is set from the primary HCD further down in
the xhci_pci_setup() function.)
3. Ensure that the host controller doesn't start kicking khubd in
response to port status changes before both usb_hcd structures are
registered. xhci_run() only starts the xHC running once it has been
called with the non-primary roothub. Similarly, the xhci_stop()
function only halts the host controller when it is called with the
non-primary HCD. Then on the second call, it resets and cleans up the
MSI-X irqs.
Signed-off-by: Sarah Sharp <sarah.a.sharp@linux.intel.com>
2010-12-17 03:21:10 +08:00
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|
|
|
* @port: The one-based port number from one of the two split roothubs.
|
2010-10-14 22:22:57 +08:00
|
|
|
|
*/
|
2010-12-17 02:49:09 +08:00
|
|
|
|
int xhci_find_slot_id_by_port(struct usb_hcd *hcd, struct xhci_hcd *xhci,
|
|
|
|
|
u16 port)
|
2010-10-14 22:22:57 +08:00
|
|
|
|
{
|
|
|
|
|
int slot_id;
|
|
|
|
|
int i;
|
xhci: Register second xHCI roothub.
This patch changes the xHCI driver to allocate two roothubs. This touches
the driver initialization and shutdown paths, roothub emulation code, and
port status change event handlers. This is a rather large patch, but it
can't be broken up, or it would break git-bisect.
Make the xHCI driver register its own PCI probe function. This will call
the USB core to create the USB 2.0 roothub, and then create the USB 3.0
roothub. This gets the code for registering a shared roothub out of the
USB core, and allows other HCDs later to decide if and how many shared
roothubs they want to allocate.
Make sure the xHCI's reset method marks the xHCI host controller's primary
roothub as the USB 2.0 roothub. This ensures that the high speed bus will
be processed first when the PCI device is resumed, and any USB 3.0 devices
that have migrated over to high speed will migrate back after being reset.
This ensures that USB persist works with these odd devices.
The reset method will also mark the xHCI USB2 roothub as having an
integrated TT. Like EHCI host controllers with a "rate matching hub" the
xHCI USB 2.0 roothub doesn't have an OHCI or UHCI companion controller.
It doesn't really have a TT, but we'll lie and say it has an integrated
TT. We need to do this because the USB core will reject LS/FS devices
under a HS hub without a TT.
Other details:
-------------
The roothub emulation code is changed to return the correct number of
ports for the two roothubs. For the USB 3.0 roothub, it only reports the
USB 3.0 ports. For the USB 2.0 roothub, it reports all the LS/FS/HS
ports. The code to disable a port now checks the speed of the roothub,
and refuses to disable SuperSpeed ports under the USB 3.0 roothub.
The code for initializing a new device context must be changed to set the
proper roothub port number. Since we've split the xHCI host into two
roothubs, we can't just use the port number in the ancestor hub. Instead,
we loop through the array of hardware port status register speeds and find
the Nth port with a similar speed.
The port status change event handler is updated to figure out whether the
port that reported the change is a USB 3.0 port, or a non-SuperSpeed port.
Once it figures out the port speed, it kicks the proper roothub.
The function to find a slot ID based on the port index is updated to take
into account that the two roothubs will have over-lapping port indexes.
It checks that the virtual device with a matching port index is the same
speed as the passed in roothub.
There's also changes to the driver initialization and shutdown paths:
1. Make sure that the xhci_hcd pointer is shared across the two
usb_hcd structures. The xhci_hcd pointer is allocated and the
registers are mapped in when xhci_pci_setup() is called with the
primary HCD. When xhci_pci_setup() is called with the non-primary
HCD, the xhci_hcd pointer is stored.
2. Make sure to set the sg_tablesize for both usb_hcd structures. Set
the PCI DMA mask for the non-primary HCD to allow for 64-bit or 32-bit
DMA. (The PCI DMA mask is set from the primary HCD further down in
the xhci_pci_setup() function.)
3. Ensure that the host controller doesn't start kicking khubd in
response to port status changes before both usb_hcd structures are
registered. xhci_run() only starts the xHC running once it has been
called with the non-primary roothub. Similarly, the xhci_stop()
function only halts the host controller when it is called with the
non-primary HCD. Then on the second call, it resets and cleans up the
MSI-X irqs.
Signed-off-by: Sarah Sharp <sarah.a.sharp@linux.intel.com>
2010-12-17 03:21:10 +08:00
|
|
|
|
enum usb_device_speed speed;
|
2010-10-14 22:22:57 +08:00
|
|
|
|
|
|
|
|
|
slot_id = 0;
|
|
|
|
|
for (i = 0; i < MAX_HC_SLOTS; i++) {
|
|
|
|
|
if (!xhci->devs[i])
|
|
|
|
|
continue;
|
xhci: Register second xHCI roothub.
This patch changes the xHCI driver to allocate two roothubs. This touches
the driver initialization and shutdown paths, roothub emulation code, and
port status change event handlers. This is a rather large patch, but it
can't be broken up, or it would break git-bisect.
Make the xHCI driver register its own PCI probe function. This will call
the USB core to create the USB 2.0 roothub, and then create the USB 3.0
roothub. This gets the code for registering a shared roothub out of the
USB core, and allows other HCDs later to decide if and how many shared
roothubs they want to allocate.
Make sure the xHCI's reset method marks the xHCI host controller's primary
roothub as the USB 2.0 roothub. This ensures that the high speed bus will
be processed first when the PCI device is resumed, and any USB 3.0 devices
that have migrated over to high speed will migrate back after being reset.
This ensures that USB persist works with these odd devices.
The reset method will also mark the xHCI USB2 roothub as having an
integrated TT. Like EHCI host controllers with a "rate matching hub" the
xHCI USB 2.0 roothub doesn't have an OHCI or UHCI companion controller.
It doesn't really have a TT, but we'll lie and say it has an integrated
TT. We need to do this because the USB core will reject LS/FS devices
under a HS hub without a TT.
Other details:
-------------
The roothub emulation code is changed to return the correct number of
ports for the two roothubs. For the USB 3.0 roothub, it only reports the
USB 3.0 ports. For the USB 2.0 roothub, it reports all the LS/FS/HS
ports. The code to disable a port now checks the speed of the roothub,
and refuses to disable SuperSpeed ports under the USB 3.0 roothub.
The code for initializing a new device context must be changed to set the
proper roothub port number. Since we've split the xHCI host into two
roothubs, we can't just use the port number in the ancestor hub. Instead,
we loop through the array of hardware port status register speeds and find
the Nth port with a similar speed.
The port status change event handler is updated to figure out whether the
port that reported the change is a USB 3.0 port, or a non-SuperSpeed port.
Once it figures out the port speed, it kicks the proper roothub.
The function to find a slot ID based on the port index is updated to take
into account that the two roothubs will have over-lapping port indexes.
It checks that the virtual device with a matching port index is the same
speed as the passed in roothub.
There's also changes to the driver initialization and shutdown paths:
1. Make sure that the xhci_hcd pointer is shared across the two
usb_hcd structures. The xhci_hcd pointer is allocated and the
registers are mapped in when xhci_pci_setup() is called with the
primary HCD. When xhci_pci_setup() is called with the non-primary
HCD, the xhci_hcd pointer is stored.
2. Make sure to set the sg_tablesize for both usb_hcd structures. Set
the PCI DMA mask for the non-primary HCD to allow for 64-bit or 32-bit
DMA. (The PCI DMA mask is set from the primary HCD further down in
the xhci_pci_setup() function.)
3. Ensure that the host controller doesn't start kicking khubd in
response to port status changes before both usb_hcd structures are
registered. xhci_run() only starts the xHC running once it has been
called with the non-primary roothub. Similarly, the xhci_stop()
function only halts the host controller when it is called with the
non-primary HCD. Then on the second call, it resets and cleans up the
MSI-X irqs.
Signed-off-by: Sarah Sharp <sarah.a.sharp@linux.intel.com>
2010-12-17 03:21:10 +08:00
|
|
|
|
speed = xhci->devs[i]->udev->speed;
|
|
|
|
|
if (((speed == USB_SPEED_SUPER) == (hcd->speed == HCD_USB3))
|
2011-09-03 02:05:41 +08:00
|
|
|
|
&& xhci->devs[i]->fake_port == port) {
|
2010-10-14 22:22:57 +08:00
|
|
|
|
slot_id = i;
|
|
|
|
|
break;
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
return slot_id;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/*
|
|
|
|
|
* Stop device
|
|
|
|
|
* It issues stop endpoint command for EP 0 to 30. And wait the last command
|
|
|
|
|
* to complete.
|
|
|
|
|
* suspend will set to 1, if suspend bit need to set in command.
|
|
|
|
|
*/
|
|
|
|
|
static int xhci_stop_device(struct xhci_hcd *xhci, int slot_id, int suspend)
|
|
|
|
|
{
|
|
|
|
|
struct xhci_virt_device *virt_dev;
|
|
|
|
|
struct xhci_command *cmd;
|
|
|
|
|
unsigned long flags;
|
|
|
|
|
int timeleft;
|
|
|
|
|
int ret;
|
|
|
|
|
int i;
|
|
|
|
|
|
|
|
|
|
ret = 0;
|
|
|
|
|
virt_dev = xhci->devs[slot_id];
|
|
|
|
|
cmd = xhci_alloc_command(xhci, false, true, GFP_NOIO);
|
|
|
|
|
if (!cmd) {
|
|
|
|
|
xhci_dbg(xhci, "Couldn't allocate command structure.\n");
|
|
|
|
|
return -ENOMEM;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
spin_lock_irqsave(&xhci->lock, flags);
|
|
|
|
|
for (i = LAST_EP_INDEX; i > 0; i--) {
|
|
|
|
|
if (virt_dev->eps[i].ring && virt_dev->eps[i].ring->dequeue)
|
|
|
|
|
xhci_queue_stop_endpoint(xhci, slot_id, i, suspend);
|
|
|
|
|
}
|
|
|
|
|
cmd->command_trb = xhci->cmd_ring->enqueue;
|
|
|
|
|
list_add_tail(&cmd->cmd_list, &virt_dev->cmd_list);
|
|
|
|
|
xhci_queue_stop_endpoint(xhci, slot_id, 0, suspend);
|
|
|
|
|
xhci_ring_cmd_db(xhci);
|
|
|
|
|
spin_unlock_irqrestore(&xhci->lock, flags);
|
|
|
|
|
|
|
|
|
|
/* Wait for last stop endpoint command to finish */
|
|
|
|
|
timeleft = wait_for_completion_interruptible_timeout(
|
|
|
|
|
cmd->completion,
|
|
|
|
|
USB_CTRL_SET_TIMEOUT);
|
|
|
|
|
if (timeleft <= 0) {
|
|
|
|
|
xhci_warn(xhci, "%s while waiting for stop endpoint command\n",
|
|
|
|
|
timeleft == 0 ? "Timeout" : "Signal");
|
|
|
|
|
spin_lock_irqsave(&xhci->lock, flags);
|
|
|
|
|
/* The timeout might have raced with the event ring handler, so
|
|
|
|
|
* only delete from the list if the item isn't poisoned.
|
|
|
|
|
*/
|
|
|
|
|
if (cmd->cmd_list.next != LIST_POISON1)
|
|
|
|
|
list_del(&cmd->cmd_list);
|
|
|
|
|
spin_unlock_irqrestore(&xhci->lock, flags);
|
|
|
|
|
ret = -ETIME;
|
|
|
|
|
goto command_cleanup;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
command_cleanup:
|
|
|
|
|
xhci_free_command(xhci, cmd);
|
|
|
|
|
return ret;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/*
|
|
|
|
|
* Ring device, it rings the all doorbells unconditionally.
|
|
|
|
|
*/
|
2010-10-14 22:23:00 +08:00
|
|
|
|
void xhci_ring_device(struct xhci_hcd *xhci, int slot_id)
|
2010-10-14 22:22:57 +08:00
|
|
|
|
{
|
|
|
|
|
int i;
|
|
|
|
|
|
|
|
|
|
for (i = 0; i < LAST_EP_INDEX + 1; i++)
|
|
|
|
|
if (xhci->devs[slot_id]->eps[i].ring &&
|
|
|
|
|
xhci->devs[slot_id]->eps[i].ring->dequeue)
|
|
|
|
|
xhci_ring_ep_doorbell(xhci, slot_id, i, 0);
|
|
|
|
|
|
|
|
|
|
return;
|
|
|
|
|
}
|
|
|
|
|
|
xhci: Register second xHCI roothub.
This patch changes the xHCI driver to allocate two roothubs. This touches
the driver initialization and shutdown paths, roothub emulation code, and
port status change event handlers. This is a rather large patch, but it
can't be broken up, or it would break git-bisect.
Make the xHCI driver register its own PCI probe function. This will call
the USB core to create the USB 2.0 roothub, and then create the USB 3.0
roothub. This gets the code for registering a shared roothub out of the
USB core, and allows other HCDs later to decide if and how many shared
roothubs they want to allocate.
Make sure the xHCI's reset method marks the xHCI host controller's primary
roothub as the USB 2.0 roothub. This ensures that the high speed bus will
be processed first when the PCI device is resumed, and any USB 3.0 devices
that have migrated over to high speed will migrate back after being reset.
This ensures that USB persist works with these odd devices.
The reset method will also mark the xHCI USB2 roothub as having an
integrated TT. Like EHCI host controllers with a "rate matching hub" the
xHCI USB 2.0 roothub doesn't have an OHCI or UHCI companion controller.
It doesn't really have a TT, but we'll lie and say it has an integrated
TT. We need to do this because the USB core will reject LS/FS devices
under a HS hub without a TT.
Other details:
-------------
The roothub emulation code is changed to return the correct number of
ports for the two roothubs. For the USB 3.0 roothub, it only reports the
USB 3.0 ports. For the USB 2.0 roothub, it reports all the LS/FS/HS
ports. The code to disable a port now checks the speed of the roothub,
and refuses to disable SuperSpeed ports under the USB 3.0 roothub.
The code for initializing a new device context must be changed to set the
proper roothub port number. Since we've split the xHCI host into two
roothubs, we can't just use the port number in the ancestor hub. Instead,
we loop through the array of hardware port status register speeds and find
the Nth port with a similar speed.
The port status change event handler is updated to figure out whether the
port that reported the change is a USB 3.0 port, or a non-SuperSpeed port.
Once it figures out the port speed, it kicks the proper roothub.
The function to find a slot ID based on the port index is updated to take
into account that the two roothubs will have over-lapping port indexes.
It checks that the virtual device with a matching port index is the same
speed as the passed in roothub.
There's also changes to the driver initialization and shutdown paths:
1. Make sure that the xhci_hcd pointer is shared across the two
usb_hcd structures. The xhci_hcd pointer is allocated and the
registers are mapped in when xhci_pci_setup() is called with the
primary HCD. When xhci_pci_setup() is called with the non-primary
HCD, the xhci_hcd pointer is stored.
2. Make sure to set the sg_tablesize for both usb_hcd structures. Set
the PCI DMA mask for the non-primary HCD to allow for 64-bit or 32-bit
DMA. (The PCI DMA mask is set from the primary HCD further down in
the xhci_pci_setup() function.)
3. Ensure that the host controller doesn't start kicking khubd in
response to port status changes before both usb_hcd structures are
registered. xhci_run() only starts the xHC running once it has been
called with the non-primary roothub. Similarly, the xhci_stop()
function only halts the host controller when it is called with the
non-primary HCD. Then on the second call, it resets and cleans up the
MSI-X irqs.
Signed-off-by: Sarah Sharp <sarah.a.sharp@linux.intel.com>
2010-12-17 03:21:10 +08:00
|
|
|
|
static void xhci_disable_port(struct usb_hcd *hcd, struct xhci_hcd *xhci,
|
2011-03-29 10:40:46 +08:00
|
|
|
|
u16 wIndex, __le32 __iomem *addr, u32 port_status)
|
2009-12-10 07:59:11 +08:00
|
|
|
|
{
|
2010-11-17 07:58:52 +08:00
|
|
|
|
/* Don't allow the USB core to disable SuperSpeed ports. */
|
xhci: Register second xHCI roothub.
This patch changes the xHCI driver to allocate two roothubs. This touches
the driver initialization and shutdown paths, roothub emulation code, and
port status change event handlers. This is a rather large patch, but it
can't be broken up, or it would break git-bisect.
Make the xHCI driver register its own PCI probe function. This will call
the USB core to create the USB 2.0 roothub, and then create the USB 3.0
roothub. This gets the code for registering a shared roothub out of the
USB core, and allows other HCDs later to decide if and how many shared
roothubs they want to allocate.
Make sure the xHCI's reset method marks the xHCI host controller's primary
roothub as the USB 2.0 roothub. This ensures that the high speed bus will
be processed first when the PCI device is resumed, and any USB 3.0 devices
that have migrated over to high speed will migrate back after being reset.
This ensures that USB persist works with these odd devices.
The reset method will also mark the xHCI USB2 roothub as having an
integrated TT. Like EHCI host controllers with a "rate matching hub" the
xHCI USB 2.0 roothub doesn't have an OHCI or UHCI companion controller.
It doesn't really have a TT, but we'll lie and say it has an integrated
TT. We need to do this because the USB core will reject LS/FS devices
under a HS hub without a TT.
Other details:
-------------
The roothub emulation code is changed to return the correct number of
ports for the two roothubs. For the USB 3.0 roothub, it only reports the
USB 3.0 ports. For the USB 2.0 roothub, it reports all the LS/FS/HS
ports. The code to disable a port now checks the speed of the roothub,
and refuses to disable SuperSpeed ports under the USB 3.0 roothub.
The code for initializing a new device context must be changed to set the
proper roothub port number. Since we've split the xHCI host into two
roothubs, we can't just use the port number in the ancestor hub. Instead,
we loop through the array of hardware port status register speeds and find
the Nth port with a similar speed.
The port status change event handler is updated to figure out whether the
port that reported the change is a USB 3.0 port, or a non-SuperSpeed port.
Once it figures out the port speed, it kicks the proper roothub.
The function to find a slot ID based on the port index is updated to take
into account that the two roothubs will have over-lapping port indexes.
It checks that the virtual device with a matching port index is the same
speed as the passed in roothub.
There's also changes to the driver initialization and shutdown paths:
1. Make sure that the xhci_hcd pointer is shared across the two
usb_hcd structures. The xhci_hcd pointer is allocated and the
registers are mapped in when xhci_pci_setup() is called with the
primary HCD. When xhci_pci_setup() is called with the non-primary
HCD, the xhci_hcd pointer is stored.
2. Make sure to set the sg_tablesize for both usb_hcd structures. Set
the PCI DMA mask for the non-primary HCD to allow for 64-bit or 32-bit
DMA. (The PCI DMA mask is set from the primary HCD further down in
the xhci_pci_setup() function.)
3. Ensure that the host controller doesn't start kicking khubd in
response to port status changes before both usb_hcd structures are
registered. xhci_run() only starts the xHC running once it has been
called with the non-primary roothub. Similarly, the xhci_stop()
function only halts the host controller when it is called with the
non-primary HCD. Then on the second call, it resets and cleans up the
MSI-X irqs.
Signed-off-by: Sarah Sharp <sarah.a.sharp@linux.intel.com>
2010-12-17 03:21:10 +08:00
|
|
|
|
if (hcd->speed == HCD_USB3) {
|
2010-11-17 07:58:52 +08:00
|
|
|
|
xhci_dbg(xhci, "Ignoring request to disable "
|
|
|
|
|
"SuperSpeed port.\n");
|
|
|
|
|
return;
|
|
|
|
|
}
|
|
|
|
|
|
2009-12-10 07:59:11 +08:00
|
|
|
|
/* Write 1 to disable the port */
|
|
|
|
|
xhci_writel(xhci, port_status | PORT_PE, addr);
|
|
|
|
|
port_status = xhci_readl(xhci, addr);
|
|
|
|
|
xhci_dbg(xhci, "disable port, actual port %d status = 0x%x\n",
|
|
|
|
|
wIndex, port_status);
|
|
|
|
|
}
|
|
|
|
|
|
2009-12-10 07:59:08 +08:00
|
|
|
|
static void xhci_clear_port_change_bit(struct xhci_hcd *xhci, u16 wValue,
|
2011-03-29 10:40:46 +08:00
|
|
|
|
u16 wIndex, __le32 __iomem *addr, u32 port_status)
|
2009-12-10 07:59:08 +08:00
|
|
|
|
{
|
|
|
|
|
char *port_change_bit;
|
|
|
|
|
u32 status;
|
|
|
|
|
|
|
|
|
|
switch (wValue) {
|
|
|
|
|
case USB_PORT_FEAT_C_RESET:
|
|
|
|
|
status = PORT_RC;
|
|
|
|
|
port_change_bit = "reset";
|
|
|
|
|
break;
|
2011-04-27 18:07:29 +08:00
|
|
|
|
case USB_PORT_FEAT_C_BH_PORT_RESET:
|
|
|
|
|
status = PORT_WRC;
|
|
|
|
|
port_change_bit = "warm(BH) reset";
|
|
|
|
|
break;
|
2009-12-10 07:59:08 +08:00
|
|
|
|
case USB_PORT_FEAT_C_CONNECTION:
|
|
|
|
|
status = PORT_CSC;
|
|
|
|
|
port_change_bit = "connect";
|
|
|
|
|
break;
|
|
|
|
|
case USB_PORT_FEAT_C_OVER_CURRENT:
|
|
|
|
|
status = PORT_OCC;
|
|
|
|
|
port_change_bit = "over-current";
|
|
|
|
|
break;
|
2009-12-10 07:59:11 +08:00
|
|
|
|
case USB_PORT_FEAT_C_ENABLE:
|
|
|
|
|
status = PORT_PEC;
|
|
|
|
|
port_change_bit = "enable/disable";
|
|
|
|
|
break;
|
2010-10-14 22:22:57 +08:00
|
|
|
|
case USB_PORT_FEAT_C_SUSPEND:
|
|
|
|
|
status = PORT_PLC;
|
|
|
|
|
port_change_bit = "suspend/resume";
|
|
|
|
|
break;
|
2011-04-27 18:07:35 +08:00
|
|
|
|
case USB_PORT_FEAT_C_PORT_LINK_STATE:
|
|
|
|
|
status = PORT_PLC;
|
|
|
|
|
port_change_bit = "link state";
|
|
|
|
|
break;
|
2009-12-10 07:59:08 +08:00
|
|
|
|
default:
|
|
|
|
|
/* Should never happen */
|
|
|
|
|
return;
|
|
|
|
|
}
|
|
|
|
|
/* Change bits are all write 1 to clear */
|
|
|
|
|
xhci_writel(xhci, port_status | status, addr);
|
|
|
|
|
port_status = xhci_readl(xhci, addr);
|
|
|
|
|
xhci_dbg(xhci, "clear port %s change, actual port %d status = 0x%x\n",
|
|
|
|
|
port_change_bit, wIndex, port_status);
|
|
|
|
|
}
|
|
|
|
|
|
2011-05-03 21:11:00 +08:00
|
|
|
|
static int xhci_get_ports(struct usb_hcd *hcd, __le32 __iomem ***port_array)
|
|
|
|
|
{
|
|
|
|
|
int max_ports;
|
|
|
|
|
struct xhci_hcd *xhci = hcd_to_xhci(hcd);
|
|
|
|
|
|
|
|
|
|
if (hcd->speed == HCD_USB3) {
|
|
|
|
|
max_ports = xhci->num_usb3_ports;
|
|
|
|
|
*port_array = xhci->usb3_ports;
|
|
|
|
|
} else {
|
|
|
|
|
max_ports = xhci->num_usb2_ports;
|
|
|
|
|
*port_array = xhci->usb2_ports;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
return max_ports;
|
|
|
|
|
}
|
|
|
|
|
|
2011-09-24 05:19:48 +08:00
|
|
|
|
void xhci_set_link_state(struct xhci_hcd *xhci, __le32 __iomem **port_array,
|
|
|
|
|
int port_id, u32 link_state)
|
|
|
|
|
{
|
|
|
|
|
u32 temp;
|
|
|
|
|
|
|
|
|
|
temp = xhci_readl(xhci, port_array[port_id]);
|
|
|
|
|
temp = xhci_port_state_to_neutral(temp);
|
|
|
|
|
temp &= ~PORT_PLS_MASK;
|
|
|
|
|
temp |= PORT_LINK_STROBE | link_state;
|
|
|
|
|
xhci_writel(xhci, temp, port_array[port_id]);
|
|
|
|
|
}
|
|
|
|
|
|
2012-08-07 19:10:03 +08:00
|
|
|
|
static void xhci_set_remote_wake_mask(struct xhci_hcd *xhci,
|
USB/xHCI: Enable USB 3.0 hub remote wakeup.
USB 3.0 hubs have a different remote wakeup policy than USB 2.0 hubs.
USB 2.0 hubs, once they have remote wakeup enabled, will always send
remote wakes when anything changes on a port.
However, USB 3.0 hubs have a per-port remote wake up policy that is off
by default. The Set Feature remote wake mask can be changed for any
port, enabling remote wakeup for a connect, disconnect, or overcurrent
event, much like EHCI and xHCI host controller "wake on" port status
bits. The bits are cleared to zero on the initial hub power on, or
after the hub has been reset.
Without this patch, when a USB 3.0 hub gets suspended, it will not send
a remote wakeup on device connect or disconnect. This would show up to
the user as "dead ports" unless they ran lsusb -v (since newer versions
of lsusb use the sysfs files, rather than sending control transfers).
Change the hub driver's suspend method to enable remote wake up for
disconnect, connect, and overcurrent for all ports on the hub. Modify
the xHCI driver's roothub code to handle that request, and set the "wake
on" bits in the port status registers accordingly.
Signed-off-by: Sarah Sharp <sarah.a.sharp@linux.intel.com>
2012-01-07 02:34:31 +08:00
|
|
|
|
__le32 __iomem **port_array, int port_id, u16 wake_mask)
|
|
|
|
|
{
|
|
|
|
|
u32 temp;
|
|
|
|
|
|
|
|
|
|
temp = xhci_readl(xhci, port_array[port_id]);
|
|
|
|
|
temp = xhci_port_state_to_neutral(temp);
|
|
|
|
|
|
|
|
|
|
if (wake_mask & USB_PORT_FEAT_REMOTE_WAKE_CONNECT)
|
|
|
|
|
temp |= PORT_WKCONN_E;
|
|
|
|
|
else
|
|
|
|
|
temp &= ~PORT_WKCONN_E;
|
|
|
|
|
|
|
|
|
|
if (wake_mask & USB_PORT_FEAT_REMOTE_WAKE_DISCONNECT)
|
|
|
|
|
temp |= PORT_WKDISC_E;
|
|
|
|
|
else
|
|
|
|
|
temp &= ~PORT_WKDISC_E;
|
|
|
|
|
|
|
|
|
|
if (wake_mask & USB_PORT_FEAT_REMOTE_WAKE_OVER_CURRENT)
|
|
|
|
|
temp |= PORT_WKOC_E;
|
|
|
|
|
else
|
|
|
|
|
temp &= ~PORT_WKOC_E;
|
|
|
|
|
|
|
|
|
|
xhci_writel(xhci, temp, port_array[port_id]);
|
|
|
|
|
}
|
|
|
|
|
|
2011-09-24 05:19:49 +08:00
|
|
|
|
/* Test and clear port RWC bit */
|
|
|
|
|
void xhci_test_and_clear_bit(struct xhci_hcd *xhci, __le32 __iomem **port_array,
|
|
|
|
|
int port_id, u32 port_bit)
|
|
|
|
|
{
|
|
|
|
|
u32 temp;
|
|
|
|
|
|
|
|
|
|
temp = xhci_readl(xhci, port_array[port_id]);
|
|
|
|
|
if (temp & port_bit) {
|
|
|
|
|
temp = xhci_port_state_to_neutral(temp);
|
|
|
|
|
temp |= port_bit;
|
|
|
|
|
xhci_writel(xhci, temp, port_array[port_id]);
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
2012-06-18 21:20:00 +08:00
|
|
|
|
/* Updates Link Status for super Speed port */
|
|
|
|
|
static void xhci_hub_report_link_state(u32 *status, u32 status_reg)
|
|
|
|
|
{
|
|
|
|
|
u32 pls = status_reg & PORT_PLS_MASK;
|
|
|
|
|
|
|
|
|
|
/* resume state is a xHCI internal state.
|
|
|
|
|
* Do not report it to usb core.
|
|
|
|
|
*/
|
|
|
|
|
if (pls == XDEV_RESUME)
|
|
|
|
|
return;
|
|
|
|
|
|
|
|
|
|
/* When the CAS bit is set then warm reset
|
|
|
|
|
* should be performed on port
|
|
|
|
|
*/
|
|
|
|
|
if (status_reg & PORT_CAS) {
|
|
|
|
|
/* The CAS bit can be set while the port is
|
|
|
|
|
* in any link state.
|
|
|
|
|
* Only roothubs have CAS bit, so we
|
|
|
|
|
* pretend to be in compliance mode
|
|
|
|
|
* unless we're already in compliance
|
|
|
|
|
* or the inactive state.
|
|
|
|
|
*/
|
|
|
|
|
if (pls != USB_SS_PORT_LS_COMP_MOD &&
|
|
|
|
|
pls != USB_SS_PORT_LS_SS_INACTIVE) {
|
|
|
|
|
pls = USB_SS_PORT_LS_COMP_MOD;
|
|
|
|
|
}
|
|
|
|
|
/* Return also connection bit -
|
|
|
|
|
* hub state machine resets port
|
|
|
|
|
* when this bit is set.
|
|
|
|
|
*/
|
|
|
|
|
pls |= USB_PORT_STAT_CONNECTION;
|
usb: host: xhci: Fix Compliance Mode on SN65LVPE502CP Hardware
This patch is intended to work around a known issue on the
SN65LVPE502CP USB3.0 re-driver that can delay the negotiation
between a device and the host past the usual handshake timeout.
If that happens on the first insertion, the host controller
port will enter in Compliance Mode and NO port status event will
be generated (as per xHCI Spec) making impossible to detect this
event by software. The port will remain in compliance mode until
a warm reset is applied to it.
As a result of this, the port will seem "dead" to the user and no
device connections or disconnections will be detected.
For solving this, the patch creates a timer which polls every 2
seconds the link state of each host controller's port (this
by reading the PORTSC register) and recovers the port by issuing a
Warm reset every time Compliance mode is detected.
If a xHC USB3.0 port has previously entered to U0, the compliance
mode issue will NOT occur only until system resumes from
sleep/hibernate, therefore, the compliance mode timer is stopped
when all xHC USB 3.0 ports have entered U0. The timer is initialized
again after each system resume.
Since the issue is being caused by a piece of hardware, the timer
will be enabled ONLY on those systems that have the SN65LVPE502CP
installed (this patch uses DMI strings for detecting those systems)
therefore making this patch to act as a quirk (XHCI_COMP_MODE_QUIRK
has been added to the xhci stack).
This patch applies for these systems:
Vendor: Hewlett-Packard. System Models: Z420, Z620 and Z820.
This patch should be backported to kernels as old as 3.2, as that was
the first kernel to support warm reset. The kernels will need to
contain both commit 10d674a82e553cb8a1f41027bb3c3e309b3f6804 "USB: When
hot reset for USB3 fails, try warm reset" and commit
8bea2bd37df08aaa599aa361a9f8b836ba98e554 "usb: Add support for root hub
port status CAS". The first patch add warm reset support, and the
second patch modifies the USB core to issue a warm reset when the port
is in compliance mode.
Signed-off-by: Alexis R. Cortes <alexis.cortes@ti.com>
Signed-off-by: Sarah Sharp <sarah.a.sharp@linux.intel.com>
Cc: stable@vger.kernel.org
2012-08-04 03:00:27 +08:00
|
|
|
|
} else {
|
|
|
|
|
/*
|
|
|
|
|
* If CAS bit isn't set but the Port is already at
|
|
|
|
|
* Compliance Mode, fake a connection so the USB core
|
|
|
|
|
* notices the Compliance state and resets the port.
|
|
|
|
|
* This resolves an issue generated by the SN65LVPE502CP
|
|
|
|
|
* in which sometimes the port enters compliance mode
|
|
|
|
|
* caused by a delay on the host-device negotiation.
|
|
|
|
|
*/
|
|
|
|
|
if (pls == USB_SS_PORT_LS_COMP_MOD)
|
|
|
|
|
pls |= USB_PORT_STAT_CONNECTION;
|
2012-06-18 21:20:00 +08:00
|
|
|
|
}
|
usb: host: xhci: Fix Compliance Mode on SN65LVPE502CP Hardware
This patch is intended to work around a known issue on the
SN65LVPE502CP USB3.0 re-driver that can delay the negotiation
between a device and the host past the usual handshake timeout.
If that happens on the first insertion, the host controller
port will enter in Compliance Mode and NO port status event will
be generated (as per xHCI Spec) making impossible to detect this
event by software. The port will remain in compliance mode until
a warm reset is applied to it.
As a result of this, the port will seem "dead" to the user and no
device connections or disconnections will be detected.
For solving this, the patch creates a timer which polls every 2
seconds the link state of each host controller's port (this
by reading the PORTSC register) and recovers the port by issuing a
Warm reset every time Compliance mode is detected.
If a xHC USB3.0 port has previously entered to U0, the compliance
mode issue will NOT occur only until system resumes from
sleep/hibernate, therefore, the compliance mode timer is stopped
when all xHC USB 3.0 ports have entered U0. The timer is initialized
again after each system resume.
Since the issue is being caused by a piece of hardware, the timer
will be enabled ONLY on those systems that have the SN65LVPE502CP
installed (this patch uses DMI strings for detecting those systems)
therefore making this patch to act as a quirk (XHCI_COMP_MODE_QUIRK
has been added to the xhci stack).
This patch applies for these systems:
Vendor: Hewlett-Packard. System Models: Z420, Z620 and Z820.
This patch should be backported to kernels as old as 3.2, as that was
the first kernel to support warm reset. The kernels will need to
contain both commit 10d674a82e553cb8a1f41027bb3c3e309b3f6804 "USB: When
hot reset for USB3 fails, try warm reset" and commit
8bea2bd37df08aaa599aa361a9f8b836ba98e554 "usb: Add support for root hub
port status CAS". The first patch add warm reset support, and the
second patch modifies the USB core to issue a warm reset when the port
is in compliance mode.
Signed-off-by: Alexis R. Cortes <alexis.cortes@ti.com>
Signed-off-by: Sarah Sharp <sarah.a.sharp@linux.intel.com>
Cc: stable@vger.kernel.org
2012-08-04 03:00:27 +08:00
|
|
|
|
|
2012-06-18 21:20:00 +08:00
|
|
|
|
/* update status field */
|
|
|
|
|
*status |= pls;
|
|
|
|
|
}
|
|
|
|
|
|
usb: host: xhci: Fix Compliance Mode on SN65LVPE502CP Hardware
This patch is intended to work around a known issue on the
SN65LVPE502CP USB3.0 re-driver that can delay the negotiation
between a device and the host past the usual handshake timeout.
If that happens on the first insertion, the host controller
port will enter in Compliance Mode and NO port status event will
be generated (as per xHCI Spec) making impossible to detect this
event by software. The port will remain in compliance mode until
a warm reset is applied to it.
As a result of this, the port will seem "dead" to the user and no
device connections or disconnections will be detected.
For solving this, the patch creates a timer which polls every 2
seconds the link state of each host controller's port (this
by reading the PORTSC register) and recovers the port by issuing a
Warm reset every time Compliance mode is detected.
If a xHC USB3.0 port has previously entered to U0, the compliance
mode issue will NOT occur only until system resumes from
sleep/hibernate, therefore, the compliance mode timer is stopped
when all xHC USB 3.0 ports have entered U0. The timer is initialized
again after each system resume.
Since the issue is being caused by a piece of hardware, the timer
will be enabled ONLY on those systems that have the SN65LVPE502CP
installed (this patch uses DMI strings for detecting those systems)
therefore making this patch to act as a quirk (XHCI_COMP_MODE_QUIRK
has been added to the xhci stack).
This patch applies for these systems:
Vendor: Hewlett-Packard. System Models: Z420, Z620 and Z820.
This patch should be backported to kernels as old as 3.2, as that was
the first kernel to support warm reset. The kernels will need to
contain both commit 10d674a82e553cb8a1f41027bb3c3e309b3f6804 "USB: When
hot reset for USB3 fails, try warm reset" and commit
8bea2bd37df08aaa599aa361a9f8b836ba98e554 "usb: Add support for root hub
port status CAS". The first patch add warm reset support, and the
second patch modifies the USB core to issue a warm reset when the port
is in compliance mode.
Signed-off-by: Alexis R. Cortes <alexis.cortes@ti.com>
Signed-off-by: Sarah Sharp <sarah.a.sharp@linux.intel.com>
Cc: stable@vger.kernel.org
2012-08-04 03:00:27 +08:00
|
|
|
|
/*
|
|
|
|
|
* Function for Compliance Mode Quirk.
|
|
|
|
|
*
|
|
|
|
|
* This Function verifies if all xhc USB3 ports have entered U0, if so,
|
|
|
|
|
* the compliance mode timer is deleted. A port won't enter
|
|
|
|
|
* compliance mode if it has previously entered U0.
|
|
|
|
|
*/
|
|
|
|
|
void xhci_del_comp_mod_timer(struct xhci_hcd *xhci, u32 status, u16 wIndex)
|
|
|
|
|
{
|
|
|
|
|
u32 all_ports_seen_u0 = ((1 << xhci->num_usb3_ports)-1);
|
|
|
|
|
bool port_in_u0 = ((status & PORT_PLS_MASK) == XDEV_U0);
|
|
|
|
|
|
|
|
|
|
if (!(xhci->quirks & XHCI_COMP_MODE_QUIRK))
|
|
|
|
|
return;
|
|
|
|
|
|
|
|
|
|
if ((xhci->port_status_u0 != all_ports_seen_u0) && port_in_u0) {
|
|
|
|
|
xhci->port_status_u0 |= 1 << wIndex;
|
|
|
|
|
if (xhci->port_status_u0 == all_ports_seen_u0) {
|
|
|
|
|
del_timer_sync(&xhci->comp_mode_recovery_timer);
|
|
|
|
|
xhci_dbg(xhci, "All USB3 ports have entered U0 already!\n");
|
|
|
|
|
xhci_dbg(xhci, "Compliance Mode Recovery Timer Deleted.\n");
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
2009-04-28 10:57:12 +08:00
|
|
|
|
int xhci_hub_control(struct usb_hcd *hcd, u16 typeReq, u16 wValue,
|
|
|
|
|
u16 wIndex, char *buf, u16 wLength)
|
|
|
|
|
{
|
|
|
|
|
struct xhci_hcd *xhci = hcd_to_xhci(hcd);
|
2011-05-03 21:11:00 +08:00
|
|
|
|
int max_ports;
|
2009-04-28 10:57:12 +08:00
|
|
|
|
unsigned long flags;
|
2011-09-24 05:19:48 +08:00
|
|
|
|
u32 temp, status;
|
2009-04-28 10:57:12 +08:00
|
|
|
|
int retval = 0;
|
2011-03-29 10:40:46 +08:00
|
|
|
|
__le32 __iomem **port_array;
|
2010-10-14 22:22:57 +08:00
|
|
|
|
int slot_id;
|
2010-12-16 04:47:14 +08:00
|
|
|
|
struct xhci_bus_state *bus_state;
|
2011-04-27 18:07:39 +08:00
|
|
|
|
u16 link_state = 0;
|
USB/xHCI: Enable USB 3.0 hub remote wakeup.
USB 3.0 hubs have a different remote wakeup policy than USB 2.0 hubs.
USB 2.0 hubs, once they have remote wakeup enabled, will always send
remote wakes when anything changes on a port.
However, USB 3.0 hubs have a per-port remote wake up policy that is off
by default. The Set Feature remote wake mask can be changed for any
port, enabling remote wakeup for a connect, disconnect, or overcurrent
event, much like EHCI and xHCI host controller "wake on" port status
bits. The bits are cleared to zero on the initial hub power on, or
after the hub has been reset.
Without this patch, when a USB 3.0 hub gets suspended, it will not send
a remote wakeup on device connect or disconnect. This would show up to
the user as "dead ports" unless they ran lsusb -v (since newer versions
of lsusb use the sysfs files, rather than sending control transfers).
Change the hub driver's suspend method to enable remote wake up for
disconnect, connect, and overcurrent for all ports on the hub. Modify
the xHCI driver's roothub code to handle that request, and set the "wake
on" bits in the port status registers accordingly.
Signed-off-by: Sarah Sharp <sarah.a.sharp@linux.intel.com>
2012-01-07 02:34:31 +08:00
|
|
|
|
u16 wake_mask = 0;
|
2011-11-11 08:02:13 +08:00
|
|
|
|
u16 timeout = 0;
|
2009-04-28 10:57:12 +08:00
|
|
|
|
|
2011-05-03 21:11:00 +08:00
|
|
|
|
max_ports = xhci_get_ports(hcd, &port_array);
|
2010-12-16 04:47:14 +08:00
|
|
|
|
bus_state = &xhci->bus_state[hcd_index(hcd)];
|
2009-04-28 10:57:12 +08:00
|
|
|
|
|
|
|
|
|
spin_lock_irqsave(&xhci->lock, flags);
|
|
|
|
|
switch (typeReq) {
|
|
|
|
|
case GetHubStatus:
|
|
|
|
|
/* No power source, over-current reported per port */
|
|
|
|
|
memset(buf, 0, 4);
|
|
|
|
|
break;
|
|
|
|
|
case GetHubDescriptor:
|
2010-11-30 08:14:37 +08:00
|
|
|
|
/* Check to make sure userspace is asking for the USB 3.0 hub
|
|
|
|
|
* descriptor for the USB 3.0 roothub. If not, we stall the
|
|
|
|
|
* endpoint, like external hubs do.
|
|
|
|
|
*/
|
|
|
|
|
if (hcd->speed == HCD_USB3 &&
|
|
|
|
|
(wLength < USB_DT_SS_HUB_SIZE ||
|
|
|
|
|
wValue != (USB_DT_SS_HUB << 8))) {
|
|
|
|
|
xhci_dbg(xhci, "Wrong hub descriptor type for "
|
|
|
|
|
"USB 3.0 roothub.\n");
|
|
|
|
|
goto error;
|
|
|
|
|
}
|
xhci: Register second xHCI roothub.
This patch changes the xHCI driver to allocate two roothubs. This touches
the driver initialization and shutdown paths, roothub emulation code, and
port status change event handlers. This is a rather large patch, but it
can't be broken up, or it would break git-bisect.
Make the xHCI driver register its own PCI probe function. This will call
the USB core to create the USB 2.0 roothub, and then create the USB 3.0
roothub. This gets the code for registering a shared roothub out of the
USB core, and allows other HCDs later to decide if and how many shared
roothubs they want to allocate.
Make sure the xHCI's reset method marks the xHCI host controller's primary
roothub as the USB 2.0 roothub. This ensures that the high speed bus will
be processed first when the PCI device is resumed, and any USB 3.0 devices
that have migrated over to high speed will migrate back after being reset.
This ensures that USB persist works with these odd devices.
The reset method will also mark the xHCI USB2 roothub as having an
integrated TT. Like EHCI host controllers with a "rate matching hub" the
xHCI USB 2.0 roothub doesn't have an OHCI or UHCI companion controller.
It doesn't really have a TT, but we'll lie and say it has an integrated
TT. We need to do this because the USB core will reject LS/FS devices
under a HS hub without a TT.
Other details:
-------------
The roothub emulation code is changed to return the correct number of
ports for the two roothubs. For the USB 3.0 roothub, it only reports the
USB 3.0 ports. For the USB 2.0 roothub, it reports all the LS/FS/HS
ports. The code to disable a port now checks the speed of the roothub,
and refuses to disable SuperSpeed ports under the USB 3.0 roothub.
The code for initializing a new device context must be changed to set the
proper roothub port number. Since we've split the xHCI host into two
roothubs, we can't just use the port number in the ancestor hub. Instead,
we loop through the array of hardware port status register speeds and find
the Nth port with a similar speed.
The port status change event handler is updated to figure out whether the
port that reported the change is a USB 3.0 port, or a non-SuperSpeed port.
Once it figures out the port speed, it kicks the proper roothub.
The function to find a slot ID based on the port index is updated to take
into account that the two roothubs will have over-lapping port indexes.
It checks that the virtual device with a matching port index is the same
speed as the passed in roothub.
There's also changes to the driver initialization and shutdown paths:
1. Make sure that the xhci_hcd pointer is shared across the two
usb_hcd structures. The xhci_hcd pointer is allocated and the
registers are mapped in when xhci_pci_setup() is called with the
primary HCD. When xhci_pci_setup() is called with the non-primary
HCD, the xhci_hcd pointer is stored.
2. Make sure to set the sg_tablesize for both usb_hcd structures. Set
the PCI DMA mask for the non-primary HCD to allow for 64-bit or 32-bit
DMA. (The PCI DMA mask is set from the primary HCD further down in
the xhci_pci_setup() function.)
3. Ensure that the host controller doesn't start kicking khubd in
response to port status changes before both usb_hcd structures are
registered. xhci_run() only starts the xHC running once it has been
called with the non-primary roothub. Similarly, the xhci_stop()
function only halts the host controller when it is called with the
non-primary HCD. Then on the second call, it resets and cleans up the
MSI-X irqs.
Signed-off-by: Sarah Sharp <sarah.a.sharp@linux.intel.com>
2010-12-17 03:21:10 +08:00
|
|
|
|
xhci_hub_descriptor(hcd, xhci,
|
|
|
|
|
(struct usb_hub_descriptor *) buf);
|
2009-04-28 10:57:12 +08:00
|
|
|
|
break;
|
2011-10-07 02:54:23 +08:00
|
|
|
|
case DeviceRequest | USB_REQ_GET_DESCRIPTOR:
|
|
|
|
|
if ((wValue & 0xff00) != (USB_DT_BOS << 8))
|
|
|
|
|
goto error;
|
|
|
|
|
|
|
|
|
|
if (hcd->speed != HCD_USB3)
|
|
|
|
|
goto error;
|
|
|
|
|
|
2012-06-25 23:24:30 +08:00
|
|
|
|
/* Set the U1 and U2 exit latencies. */
|
2011-10-07 02:54:23 +08:00
|
|
|
|
memcpy(buf, &usb_bos_descriptor,
|
|
|
|
|
USB_DT_BOS_SIZE + USB_DT_USB_SS_CAP_SIZE);
|
|
|
|
|
temp = xhci_readl(xhci, &xhci->cap_regs->hcs_params3);
|
|
|
|
|
buf[12] = HCS_U1_LATENCY(temp);
|
|
|
|
|
put_unaligned_le16(HCS_U2_LATENCY(temp), &buf[13]);
|
|
|
|
|
|
2012-06-25 23:24:30 +08:00
|
|
|
|
/* Indicate whether the host has LTM support. */
|
|
|
|
|
temp = xhci_readl(xhci, &xhci->cap_regs->hcc_params);
|
|
|
|
|
if (HCC_LTC(temp))
|
|
|
|
|
buf[8] |= USB_LTM_SUPPORT;
|
|
|
|
|
|
2011-10-07 02:54:23 +08:00
|
|
|
|
spin_unlock_irqrestore(&xhci->lock, flags);
|
|
|
|
|
return USB_DT_BOS_SIZE + USB_DT_USB_SS_CAP_SIZE;
|
2009-04-28 10:57:12 +08:00
|
|
|
|
case GetPortStatus:
|
2011-05-03 21:11:00 +08:00
|
|
|
|
if (!wIndex || wIndex > max_ports)
|
2009-04-28 10:57:12 +08:00
|
|
|
|
goto error;
|
|
|
|
|
wIndex--;
|
|
|
|
|
status = 0;
|
2010-12-02 03:34:59 +08:00
|
|
|
|
temp = xhci_readl(xhci, port_array[wIndex]);
|
2010-10-30 05:37:23 +08:00
|
|
|
|
if (temp == 0xffffffff) {
|
|
|
|
|
retval = -ENODEV;
|
|
|
|
|
break;
|
|
|
|
|
}
|
2009-04-28 10:57:12 +08:00
|
|
|
|
xhci_dbg(xhci, "get port status, actual port %d status = 0x%x\n", wIndex, temp);
|
|
|
|
|
|
|
|
|
|
/* wPortChange bits */
|
|
|
|
|
if (temp & PORT_CSC)
|
2010-03-05 06:05:08 +08:00
|
|
|
|
status |= USB_PORT_STAT_C_CONNECTION << 16;
|
2009-04-28 10:57:12 +08:00
|
|
|
|
if (temp & PORT_PEC)
|
2010-03-05 06:05:08 +08:00
|
|
|
|
status |= USB_PORT_STAT_C_ENABLE << 16;
|
2009-04-28 10:57:12 +08:00
|
|
|
|
if ((temp & PORT_OCC))
|
2010-03-05 06:05:08 +08:00
|
|
|
|
status |= USB_PORT_STAT_C_OVERCURRENT << 16;
|
2011-04-27 18:07:43 +08:00
|
|
|
|
if ((temp & PORT_RC))
|
|
|
|
|
status |= USB_PORT_STAT_C_RESET << 16;
|
|
|
|
|
/* USB3.0 only */
|
|
|
|
|
if (hcd->speed == HCD_USB3) {
|
|
|
|
|
if ((temp & PORT_PLC))
|
|
|
|
|
status |= USB_PORT_STAT_C_LINK_STATE << 16;
|
|
|
|
|
if ((temp & PORT_WRC))
|
|
|
|
|
status |= USB_PORT_STAT_C_BH_RESET << 16;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
if (hcd->speed != HCD_USB3) {
|
|
|
|
|
if ((temp & PORT_PLS_MASK) == XDEV_U3
|
|
|
|
|
&& (temp & PORT_POWER))
|
|
|
|
|
status |= USB_PORT_STAT_SUSPEND;
|
|
|
|
|
}
|
xHCI: report USB2 port in resuming as suspend
When a USB2 port initiate a remote wakeup, software shall ensure that
resume is signaled for at least 20ms, and then write '0' to the PLS field.
According to this, xhci driver do the following things:
1. When receive a remote wakeup event in irq_handler, set the resume_done
value as jiffies + 20ms, and modify rh_timer to poll root hub status at
that time;
2. When receive a GetPortStatus request, if the jiffies is after the
resume_done value, clear the resume signal and resume_done.
However, if usb_port_resume() is called before the rh_timer triggered, it
will indicate the port as Suspend Cleared and skip the clear resume signal
part. The device will fail the usb_get_status request in finish_port_resume(),
and usbcore will try a reset-resume instead. Device will work OK after
reset-resume, but resume_done value is not cleared in this case, and
xhci_bus_suspend() will fail because when it finds a non-zero resume_done
value, it will regard the port as resuming and return -EBUSY.
This causes issue on some platforms that the system fail to suspend
after remote wakeup from suspend by USB2 devices connected to xHCI port.
To fix this issue, report the port status as suspend if the resume is
signaling less that 20ms, and usb_port_resume() will wait 25ms and check
port status again, so xHCI driver can clear the resume signaling and
resume_done value.
This should be backported to kernels as old as 2.6.37.
Signed-off-by: Andiry Xu <andiry.xu@amd.com>
Signed-off-by: Sarah Sharp <sarah.a.sharp@linux.intel.com>
Cc: stable@kernel.org
2011-08-03 16:46:49 +08:00
|
|
|
|
if ((temp & PORT_PLS_MASK) == XDEV_RESUME &&
|
|
|
|
|
!DEV_SUPERSPEED(temp)) {
|
2010-10-14 22:23:00 +08:00
|
|
|
|
if ((temp & PORT_RESET) || !(temp & PORT_PE))
|
|
|
|
|
goto error;
|
xHCI: report USB2 port in resuming as suspend
When a USB2 port initiate a remote wakeup, software shall ensure that
resume is signaled for at least 20ms, and then write '0' to the PLS field.
According to this, xhci driver do the following things:
1. When receive a remote wakeup event in irq_handler, set the resume_done
value as jiffies + 20ms, and modify rh_timer to poll root hub status at
that time;
2. When receive a GetPortStatus request, if the jiffies is after the
resume_done value, clear the resume signal and resume_done.
However, if usb_port_resume() is called before the rh_timer triggered, it
will indicate the port as Suspend Cleared and skip the clear resume signal
part. The device will fail the usb_get_status request in finish_port_resume(),
and usbcore will try a reset-resume instead. Device will work OK after
reset-resume, but resume_done value is not cleared in this case, and
xhci_bus_suspend() will fail because when it finds a non-zero resume_done
value, it will regard the port as resuming and return -EBUSY.
This causes issue on some platforms that the system fail to suspend
after remote wakeup from suspend by USB2 devices connected to xHCI port.
To fix this issue, report the port status as suspend if the resume is
signaling less that 20ms, and usb_port_resume() will wait 25ms and check
port status again, so xHCI driver can clear the resume signaling and
resume_done value.
This should be backported to kernels as old as 2.6.37.
Signed-off-by: Andiry Xu <andiry.xu@amd.com>
Signed-off-by: Sarah Sharp <sarah.a.sharp@linux.intel.com>
Cc: stable@kernel.org
2011-08-03 16:46:49 +08:00
|
|
|
|
if (time_after_eq(jiffies,
|
|
|
|
|
bus_state->resume_done[wIndex])) {
|
2010-10-14 22:23:00 +08:00
|
|
|
|
xhci_dbg(xhci, "Resume USB2 port %d\n",
|
|
|
|
|
wIndex + 1);
|
2010-12-16 04:47:14 +08:00
|
|
|
|
bus_state->resume_done[wIndex] = 0;
|
2012-04-14 02:54:30 +08:00
|
|
|
|
clear_bit(wIndex, &bus_state->resuming_ports);
|
2011-09-24 05:19:48 +08:00
|
|
|
|
xhci_set_link_state(xhci, port_array, wIndex,
|
|
|
|
|
XDEV_U0);
|
2010-10-14 22:23:00 +08:00
|
|
|
|
xhci_dbg(xhci, "set port %d resume\n",
|
|
|
|
|
wIndex + 1);
|
2010-12-17 02:49:09 +08:00
|
|
|
|
slot_id = xhci_find_slot_id_by_port(hcd, xhci,
|
2010-10-14 22:23:00 +08:00
|
|
|
|
wIndex + 1);
|
|
|
|
|
if (!slot_id) {
|
|
|
|
|
xhci_dbg(xhci, "slot_id is zero\n");
|
|
|
|
|
goto error;
|
|
|
|
|
}
|
|
|
|
|
xhci_ring_device(xhci, slot_id);
|
2010-12-16 04:47:14 +08:00
|
|
|
|
bus_state->port_c_suspend |= 1 << wIndex;
|
|
|
|
|
bus_state->suspended_ports &= ~(1 << wIndex);
|
xHCI: report USB2 port in resuming as suspend
When a USB2 port initiate a remote wakeup, software shall ensure that
resume is signaled for at least 20ms, and then write '0' to the PLS field.
According to this, xhci driver do the following things:
1. When receive a remote wakeup event in irq_handler, set the resume_done
value as jiffies + 20ms, and modify rh_timer to poll root hub status at
that time;
2. When receive a GetPortStatus request, if the jiffies is after the
resume_done value, clear the resume signal and resume_done.
However, if usb_port_resume() is called before the rh_timer triggered, it
will indicate the port as Suspend Cleared and skip the clear resume signal
part. The device will fail the usb_get_status request in finish_port_resume(),
and usbcore will try a reset-resume instead. Device will work OK after
reset-resume, but resume_done value is not cleared in this case, and
xhci_bus_suspend() will fail because when it finds a non-zero resume_done
value, it will regard the port as resuming and return -EBUSY.
This causes issue on some platforms that the system fail to suspend
after remote wakeup from suspend by USB2 devices connected to xHCI port.
To fix this issue, report the port status as suspend if the resume is
signaling less that 20ms, and usb_port_resume() will wait 25ms and check
port status again, so xHCI driver can clear the resume signaling and
resume_done value.
This should be backported to kernels as old as 2.6.37.
Signed-off-by: Andiry Xu <andiry.xu@amd.com>
Signed-off-by: Sarah Sharp <sarah.a.sharp@linux.intel.com>
Cc: stable@kernel.org
2011-08-03 16:46:49 +08:00
|
|
|
|
} else {
|
|
|
|
|
/*
|
|
|
|
|
* The resume has been signaling for less than
|
|
|
|
|
* 20ms. Report the port status as SUSPEND,
|
|
|
|
|
* let the usbcore check port status again
|
|
|
|
|
* and clear resume signaling later.
|
|
|
|
|
*/
|
|
|
|
|
status |= USB_PORT_STAT_SUSPEND;
|
2010-10-14 22:23:00 +08:00
|
|
|
|
}
|
|
|
|
|
}
|
2010-10-14 22:22:57 +08:00
|
|
|
|
if ((temp & PORT_PLS_MASK) == XDEV_U0
|
|
|
|
|
&& (temp & PORT_POWER)
|
2010-12-16 04:47:14 +08:00
|
|
|
|
&& (bus_state->suspended_ports & (1 << wIndex))) {
|
|
|
|
|
bus_state->suspended_ports &= ~(1 << wIndex);
|
2011-04-27 18:07:50 +08:00
|
|
|
|
if (hcd->speed != HCD_USB3)
|
|
|
|
|
bus_state->port_c_suspend |= 1 << wIndex;
|
2010-10-14 22:22:57 +08:00
|
|
|
|
}
|
2009-04-28 10:57:12 +08:00
|
|
|
|
if (temp & PORT_CONNECT) {
|
2010-03-05 06:05:08 +08:00
|
|
|
|
status |= USB_PORT_STAT_CONNECTION;
|
2009-04-28 10:57:12 +08:00
|
|
|
|
status |= xhci_port_speed(temp);
|
|
|
|
|
}
|
|
|
|
|
if (temp & PORT_PE)
|
2010-03-05 06:05:08 +08:00
|
|
|
|
status |= USB_PORT_STAT_ENABLE;
|
2009-04-28 10:57:12 +08:00
|
|
|
|
if (temp & PORT_OC)
|
2010-03-05 06:05:08 +08:00
|
|
|
|
status |= USB_PORT_STAT_OVERCURRENT;
|
2009-04-28 10:57:12 +08:00
|
|
|
|
if (temp & PORT_RESET)
|
2010-03-05 06:05:08 +08:00
|
|
|
|
status |= USB_PORT_STAT_RESET;
|
2011-04-27 18:07:43 +08:00
|
|
|
|
if (temp & PORT_POWER) {
|
|
|
|
|
if (hcd->speed == HCD_USB3)
|
|
|
|
|
status |= USB_SS_PORT_STAT_POWER;
|
|
|
|
|
else
|
|
|
|
|
status |= USB_PORT_STAT_POWER;
|
|
|
|
|
}
|
2012-06-18 21:20:00 +08:00
|
|
|
|
/* Update Port Link State for super speed ports*/
|
2011-04-27 18:07:43 +08:00
|
|
|
|
if (hcd->speed == HCD_USB3) {
|
2012-06-18 21:20:00 +08:00
|
|
|
|
xhci_hub_report_link_state(&status, temp);
|
usb: host: xhci: Fix Compliance Mode on SN65LVPE502CP Hardware
This patch is intended to work around a known issue on the
SN65LVPE502CP USB3.0 re-driver that can delay the negotiation
between a device and the host past the usual handshake timeout.
If that happens on the first insertion, the host controller
port will enter in Compliance Mode and NO port status event will
be generated (as per xHCI Spec) making impossible to detect this
event by software. The port will remain in compliance mode until
a warm reset is applied to it.
As a result of this, the port will seem "dead" to the user and no
device connections or disconnections will be detected.
For solving this, the patch creates a timer which polls every 2
seconds the link state of each host controller's port (this
by reading the PORTSC register) and recovers the port by issuing a
Warm reset every time Compliance mode is detected.
If a xHC USB3.0 port has previously entered to U0, the compliance
mode issue will NOT occur only until system resumes from
sleep/hibernate, therefore, the compliance mode timer is stopped
when all xHC USB 3.0 ports have entered U0. The timer is initialized
again after each system resume.
Since the issue is being caused by a piece of hardware, the timer
will be enabled ONLY on those systems that have the SN65LVPE502CP
installed (this patch uses DMI strings for detecting those systems)
therefore making this patch to act as a quirk (XHCI_COMP_MODE_QUIRK
has been added to the xhci stack).
This patch applies for these systems:
Vendor: Hewlett-Packard. System Models: Z420, Z620 and Z820.
This patch should be backported to kernels as old as 3.2, as that was
the first kernel to support warm reset. The kernels will need to
contain both commit 10d674a82e553cb8a1f41027bb3c3e309b3f6804 "USB: When
hot reset for USB3 fails, try warm reset" and commit
8bea2bd37df08aaa599aa361a9f8b836ba98e554 "usb: Add support for root hub
port status CAS". The first patch add warm reset support, and the
second patch modifies the USB core to issue a warm reset when the port
is in compliance mode.
Signed-off-by: Alexis R. Cortes <alexis.cortes@ti.com>
Signed-off-by: Sarah Sharp <sarah.a.sharp@linux.intel.com>
Cc: stable@vger.kernel.org
2012-08-04 03:00:27 +08:00
|
|
|
|
/*
|
|
|
|
|
* Verify if all USB3 Ports Have entered U0 already.
|
|
|
|
|
* Delete Compliance Mode Timer if so.
|
|
|
|
|
*/
|
|
|
|
|
xhci_del_comp_mod_timer(xhci, temp, wIndex);
|
2011-04-27 18:07:43 +08:00
|
|
|
|
}
|
2010-12-16 04:47:14 +08:00
|
|
|
|
if (bus_state->port_c_suspend & (1 << wIndex))
|
2010-10-14 22:22:57 +08:00
|
|
|
|
status |= 1 << USB_PORT_FEAT_C_SUSPEND;
|
2009-04-28 10:57:12 +08:00
|
|
|
|
xhci_dbg(xhci, "Get port status returned 0x%x\n", status);
|
|
|
|
|
put_unaligned(cpu_to_le32(status), (__le32 *) buf);
|
|
|
|
|
break;
|
|
|
|
|
case SetPortFeature:
|
2011-04-27 18:07:39 +08:00
|
|
|
|
if (wValue == USB_PORT_FEAT_LINK_STATE)
|
|
|
|
|
link_state = (wIndex & 0xff00) >> 3;
|
USB/xHCI: Enable USB 3.0 hub remote wakeup.
USB 3.0 hubs have a different remote wakeup policy than USB 2.0 hubs.
USB 2.0 hubs, once they have remote wakeup enabled, will always send
remote wakes when anything changes on a port.
However, USB 3.0 hubs have a per-port remote wake up policy that is off
by default. The Set Feature remote wake mask can be changed for any
port, enabling remote wakeup for a connect, disconnect, or overcurrent
event, much like EHCI and xHCI host controller "wake on" port status
bits. The bits are cleared to zero on the initial hub power on, or
after the hub has been reset.
Without this patch, when a USB 3.0 hub gets suspended, it will not send
a remote wakeup on device connect or disconnect. This would show up to
the user as "dead ports" unless they ran lsusb -v (since newer versions
of lsusb use the sysfs files, rather than sending control transfers).
Change the hub driver's suspend method to enable remote wake up for
disconnect, connect, and overcurrent for all ports on the hub. Modify
the xHCI driver's roothub code to handle that request, and set the "wake
on" bits in the port status registers accordingly.
Signed-off-by: Sarah Sharp <sarah.a.sharp@linux.intel.com>
2012-01-07 02:34:31 +08:00
|
|
|
|
if (wValue == USB_PORT_FEAT_REMOTE_WAKE_MASK)
|
|
|
|
|
wake_mask = wIndex & 0xff00;
|
2011-11-11 08:02:13 +08:00
|
|
|
|
/* The MSB of wIndex is the U1/U2 timeout */
|
|
|
|
|
timeout = (wIndex & 0xff00) >> 8;
|
2009-04-28 10:57:12 +08:00
|
|
|
|
wIndex &= 0xff;
|
2011-05-03 21:11:00 +08:00
|
|
|
|
if (!wIndex || wIndex > max_ports)
|
2009-04-28 10:57:12 +08:00
|
|
|
|
goto error;
|
|
|
|
|
wIndex--;
|
2010-12-02 03:34:59 +08:00
|
|
|
|
temp = xhci_readl(xhci, port_array[wIndex]);
|
2010-10-30 05:37:23 +08:00
|
|
|
|
if (temp == 0xffffffff) {
|
|
|
|
|
retval = -ENODEV;
|
|
|
|
|
break;
|
|
|
|
|
}
|
2009-04-28 10:57:12 +08:00
|
|
|
|
temp = xhci_port_state_to_neutral(temp);
|
2010-11-30 08:14:37 +08:00
|
|
|
|
/* FIXME: What new port features do we need to support? */
|
2009-04-28 10:57:12 +08:00
|
|
|
|
switch (wValue) {
|
2010-10-14 22:22:57 +08:00
|
|
|
|
case USB_PORT_FEAT_SUSPEND:
|
2010-12-02 03:34:59 +08:00
|
|
|
|
temp = xhci_readl(xhci, port_array[wIndex]);
|
2011-09-24 05:19:52 +08:00
|
|
|
|
if ((temp & PORT_PLS_MASK) != XDEV_U0) {
|
|
|
|
|
/* Resume the port to U0 first */
|
|
|
|
|
xhci_set_link_state(xhci, port_array, wIndex,
|
|
|
|
|
XDEV_U0);
|
|
|
|
|
spin_unlock_irqrestore(&xhci->lock, flags);
|
|
|
|
|
msleep(10);
|
|
|
|
|
spin_lock_irqsave(&xhci->lock, flags);
|
|
|
|
|
}
|
2010-10-14 22:22:57 +08:00
|
|
|
|
/* In spec software should not attempt to suspend
|
|
|
|
|
* a port unless the port reports that it is in the
|
|
|
|
|
* enabled (PED = ‘1’,PLS < ‘3’) state.
|
|
|
|
|
*/
|
2011-09-24 05:19:52 +08:00
|
|
|
|
temp = xhci_readl(xhci, port_array[wIndex]);
|
2010-10-14 22:22:57 +08:00
|
|
|
|
if ((temp & PORT_PE) == 0 || (temp & PORT_RESET)
|
|
|
|
|
|| (temp & PORT_PLS_MASK) >= XDEV_U3) {
|
|
|
|
|
xhci_warn(xhci, "USB core suspending device "
|
|
|
|
|
"not in U0/U1/U2.\n");
|
|
|
|
|
goto error;
|
|
|
|
|
}
|
|
|
|
|
|
2010-12-17 02:49:09 +08:00
|
|
|
|
slot_id = xhci_find_slot_id_by_port(hcd, xhci,
|
|
|
|
|
wIndex + 1);
|
2010-10-14 22:22:57 +08:00
|
|
|
|
if (!slot_id) {
|
|
|
|
|
xhci_warn(xhci, "slot_id is zero\n");
|
|
|
|
|
goto error;
|
|
|
|
|
}
|
|
|
|
|
/* unlock to execute stop endpoint commands */
|
|
|
|
|
spin_unlock_irqrestore(&xhci->lock, flags);
|
|
|
|
|
xhci_stop_device(xhci, slot_id, 1);
|
|
|
|
|
spin_lock_irqsave(&xhci->lock, flags);
|
|
|
|
|
|
2011-09-24 05:19:48 +08:00
|
|
|
|
xhci_set_link_state(xhci, port_array, wIndex, XDEV_U3);
|
2010-10-14 22:22:57 +08:00
|
|
|
|
|
|
|
|
|
spin_unlock_irqrestore(&xhci->lock, flags);
|
|
|
|
|
msleep(10); /* wait device to enter */
|
|
|
|
|
spin_lock_irqsave(&xhci->lock, flags);
|
|
|
|
|
|
2010-12-02 03:34:59 +08:00
|
|
|
|
temp = xhci_readl(xhci, port_array[wIndex]);
|
2010-12-16 04:47:14 +08:00
|
|
|
|
bus_state->suspended_ports |= 1 << wIndex;
|
2010-10-14 22:22:57 +08:00
|
|
|
|
break;
|
2011-04-27 18:07:39 +08:00
|
|
|
|
case USB_PORT_FEAT_LINK_STATE:
|
|
|
|
|
temp = xhci_readl(xhci, port_array[wIndex]);
|
|
|
|
|
/* Software should not attempt to set
|
|
|
|
|
* port link state above '5' (Rx.Detect) and the port
|
|
|
|
|
* must be enabled.
|
|
|
|
|
*/
|
|
|
|
|
if ((temp & PORT_PE) == 0 ||
|
|
|
|
|
(link_state > USB_SS_PORT_LS_RX_DETECT)) {
|
|
|
|
|
xhci_warn(xhci, "Cannot set link state.\n");
|
|
|
|
|
goto error;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
if (link_state == USB_SS_PORT_LS_U3) {
|
|
|
|
|
slot_id = xhci_find_slot_id_by_port(hcd, xhci,
|
|
|
|
|
wIndex + 1);
|
|
|
|
|
if (slot_id) {
|
|
|
|
|
/* unlock to execute stop endpoint
|
|
|
|
|
* commands */
|
|
|
|
|
spin_unlock_irqrestore(&xhci->lock,
|
|
|
|
|
flags);
|
|
|
|
|
xhci_stop_device(xhci, slot_id, 1);
|
|
|
|
|
spin_lock_irqsave(&xhci->lock, flags);
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
2011-09-24 05:19:48 +08:00
|
|
|
|
xhci_set_link_state(xhci, port_array, wIndex,
|
|
|
|
|
link_state);
|
2011-04-27 18:07:39 +08:00
|
|
|
|
|
|
|
|
|
spin_unlock_irqrestore(&xhci->lock, flags);
|
|
|
|
|
msleep(20); /* wait device to enter */
|
|
|
|
|
spin_lock_irqsave(&xhci->lock, flags);
|
|
|
|
|
|
|
|
|
|
temp = xhci_readl(xhci, port_array[wIndex]);
|
|
|
|
|
if (link_state == USB_SS_PORT_LS_U3)
|
|
|
|
|
bus_state->suspended_ports |= 1 << wIndex;
|
|
|
|
|
break;
|
2009-04-28 10:57:12 +08:00
|
|
|
|
case USB_PORT_FEAT_POWER:
|
|
|
|
|
/*
|
|
|
|
|
* Turn on ports, even if there isn't per-port switching.
|
|
|
|
|
* HC will report connect events even before this is set.
|
|
|
|
|
* However, khubd will ignore the roothub events until
|
|
|
|
|
* the roothub is registered.
|
|
|
|
|
*/
|
2010-12-02 03:34:59 +08:00
|
|
|
|
xhci_writel(xhci, temp | PORT_POWER,
|
|
|
|
|
port_array[wIndex]);
|
2009-04-28 10:57:12 +08:00
|
|
|
|
|
2010-12-02 03:34:59 +08:00
|
|
|
|
temp = xhci_readl(xhci, port_array[wIndex]);
|
2009-04-28 10:57:12 +08:00
|
|
|
|
xhci_dbg(xhci, "set port power, actual port %d status = 0x%x\n", wIndex, temp);
|
2012-09-05 13:44:36 +08:00
|
|
|
|
|
2012-10-15 15:38:34 +08:00
|
|
|
|
spin_unlock_irqrestore(&xhci->lock, flags);
|
2012-09-05 13:44:36 +08:00
|
|
|
|
temp = usb_acpi_power_manageable(hcd->self.root_hub,
|
|
|
|
|
wIndex);
|
|
|
|
|
if (temp)
|
|
|
|
|
usb_acpi_set_power_state(hcd->self.root_hub,
|
|
|
|
|
wIndex, true);
|
2012-10-15 15:38:34 +08:00
|
|
|
|
spin_lock_irqsave(&xhci->lock, flags);
|
2009-04-28 10:57:12 +08:00
|
|
|
|
break;
|
|
|
|
|
case USB_PORT_FEAT_RESET:
|
|
|
|
|
temp = (temp | PORT_RESET);
|
2010-12-02 03:34:59 +08:00
|
|
|
|
xhci_writel(xhci, temp, port_array[wIndex]);
|
2009-04-28 10:57:12 +08:00
|
|
|
|
|
2010-12-02 03:34:59 +08:00
|
|
|
|
temp = xhci_readl(xhci, port_array[wIndex]);
|
2009-04-28 10:57:12 +08:00
|
|
|
|
xhci_dbg(xhci, "set port reset, actual port %d status = 0x%x\n", wIndex, temp);
|
|
|
|
|
break;
|
USB/xHCI: Enable USB 3.0 hub remote wakeup.
USB 3.0 hubs have a different remote wakeup policy than USB 2.0 hubs.
USB 2.0 hubs, once they have remote wakeup enabled, will always send
remote wakes when anything changes on a port.
However, USB 3.0 hubs have a per-port remote wake up policy that is off
by default. The Set Feature remote wake mask can be changed for any
port, enabling remote wakeup for a connect, disconnect, or overcurrent
event, much like EHCI and xHCI host controller "wake on" port status
bits. The bits are cleared to zero on the initial hub power on, or
after the hub has been reset.
Without this patch, when a USB 3.0 hub gets suspended, it will not send
a remote wakeup on device connect or disconnect. This would show up to
the user as "dead ports" unless they ran lsusb -v (since newer versions
of lsusb use the sysfs files, rather than sending control transfers).
Change the hub driver's suspend method to enable remote wake up for
disconnect, connect, and overcurrent for all ports on the hub. Modify
the xHCI driver's roothub code to handle that request, and set the "wake
on" bits in the port status registers accordingly.
Signed-off-by: Sarah Sharp <sarah.a.sharp@linux.intel.com>
2012-01-07 02:34:31 +08:00
|
|
|
|
case USB_PORT_FEAT_REMOTE_WAKE_MASK:
|
|
|
|
|
xhci_set_remote_wake_mask(xhci, port_array,
|
|
|
|
|
wIndex, wake_mask);
|
|
|
|
|
temp = xhci_readl(xhci, port_array[wIndex]);
|
|
|
|
|
xhci_dbg(xhci, "set port remote wake mask, "
|
|
|
|
|
"actual port %d status = 0x%x\n",
|
|
|
|
|
wIndex, temp);
|
|
|
|
|
break;
|
2011-04-27 18:07:29 +08:00
|
|
|
|
case USB_PORT_FEAT_BH_PORT_RESET:
|
|
|
|
|
temp |= PORT_WR;
|
|
|
|
|
xhci_writel(xhci, temp, port_array[wIndex]);
|
|
|
|
|
|
|
|
|
|
temp = xhci_readl(xhci, port_array[wIndex]);
|
|
|
|
|
break;
|
2011-11-11 08:02:13 +08:00
|
|
|
|
case USB_PORT_FEAT_U1_TIMEOUT:
|
|
|
|
|
if (hcd->speed != HCD_USB3)
|
|
|
|
|
goto error;
|
|
|
|
|
temp = xhci_readl(xhci, port_array[wIndex] + 1);
|
|
|
|
|
temp &= ~PORT_U1_TIMEOUT_MASK;
|
|
|
|
|
temp |= PORT_U1_TIMEOUT(timeout);
|
|
|
|
|
xhci_writel(xhci, temp, port_array[wIndex] + 1);
|
|
|
|
|
break;
|
|
|
|
|
case USB_PORT_FEAT_U2_TIMEOUT:
|
|
|
|
|
if (hcd->speed != HCD_USB3)
|
|
|
|
|
goto error;
|
|
|
|
|
temp = xhci_readl(xhci, port_array[wIndex] + 1);
|
|
|
|
|
temp &= ~PORT_U2_TIMEOUT_MASK;
|
|
|
|
|
temp |= PORT_U2_TIMEOUT(timeout);
|
|
|
|
|
xhci_writel(xhci, temp, port_array[wIndex] + 1);
|
|
|
|
|
break;
|
2009-04-28 10:57:12 +08:00
|
|
|
|
default:
|
|
|
|
|
goto error;
|
|
|
|
|
}
|
2010-12-02 03:34:59 +08:00
|
|
|
|
/* unblock any posted writes */
|
|
|
|
|
temp = xhci_readl(xhci, port_array[wIndex]);
|
2009-04-28 10:57:12 +08:00
|
|
|
|
break;
|
|
|
|
|
case ClearPortFeature:
|
2011-05-03 21:11:00 +08:00
|
|
|
|
if (!wIndex || wIndex > max_ports)
|
2009-04-28 10:57:12 +08:00
|
|
|
|
goto error;
|
|
|
|
|
wIndex--;
|
2010-12-02 03:34:59 +08:00
|
|
|
|
temp = xhci_readl(xhci, port_array[wIndex]);
|
2010-10-30 05:37:23 +08:00
|
|
|
|
if (temp == 0xffffffff) {
|
|
|
|
|
retval = -ENODEV;
|
|
|
|
|
break;
|
|
|
|
|
}
|
2010-11-30 08:14:37 +08:00
|
|
|
|
/* FIXME: What new port features do we need to support? */
|
2009-04-28 10:57:12 +08:00
|
|
|
|
temp = xhci_port_state_to_neutral(temp);
|
|
|
|
|
switch (wValue) {
|
2010-10-14 22:22:57 +08:00
|
|
|
|
case USB_PORT_FEAT_SUSPEND:
|
2010-12-02 03:34:59 +08:00
|
|
|
|
temp = xhci_readl(xhci, port_array[wIndex]);
|
2010-10-14 22:22:57 +08:00
|
|
|
|
xhci_dbg(xhci, "clear USB_PORT_FEAT_SUSPEND\n");
|
|
|
|
|
xhci_dbg(xhci, "PORTSC %04x\n", temp);
|
|
|
|
|
if (temp & PORT_RESET)
|
|
|
|
|
goto error;
|
2011-08-03 16:46:48 +08:00
|
|
|
|
if ((temp & PORT_PLS_MASK) == XDEV_U3) {
|
2010-10-14 22:22:57 +08:00
|
|
|
|
if ((temp & PORT_PE) == 0)
|
|
|
|
|
goto error;
|
|
|
|
|
|
2011-09-24 05:19:48 +08:00
|
|
|
|
xhci_set_link_state(xhci, port_array, wIndex,
|
|
|
|
|
XDEV_RESUME);
|
|
|
|
|
spin_unlock_irqrestore(&xhci->lock, flags);
|
2011-04-27 18:07:50 +08:00
|
|
|
|
msleep(20);
|
|
|
|
|
spin_lock_irqsave(&xhci->lock, flags);
|
2011-09-24 05:19:48 +08:00
|
|
|
|
xhci_set_link_state(xhci, port_array, wIndex,
|
|
|
|
|
XDEV_U0);
|
2010-10-14 22:22:57 +08:00
|
|
|
|
}
|
2011-04-27 18:07:50 +08:00
|
|
|
|
bus_state->port_c_suspend |= 1 << wIndex;
|
2010-10-14 22:22:57 +08:00
|
|
|
|
|
2010-12-17 02:49:09 +08:00
|
|
|
|
slot_id = xhci_find_slot_id_by_port(hcd, xhci,
|
|
|
|
|
wIndex + 1);
|
2010-10-14 22:22:57 +08:00
|
|
|
|
if (!slot_id) {
|
|
|
|
|
xhci_dbg(xhci, "slot_id is zero\n");
|
|
|
|
|
goto error;
|
|
|
|
|
}
|
|
|
|
|
xhci_ring_device(xhci, slot_id);
|
|
|
|
|
break;
|
|
|
|
|
case USB_PORT_FEAT_C_SUSPEND:
|
2010-12-16 04:47:14 +08:00
|
|
|
|
bus_state->port_c_suspend &= ~(1 << wIndex);
|
2009-04-28 10:57:12 +08:00
|
|
|
|
case USB_PORT_FEAT_C_RESET:
|
2011-04-27 18:07:29 +08:00
|
|
|
|
case USB_PORT_FEAT_C_BH_PORT_RESET:
|
2009-04-28 10:57:12 +08:00
|
|
|
|
case USB_PORT_FEAT_C_CONNECTION:
|
|
|
|
|
case USB_PORT_FEAT_C_OVER_CURRENT:
|
2009-12-10 07:59:11 +08:00
|
|
|
|
case USB_PORT_FEAT_C_ENABLE:
|
2011-04-27 18:07:35 +08:00
|
|
|
|
case USB_PORT_FEAT_C_PORT_LINK_STATE:
|
2009-12-10 07:59:08 +08:00
|
|
|
|
xhci_clear_port_change_bit(xhci, wValue, wIndex,
|
2010-12-02 03:34:59 +08:00
|
|
|
|
port_array[wIndex], temp);
|
2009-04-28 10:57:12 +08:00
|
|
|
|
break;
|
2009-12-10 07:59:11 +08:00
|
|
|
|
case USB_PORT_FEAT_ENABLE:
|
xhci: Register second xHCI roothub.
This patch changes the xHCI driver to allocate two roothubs. This touches
the driver initialization and shutdown paths, roothub emulation code, and
port status change event handlers. This is a rather large patch, but it
can't be broken up, or it would break git-bisect.
Make the xHCI driver register its own PCI probe function. This will call
the USB core to create the USB 2.0 roothub, and then create the USB 3.0
roothub. This gets the code for registering a shared roothub out of the
USB core, and allows other HCDs later to decide if and how many shared
roothubs they want to allocate.
Make sure the xHCI's reset method marks the xHCI host controller's primary
roothub as the USB 2.0 roothub. This ensures that the high speed bus will
be processed first when the PCI device is resumed, and any USB 3.0 devices
that have migrated over to high speed will migrate back after being reset.
This ensures that USB persist works with these odd devices.
The reset method will also mark the xHCI USB2 roothub as having an
integrated TT. Like EHCI host controllers with a "rate matching hub" the
xHCI USB 2.0 roothub doesn't have an OHCI or UHCI companion controller.
It doesn't really have a TT, but we'll lie and say it has an integrated
TT. We need to do this because the USB core will reject LS/FS devices
under a HS hub without a TT.
Other details:
-------------
The roothub emulation code is changed to return the correct number of
ports for the two roothubs. For the USB 3.0 roothub, it only reports the
USB 3.0 ports. For the USB 2.0 roothub, it reports all the LS/FS/HS
ports. The code to disable a port now checks the speed of the roothub,
and refuses to disable SuperSpeed ports under the USB 3.0 roothub.
The code for initializing a new device context must be changed to set the
proper roothub port number. Since we've split the xHCI host into two
roothubs, we can't just use the port number in the ancestor hub. Instead,
we loop through the array of hardware port status register speeds and find
the Nth port with a similar speed.
The port status change event handler is updated to figure out whether the
port that reported the change is a USB 3.0 port, or a non-SuperSpeed port.
Once it figures out the port speed, it kicks the proper roothub.
The function to find a slot ID based on the port index is updated to take
into account that the two roothubs will have over-lapping port indexes.
It checks that the virtual device with a matching port index is the same
speed as the passed in roothub.
There's also changes to the driver initialization and shutdown paths:
1. Make sure that the xhci_hcd pointer is shared across the two
usb_hcd structures. The xhci_hcd pointer is allocated and the
registers are mapped in when xhci_pci_setup() is called with the
primary HCD. When xhci_pci_setup() is called with the non-primary
HCD, the xhci_hcd pointer is stored.
2. Make sure to set the sg_tablesize for both usb_hcd structures. Set
the PCI DMA mask for the non-primary HCD to allow for 64-bit or 32-bit
DMA. (The PCI DMA mask is set from the primary HCD further down in
the xhci_pci_setup() function.)
3. Ensure that the host controller doesn't start kicking khubd in
response to port status changes before both usb_hcd structures are
registered. xhci_run() only starts the xHC running once it has been
called with the non-primary roothub. Similarly, the xhci_stop()
function only halts the host controller when it is called with the
non-primary HCD. Then on the second call, it resets and cleans up the
MSI-X irqs.
Signed-off-by: Sarah Sharp <sarah.a.sharp@linux.intel.com>
2010-12-17 03:21:10 +08:00
|
|
|
|
xhci_disable_port(hcd, xhci, wIndex,
|
2010-12-02 03:34:59 +08:00
|
|
|
|
port_array[wIndex], temp);
|
2009-12-10 07:59:11 +08:00
|
|
|
|
break;
|
2012-09-05 13:44:35 +08:00
|
|
|
|
case USB_PORT_FEAT_POWER:
|
|
|
|
|
xhci_writel(xhci, temp & ~PORT_POWER,
|
|
|
|
|
port_array[wIndex]);
|
2012-09-05 13:44:36 +08:00
|
|
|
|
|
2012-10-15 15:38:34 +08:00
|
|
|
|
spin_unlock_irqrestore(&xhci->lock, flags);
|
2012-09-05 13:44:36 +08:00
|
|
|
|
temp = usb_acpi_power_manageable(hcd->self.root_hub,
|
|
|
|
|
wIndex);
|
|
|
|
|
if (temp)
|
|
|
|
|
usb_acpi_set_power_state(hcd->self.root_hub,
|
|
|
|
|
wIndex, false);
|
2012-10-15 15:38:34 +08:00
|
|
|
|
spin_lock_irqsave(&xhci->lock, flags);
|
2012-09-05 13:44:35 +08:00
|
|
|
|
break;
|
2009-04-28 10:57:12 +08:00
|
|
|
|
default:
|
|
|
|
|
goto error;
|
|
|
|
|
}
|
|
|
|
|
break;
|
|
|
|
|
default:
|
|
|
|
|
error:
|
|
|
|
|
/* "stall" on error */
|
|
|
|
|
retval = -EPIPE;
|
|
|
|
|
}
|
|
|
|
|
spin_unlock_irqrestore(&xhci->lock, flags);
|
|
|
|
|
return retval;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/*
|
|
|
|
|
* Returns 0 if the status hasn't changed, or the number of bytes in buf.
|
|
|
|
|
* Ports are 0-indexed from the HCD point of view,
|
|
|
|
|
* and 1-indexed from the USB core pointer of view.
|
|
|
|
|
*
|
|
|
|
|
* Note that the status change bits will be cleared as soon as a port status
|
|
|
|
|
* change event is generated, so we use the saved status from that event.
|
|
|
|
|
*/
|
|
|
|
|
int xhci_hub_status_data(struct usb_hcd *hcd, char *buf)
|
|
|
|
|
{
|
|
|
|
|
unsigned long flags;
|
|
|
|
|
u32 temp, status;
|
2010-10-14 22:23:00 +08:00
|
|
|
|
u32 mask;
|
2009-04-28 10:57:12 +08:00
|
|
|
|
int i, retval;
|
|
|
|
|
struct xhci_hcd *xhci = hcd_to_xhci(hcd);
|
2011-05-03 21:11:00 +08:00
|
|
|
|
int max_ports;
|
2011-03-29 10:40:46 +08:00
|
|
|
|
__le32 __iomem **port_array;
|
2010-12-16 04:47:14 +08:00
|
|
|
|
struct xhci_bus_state *bus_state;
|
2009-04-28 10:57:12 +08:00
|
|
|
|
|
2011-05-03 21:11:00 +08:00
|
|
|
|
max_ports = xhci_get_ports(hcd, &port_array);
|
2010-12-16 04:47:14 +08:00
|
|
|
|
bus_state = &xhci->bus_state[hcd_index(hcd)];
|
2009-04-28 10:57:12 +08:00
|
|
|
|
|
|
|
|
|
/* Initial status is no changes */
|
2011-05-03 21:11:00 +08:00
|
|
|
|
retval = (max_ports + 8) / 8;
|
2010-05-13 01:20:34 +08:00
|
|
|
|
memset(buf, 0, retval);
|
2012-04-14 02:54:30 +08:00
|
|
|
|
|
|
|
|
|
/*
|
|
|
|
|
* Inform the usbcore about resume-in-progress by returning
|
|
|
|
|
* a non-zero value even if there are no status changes.
|
|
|
|
|
*/
|
|
|
|
|
status = bus_state->resuming_ports;
|
2009-04-28 10:57:12 +08:00
|
|
|
|
|
USB: xhci: Set change bit when warm reset change is set.
Sometimes, when a USB 3.0 device is disconnected, the Intel Panther
Point xHCI host controller will report a link state change with the
state set to "SS.Inactive". This causes the xHCI host controller to
issue a warm port reset, which doesn't finish before the USB core times
out while waiting for it to complete.
When the warm port reset does complete, and the xHC gives back a port
status change event, the xHCI driver kicks khubd. However, it fails to
set the bit indicating there is a change event for that port because the
logic in xhci-hub.c doesn't check for the warm port reset bit.
After that, the warm port status change bit is never cleared by the USB
core, and the xHC stops reporting port status change bits. (The xHCI
spec says it shouldn't report more port events until all change bits are
cleared.) This means any port changes when a new device is connected
will never be reported, and the port will seem "dead" until the xHCI
driver is unloaded and reloaded, or the computer is rebooted. Fix this
by making the xHCI driver set the port change bit when a warm port reset
change bit is set.
A better solution would be to make the USB core handle warm port reset
in differently, merging the current code with the standard port reset
code that does an incremental backoff on the timeout, and tries to
complete the port reset two more times before giving up. That more
complicated fix will be merged next window, and this fix will be
backported to stable.
This should be backported to kernels as old as 3.0, since that was the
first kernel with commit a11496ebf375 ("xHCI: warm reset support").
Signed-off-by: Sarah Sharp <sarah.a.sharp@linux.intel.com>
Cc: stable@kernel.org
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2011-09-20 07:05:11 +08:00
|
|
|
|
mask = PORT_CSC | PORT_PEC | PORT_OCC | PORT_PLC | PORT_WRC;
|
2010-10-14 22:23:00 +08:00
|
|
|
|
|
2009-04-28 10:57:12 +08:00
|
|
|
|
spin_lock_irqsave(&xhci->lock, flags);
|
|
|
|
|
/* For each port, did anything change? If so, set that bit in buf. */
|
2011-05-03 21:11:00 +08:00
|
|
|
|
for (i = 0; i < max_ports; i++) {
|
2010-12-02 03:34:59 +08:00
|
|
|
|
temp = xhci_readl(xhci, port_array[i]);
|
2010-10-30 05:37:23 +08:00
|
|
|
|
if (temp == 0xffffffff) {
|
|
|
|
|
retval = -ENODEV;
|
|
|
|
|
break;
|
|
|
|
|
}
|
2010-10-14 22:23:00 +08:00
|
|
|
|
if ((temp & mask) != 0 ||
|
2010-12-16 04:47:14 +08:00
|
|
|
|
(bus_state->port_c_suspend & 1 << i) ||
|
|
|
|
|
(bus_state->resume_done[i] && time_after_eq(
|
|
|
|
|
jiffies, bus_state->resume_done[i]))) {
|
2010-05-13 01:20:34 +08:00
|
|
|
|
buf[(i + 1) / 8] |= 1 << (i + 1) % 8;
|
2009-04-28 10:57:12 +08:00
|
|
|
|
status = 1;
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
spin_unlock_irqrestore(&xhci->lock, flags);
|
|
|
|
|
return status ? retval : 0;
|
|
|
|
|
}
|
2010-10-14 22:23:03 +08:00
|
|
|
|
|
|
|
|
|
#ifdef CONFIG_PM
|
|
|
|
|
|
|
|
|
|
int xhci_bus_suspend(struct usb_hcd *hcd)
|
|
|
|
|
{
|
|
|
|
|
struct xhci_hcd *xhci = hcd_to_xhci(hcd);
|
2010-12-16 03:56:29 +08:00
|
|
|
|
int max_ports, port_index;
|
2011-03-29 10:40:46 +08:00
|
|
|
|
__le32 __iomem **port_array;
|
2010-12-16 04:47:14 +08:00
|
|
|
|
struct xhci_bus_state *bus_state;
|
2010-10-14 22:23:03 +08:00
|
|
|
|
unsigned long flags;
|
|
|
|
|
|
2011-05-03 21:11:00 +08:00
|
|
|
|
max_ports = xhci_get_ports(hcd, &port_array);
|
2010-12-16 04:47:14 +08:00
|
|
|
|
bus_state = &xhci->bus_state[hcd_index(hcd)];
|
2010-10-14 22:23:03 +08:00
|
|
|
|
|
|
|
|
|
spin_lock_irqsave(&xhci->lock, flags);
|
|
|
|
|
|
|
|
|
|
if (hcd->self.root_hub->do_remote_wakeup) {
|
2012-04-14 02:54:30 +08:00
|
|
|
|
if (bus_state->resuming_ports) {
|
|
|
|
|
spin_unlock_irqrestore(&xhci->lock, flags);
|
|
|
|
|
xhci_dbg(xhci, "suspend failed because "
|
|
|
|
|
"a port is resuming\n");
|
|
|
|
|
return -EBUSY;
|
2010-10-14 22:23:03 +08:00
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
2010-12-16 03:56:29 +08:00
|
|
|
|
port_index = max_ports;
|
2010-12-16 04:47:14 +08:00
|
|
|
|
bus_state->bus_suspended = 0;
|
2010-12-16 03:56:29 +08:00
|
|
|
|
while (port_index--) {
|
2010-10-14 22:23:03 +08:00
|
|
|
|
/* suspend the port if the port is not suspended */
|
|
|
|
|
u32 t1, t2;
|
|
|
|
|
int slot_id;
|
|
|
|
|
|
2010-12-02 03:34:59 +08:00
|
|
|
|
t1 = xhci_readl(xhci, port_array[port_index]);
|
2010-10-14 22:23:03 +08:00
|
|
|
|
t2 = xhci_port_state_to_neutral(t1);
|
|
|
|
|
|
|
|
|
|
if ((t1 & PORT_PE) && !(t1 & PORT_PLS_MASK)) {
|
2010-12-16 03:56:29 +08:00
|
|
|
|
xhci_dbg(xhci, "port %d not suspended\n", port_index);
|
2010-12-17 02:49:09 +08:00
|
|
|
|
slot_id = xhci_find_slot_id_by_port(hcd, xhci,
|
2010-12-16 03:56:29 +08:00
|
|
|
|
port_index + 1);
|
2010-10-14 22:23:03 +08:00
|
|
|
|
if (slot_id) {
|
|
|
|
|
spin_unlock_irqrestore(&xhci->lock, flags);
|
|
|
|
|
xhci_stop_device(xhci, slot_id, 1);
|
|
|
|
|
spin_lock_irqsave(&xhci->lock, flags);
|
|
|
|
|
}
|
|
|
|
|
t2 &= ~PORT_PLS_MASK;
|
|
|
|
|
t2 |= PORT_LINK_STROBE | XDEV_U3;
|
2010-12-16 04:47:14 +08:00
|
|
|
|
set_bit(port_index, &bus_state->bus_suspended);
|
2010-10-14 22:23:03 +08:00
|
|
|
|
}
|
USB/xHCI: Enable USB 3.0 hub remote wakeup.
USB 3.0 hubs have a different remote wakeup policy than USB 2.0 hubs.
USB 2.0 hubs, once they have remote wakeup enabled, will always send
remote wakes when anything changes on a port.
However, USB 3.0 hubs have a per-port remote wake up policy that is off
by default. The Set Feature remote wake mask can be changed for any
port, enabling remote wakeup for a connect, disconnect, or overcurrent
event, much like EHCI and xHCI host controller "wake on" port status
bits. The bits are cleared to zero on the initial hub power on, or
after the hub has been reset.
Without this patch, when a USB 3.0 hub gets suspended, it will not send
a remote wakeup on device connect or disconnect. This would show up to
the user as "dead ports" unless they ran lsusb -v (since newer versions
of lsusb use the sysfs files, rather than sending control transfers).
Change the hub driver's suspend method to enable remote wake up for
disconnect, connect, and overcurrent for all ports on the hub. Modify
the xHCI driver's roothub code to handle that request, and set the "wake
on" bits in the port status registers accordingly.
Signed-off-by: Sarah Sharp <sarah.a.sharp@linux.intel.com>
2012-01-07 02:34:31 +08:00
|
|
|
|
/* USB core sets remote wake mask for USB 3.0 hubs,
|
|
|
|
|
* including the USB 3.0 roothub, but only if CONFIG_USB_SUSPEND
|
|
|
|
|
* is enabled, so also enable remote wake here.
|
|
|
|
|
*/
|
2010-10-14 22:23:03 +08:00
|
|
|
|
if (hcd->self.root_hub->do_remote_wakeup) {
|
|
|
|
|
if (t1 & PORT_CONNECT) {
|
|
|
|
|
t2 |= PORT_WKOC_E | PORT_WKDISC_E;
|
|
|
|
|
t2 &= ~PORT_WKCONN_E;
|
|
|
|
|
} else {
|
|
|
|
|
t2 |= PORT_WKOC_E | PORT_WKCONN_E;
|
|
|
|
|
t2 &= ~PORT_WKDISC_E;
|
|
|
|
|
}
|
|
|
|
|
} else
|
|
|
|
|
t2 &= ~PORT_WAKE_BITS;
|
|
|
|
|
|
|
|
|
|
t1 = xhci_port_state_to_neutral(t1);
|
|
|
|
|
if (t1 != t2)
|
2010-12-02 03:34:59 +08:00
|
|
|
|
xhci_writel(xhci, t2, port_array[port_index]);
|
2010-10-14 22:23:03 +08:00
|
|
|
|
|
2011-04-19 17:17:39 +08:00
|
|
|
|
if (hcd->speed != HCD_USB3) {
|
2010-10-14 22:23:03 +08:00
|
|
|
|
/* enable remote wake up for USB 2.0 */
|
2011-03-29 10:40:46 +08:00
|
|
|
|
__le32 __iomem *addr;
|
2010-10-14 22:23:03 +08:00
|
|
|
|
u32 tmp;
|
|
|
|
|
|
2010-12-02 03:34:59 +08:00
|
|
|
|
/* Add one to the port status register address to get
|
|
|
|
|
* the port power control register address.
|
|
|
|
|
*/
|
|
|
|
|
addr = port_array[port_index] + 1;
|
2010-10-14 22:23:03 +08:00
|
|
|
|
tmp = xhci_readl(xhci, addr);
|
|
|
|
|
tmp |= PORT_RWE;
|
|
|
|
|
xhci_writel(xhci, tmp, addr);
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
hcd->state = HC_STATE_SUSPENDED;
|
2010-12-16 04:47:14 +08:00
|
|
|
|
bus_state->next_statechange = jiffies + msecs_to_jiffies(10);
|
2010-10-14 22:23:03 +08:00
|
|
|
|
spin_unlock_irqrestore(&xhci->lock, flags);
|
|
|
|
|
return 0;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
int xhci_bus_resume(struct usb_hcd *hcd)
|
|
|
|
|
{
|
|
|
|
|
struct xhci_hcd *xhci = hcd_to_xhci(hcd);
|
2010-12-16 03:56:29 +08:00
|
|
|
|
int max_ports, port_index;
|
2011-03-29 10:40:46 +08:00
|
|
|
|
__le32 __iomem **port_array;
|
2010-12-16 04:47:14 +08:00
|
|
|
|
struct xhci_bus_state *bus_state;
|
2010-10-14 22:23:03 +08:00
|
|
|
|
u32 temp;
|
|
|
|
|
unsigned long flags;
|
|
|
|
|
|
2011-05-03 21:11:00 +08:00
|
|
|
|
max_ports = xhci_get_ports(hcd, &port_array);
|
2010-12-16 04:47:14 +08:00
|
|
|
|
bus_state = &xhci->bus_state[hcd_index(hcd)];
|
2010-10-14 22:23:03 +08:00
|
|
|
|
|
2010-12-16 04:47:14 +08:00
|
|
|
|
if (time_before(jiffies, bus_state->next_statechange))
|
2010-10-14 22:23:03 +08:00
|
|
|
|
msleep(5);
|
|
|
|
|
|
|
|
|
|
spin_lock_irqsave(&xhci->lock, flags);
|
|
|
|
|
if (!HCD_HW_ACCESSIBLE(hcd)) {
|
|
|
|
|
spin_unlock_irqrestore(&xhci->lock, flags);
|
|
|
|
|
return -ESHUTDOWN;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* delay the irqs */
|
|
|
|
|
temp = xhci_readl(xhci, &xhci->op_regs->command);
|
|
|
|
|
temp &= ~CMD_EIE;
|
|
|
|
|
xhci_writel(xhci, temp, &xhci->op_regs->command);
|
|
|
|
|
|
2010-12-16 03:56:29 +08:00
|
|
|
|
port_index = max_ports;
|
|
|
|
|
while (port_index--) {
|
2010-10-14 22:23:03 +08:00
|
|
|
|
/* Check whether need resume ports. If needed
|
|
|
|
|
resume port and disable remote wakeup */
|
|
|
|
|
u32 temp;
|
|
|
|
|
int slot_id;
|
|
|
|
|
|
2010-12-02 03:34:59 +08:00
|
|
|
|
temp = xhci_readl(xhci, port_array[port_index]);
|
2010-10-14 22:23:03 +08:00
|
|
|
|
if (DEV_SUPERSPEED(temp))
|
|
|
|
|
temp &= ~(PORT_RWC_BITS | PORT_CEC | PORT_WAKE_BITS);
|
|
|
|
|
else
|
|
|
|
|
temp &= ~(PORT_RWC_BITS | PORT_WAKE_BITS);
|
2010-12-16 04:47:14 +08:00
|
|
|
|
if (test_bit(port_index, &bus_state->bus_suspended) &&
|
2010-10-14 22:23:03 +08:00
|
|
|
|
(temp & PORT_PLS_MASK)) {
|
|
|
|
|
if (DEV_SUPERSPEED(temp)) {
|
2011-09-24 05:19:48 +08:00
|
|
|
|
xhci_set_link_state(xhci, port_array,
|
|
|
|
|
port_index, XDEV_U0);
|
2010-10-14 22:23:03 +08:00
|
|
|
|
} else {
|
2011-09-24 05:19:48 +08:00
|
|
|
|
xhci_set_link_state(xhci, port_array,
|
|
|
|
|
port_index, XDEV_RESUME);
|
2010-10-14 22:23:03 +08:00
|
|
|
|
|
|
|
|
|
spin_unlock_irqrestore(&xhci->lock, flags);
|
|
|
|
|
msleep(20);
|
|
|
|
|
spin_lock_irqsave(&xhci->lock, flags);
|
|
|
|
|
|
2011-09-24 05:19:48 +08:00
|
|
|
|
xhci_set_link_state(xhci, port_array,
|
|
|
|
|
port_index, XDEV_U0);
|
2010-10-14 22:23:03 +08:00
|
|
|
|
}
|
2011-04-19 17:17:39 +08:00
|
|
|
|
/* wait for the port to enter U0 and report port link
|
|
|
|
|
* state change.
|
|
|
|
|
*/
|
|
|
|
|
spin_unlock_irqrestore(&xhci->lock, flags);
|
|
|
|
|
msleep(20);
|
|
|
|
|
spin_lock_irqsave(&xhci->lock, flags);
|
|
|
|
|
|
|
|
|
|
/* Clear PLC */
|
2011-09-24 05:19:49 +08:00
|
|
|
|
xhci_test_and_clear_bit(xhci, port_array, port_index,
|
|
|
|
|
PORT_PLC);
|
2011-04-19 17:17:39 +08:00
|
|
|
|
|
2010-12-17 02:49:09 +08:00
|
|
|
|
slot_id = xhci_find_slot_id_by_port(hcd,
|
|
|
|
|
xhci, port_index + 1);
|
2010-10-14 22:23:03 +08:00
|
|
|
|
if (slot_id)
|
|
|
|
|
xhci_ring_device(xhci, slot_id);
|
|
|
|
|
} else
|
2010-12-02 03:34:59 +08:00
|
|
|
|
xhci_writel(xhci, temp, port_array[port_index]);
|
2010-10-14 22:23:03 +08:00
|
|
|
|
|
2011-04-19 17:17:39 +08:00
|
|
|
|
if (hcd->speed != HCD_USB3) {
|
2010-10-14 22:23:03 +08:00
|
|
|
|
/* disable remote wake up for USB 2.0 */
|
2011-03-29 10:40:46 +08:00
|
|
|
|
__le32 __iomem *addr;
|
2010-10-14 22:23:03 +08:00
|
|
|
|
u32 tmp;
|
|
|
|
|
|
2010-12-02 03:34:59 +08:00
|
|
|
|
/* Add one to the port status register address to get
|
|
|
|
|
* the port power control register address.
|
|
|
|
|
*/
|
|
|
|
|
addr = port_array[port_index] + 1;
|
2010-10-14 22:23:03 +08:00
|
|
|
|
tmp = xhci_readl(xhci, addr);
|
|
|
|
|
tmp &= ~PORT_RWE;
|
|
|
|
|
xhci_writel(xhci, tmp, addr);
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
(void) xhci_readl(xhci, &xhci->op_regs->command);
|
|
|
|
|
|
2010-12-16 04:47:14 +08:00
|
|
|
|
bus_state->next_statechange = jiffies + msecs_to_jiffies(5);
|
2010-10-14 22:23:03 +08:00
|
|
|
|
/* re-enable irqs */
|
|
|
|
|
temp = xhci_readl(xhci, &xhci->op_regs->command);
|
|
|
|
|
temp |= CMD_EIE;
|
|
|
|
|
xhci_writel(xhci, temp, &xhci->op_regs->command);
|
|
|
|
|
temp = xhci_readl(xhci, &xhci->op_regs->command);
|
|
|
|
|
|
|
|
|
|
spin_unlock_irqrestore(&xhci->lock, flags);
|
|
|
|
|
return 0;
|
|
|
|
|
}
|
|
|
|
|
|
2010-10-16 05:59:15 +08:00
|
|
|
|
#endif /* CONFIG_PM */
|