2011-03-22 09:00:50 +08:00
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/*
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* Marvell Wireless LAN device driver: 802.11n
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*
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* Copyright (C) 2011, Marvell International Ltd.
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*
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* This software file (the "File") is distributed by Marvell International
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* Ltd. under the terms of the GNU General Public License Version 2, June 1991
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* (the "License"). You may use, redistribute and/or modify this File in
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* accordance with the terms and conditions of the License, a copy of which
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* is available by writing to the Free Software Foundation, Inc.,
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* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA or on the
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* worldwide web at http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt.
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*
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* THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE
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* ARE EXPRESSLY DISCLAIMED. The License provides additional details about
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* this warranty disclaimer.
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*/
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#include "decl.h"
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#include "ioctl.h"
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#include "util.h"
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#include "fw.h"
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#include "main.h"
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#include "wmm.h"
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#include "11n.h"
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/*
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* Fills HT capability information field, AMPDU Parameters field, HT extended
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* capability field, and supported MCS set fields.
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*
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* Only the following HT capability information fields are used, all other
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* fields are always turned off.
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*
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* Bit 1 : Supported channel width (0: 20MHz, 1: Both 20 and 40 MHz)
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* Bit 4 : Greenfield support (0: Not supported, 1: Supported)
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* Bit 5 : Short GI for 20 MHz support (0: Not supported, 1: Supported)
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* Bit 6 : Short GI for 40 MHz support (0: Not supported, 1: Supported)
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* Bit 7 : Tx STBC (0: Not supported, 1: Supported)
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* Bit 8-9 : Rx STBC (0: Not supported, X: Support for up to X spatial streams)
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* Bit 10 : Delayed BA support (0: Not supported, 1: Supported)
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* Bit 11 : Maximum AMSDU length (0: 3839 octets, 1: 7935 octets)
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* Bit 14 : 40-Mhz intolerant support (0: Not supported, 1: Supported)
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*
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* In addition, the following AMPDU Parameters are set -
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* - Maximum AMPDU length exponent (set to 3)
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* - Minimum AMPDU start spacing (set to 0 - No restrictions)
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*
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* MCS is set for 1x1, with MSC32 for infra mode or ad-hoc mode with 40 MHz
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* support.
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*
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* RD responder bit to set to clear in the extended capability header.
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*/
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void
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mwifiex_fill_cap_info(struct mwifiex_private *priv,
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struct mwifiex_ie_types_htcap *ht_cap)
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{
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struct mwifiex_adapter *adapter = priv->adapter;
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u8 *mcs;
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int rx_mcs_supp;
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uint16_t ht_cap_info = le16_to_cpu(ht_cap->ht_cap.cap_info);
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uint16_t ht_ext_cap = le16_to_cpu(ht_cap->ht_cap.extended_ht_cap_info);
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2011-03-26 10:47:02 +08:00
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/* Convert dev_cap to IEEE80211_HT_CAP */
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if (ISSUPP_CHANWIDTH40(adapter->hw_dot_11n_dev_cap))
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ht_cap_info |= IEEE80211_HT_CAP_SUP_WIDTH_20_40;
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2011-03-22 09:00:50 +08:00
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else
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2011-03-26 10:47:02 +08:00
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ht_cap_info &= ~IEEE80211_HT_CAP_SUP_WIDTH_20_40;
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2011-03-22 09:00:50 +08:00
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2011-03-26 10:47:02 +08:00
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if (ISSUPP_SHORTGI20(adapter->hw_dot_11n_dev_cap))
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ht_cap_info |= IEEE80211_HT_CAP_SGI_20;
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2011-03-22 09:00:50 +08:00
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else
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2011-03-26 10:47:02 +08:00
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ht_cap_info &= ~IEEE80211_HT_CAP_SGI_20;
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2011-03-22 09:00:50 +08:00
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2011-03-26 10:47:02 +08:00
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if (ISSUPP_SHORTGI40(adapter->hw_dot_11n_dev_cap))
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ht_cap_info |= IEEE80211_HT_CAP_SGI_40;
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2011-03-22 09:00:50 +08:00
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else
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2011-03-26 10:47:02 +08:00
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ht_cap_info &= ~IEEE80211_HT_CAP_SGI_40;
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2011-03-22 09:00:50 +08:00
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if (ISSUPP_TXSTBC(adapter->hw_dot_11n_dev_cap))
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2011-03-26 10:47:02 +08:00
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ht_cap_info |= IEEE80211_HT_CAP_TX_STBC;
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2011-03-22 09:00:50 +08:00
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else
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2011-03-26 10:47:02 +08:00
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ht_cap_info &= ~IEEE80211_HT_CAP_TX_STBC;
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2011-03-22 09:00:50 +08:00
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2011-03-26 10:47:02 +08:00
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if (ISSUPP_RXSTBC(adapter->hw_dot_11n_dev_cap))
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ht_cap_info |= 1 << IEEE80211_HT_CAP_RX_STBC_SHIFT;
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2011-03-22 09:00:50 +08:00
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else
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2011-03-26 10:47:02 +08:00
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ht_cap_info &= ~(3 << IEEE80211_HT_CAP_RX_STBC_SHIFT);
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2011-03-22 09:00:50 +08:00
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2011-03-26 10:47:02 +08:00
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if (ISSUPP_GREENFIELD(adapter->hw_dot_11n_dev_cap))
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ht_cap_info |= IEEE80211_HT_CAP_GRN_FLD;
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2011-03-22 09:00:50 +08:00
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else
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2011-03-26 10:47:02 +08:00
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ht_cap_info &= ~IEEE80211_HT_CAP_GRN_FLD;
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2011-03-22 09:00:50 +08:00
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2011-03-26 10:47:02 +08:00
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ht_cap_info &= ~IEEE80211_HT_CAP_MAX_AMSDU;
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ht_cap_info |= IEEE80211_HT_CAP_SM_PS;
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2011-03-22 09:00:50 +08:00
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2011-03-26 10:47:02 +08:00
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ht_cap->ht_cap.ampdu_params_info |= IEEE80211_HT_AMPDU_PARM_FACTOR;
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ht_cap->ht_cap.ampdu_params_info &= ~IEEE80211_HT_AMPDU_PARM_DENSITY;
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2011-03-22 09:00:50 +08:00
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rx_mcs_supp = GET_RXMCSSUPP(adapter->hw_dev_mcs_support);
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mcs = (u8 *)&ht_cap->ht_cap.mcs;
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/* Set MCS for 1x1 */
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memset(mcs, 0xff, rx_mcs_supp);
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/* Clear all the other values */
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memset(&mcs[rx_mcs_supp], 0,
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sizeof(struct ieee80211_mcs_info) - rx_mcs_supp);
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2011-03-29 08:55:41 +08:00
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if (priv->bss_mode == NL80211_IFTYPE_STATION ||
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2011-03-26 10:47:02 +08:00
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(ht_cap_info & IEEE80211_HT_CAP_SUP_WIDTH_20_40))
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2011-03-22 09:00:50 +08:00
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/* Set MCS32 for infra mode or ad-hoc mode with 40MHz support */
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SETHT_MCS32(ht_cap->ht_cap.mcs.rx_mask);
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/* Clear RD responder bit */
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RESETHT_EXTCAP_RDG(ht_ext_cap);
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ht_cap->ht_cap.cap_info = cpu_to_le16(ht_cap_info);
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ht_cap->ht_cap.extended_ht_cap_info = cpu_to_le16(ht_ext_cap);
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}
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/*
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* This function returns the pointer to an entry in BA Stream
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* table which matches the requested BA status.
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*/
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static struct mwifiex_tx_ba_stream_tbl *
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mwifiex_11n_get_tx_ba_stream_status(struct mwifiex_private *priv,
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enum mwifiex_ba_status ba_status)
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{
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struct mwifiex_tx_ba_stream_tbl *tx_ba_tsr_tbl;
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unsigned long flags;
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spin_lock_irqsave(&priv->tx_ba_stream_tbl_lock, flags);
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list_for_each_entry(tx_ba_tsr_tbl, &priv->tx_ba_stream_tbl_ptr, list) {
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if (tx_ba_tsr_tbl->ba_status == ba_status) {
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spin_unlock_irqrestore(&priv->tx_ba_stream_tbl_lock,
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flags);
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return tx_ba_tsr_tbl;
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}
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}
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spin_unlock_irqrestore(&priv->tx_ba_stream_tbl_lock, flags);
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return NULL;
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}
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/*
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* This function handles the command response of delete a block
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* ack request.
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*
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* The function checks the response success status and takes action
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* accordingly (send an add BA request in case of success, or recreate
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* the deleted stream in case of failure, if the add BA was also
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* initiated by us).
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*/
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int mwifiex_ret_11n_delba(struct mwifiex_private *priv,
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struct host_cmd_ds_command *resp)
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{
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int tid;
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struct mwifiex_tx_ba_stream_tbl *tx_ba_tbl;
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struct host_cmd_ds_11n_delba *del_ba =
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(struct host_cmd_ds_11n_delba *) &resp->params.del_ba;
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uint16_t del_ba_param_set = le16_to_cpu(del_ba->del_ba_param_set);
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tid = del_ba_param_set >> DELBA_TID_POS;
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if (del_ba->del_result == BA_RESULT_SUCCESS) {
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mwifiex_11n_delete_ba_stream_tbl(priv, tid,
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del_ba->peer_mac_addr, TYPE_DELBA_SENT,
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INITIATOR_BIT(del_ba_param_set));
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tx_ba_tbl = mwifiex_11n_get_tx_ba_stream_status(priv,
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BA_STREAM_SETUP_INPROGRESS);
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if (tx_ba_tbl)
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mwifiex_send_addba(priv, tx_ba_tbl->tid,
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tx_ba_tbl->ra);
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} else { /*
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* In case of failure, recreate the deleted stream in case
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* we initiated the ADDBA
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*/
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if (INITIATOR_BIT(del_ba_param_set)) {
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mwifiex_11n_create_tx_ba_stream_tbl(priv,
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del_ba->peer_mac_addr, tid,
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BA_STREAM_SETUP_INPROGRESS);
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tx_ba_tbl = mwifiex_11n_get_tx_ba_stream_status(priv,
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BA_STREAM_SETUP_INPROGRESS);
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if (tx_ba_tbl)
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mwifiex_11n_delete_ba_stream_tbl(priv,
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tx_ba_tbl->tid, tx_ba_tbl->ra,
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TYPE_DELBA_SENT, true);
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}
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}
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return 0;
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}
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/*
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* This function handles the command response of add a block
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* ack request.
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*
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* Handling includes changing the header fields to CPU formats, checking
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* the response success status and taking actions accordingly (delete the
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* BA stream table in case of failure).
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*/
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int mwifiex_ret_11n_addba_req(struct mwifiex_private *priv,
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struct host_cmd_ds_command *resp)
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{
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int tid;
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struct host_cmd_ds_11n_addba_rsp *add_ba_rsp =
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(struct host_cmd_ds_11n_addba_rsp *) &resp->params.add_ba_rsp;
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struct mwifiex_tx_ba_stream_tbl *tx_ba_tbl;
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add_ba_rsp->ssn = cpu_to_le16((le16_to_cpu(add_ba_rsp->ssn))
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& SSN_MASK);
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tid = (le16_to_cpu(add_ba_rsp->block_ack_param_set)
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& IEEE80211_ADDBA_PARAM_TID_MASK)
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>> BLOCKACKPARAM_TID_POS;
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if (le16_to_cpu(add_ba_rsp->status_code) == BA_RESULT_SUCCESS) {
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tx_ba_tbl = mwifiex_11n_get_tx_ba_stream_tbl(priv, tid,
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add_ba_rsp->peer_mac_addr);
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if (tx_ba_tbl) {
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dev_dbg(priv->adapter->dev, "info: BA stream complete\n");
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tx_ba_tbl->ba_status = BA_STREAM_SETUP_COMPLETE;
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} else {
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dev_err(priv->adapter->dev, "BA stream not created\n");
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}
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} else {
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mwifiex_11n_delete_ba_stream_tbl(priv, tid,
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add_ba_rsp->peer_mac_addr,
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TYPE_DELBA_SENT, true);
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if (add_ba_rsp->add_rsp_result != BA_RESULT_TIMEOUT)
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priv->aggr_prio_tbl[tid].ampdu_ap =
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BA_STREAM_NOT_ALLOWED;
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}
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return 0;
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}
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/*
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* This function handles the command response of 11n configuration request.
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*
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* Handling includes changing the header fields into CPU format.
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*/
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int mwifiex_ret_11n_cfg(struct mwifiex_private *priv,
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struct host_cmd_ds_command *resp,
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void *data_buf)
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{
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struct mwifiex_ds_11n_tx_cfg *tx_cfg = NULL;
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struct host_cmd_ds_11n_cfg *htcfg = &resp->params.htcfg;
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if (data_buf) {
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tx_cfg = (struct mwifiex_ds_11n_tx_cfg *) data_buf;
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tx_cfg->tx_htcap = le16_to_cpu(htcfg->ht_tx_cap);
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tx_cfg->tx_htinfo = le16_to_cpu(htcfg->ht_tx_info);
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}
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return 0;
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}
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/*
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* This function prepares command of reconfigure Tx buffer.
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*
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* Preparation includes -
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* - Setting command ID, action and proper size
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* - Setting Tx buffer size (for SET only)
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* - Ensuring correct endian-ness
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*/
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int mwifiex_cmd_recfg_tx_buf(struct mwifiex_private *priv,
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struct host_cmd_ds_command *cmd, int cmd_action,
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void *data_buf)
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{
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struct host_cmd_ds_txbuf_cfg *tx_buf = &cmd->params.tx_buf;
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u16 action = (u16) cmd_action;
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u16 buf_size = *((u16 *) data_buf);
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cmd->command = cpu_to_le16(HostCmd_CMD_RECONFIGURE_TX_BUFF);
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cmd->size =
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cpu_to_le16(sizeof(struct host_cmd_ds_txbuf_cfg) + S_DS_GEN);
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tx_buf->action = cpu_to_le16(action);
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switch (action) {
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case HostCmd_ACT_GEN_SET:
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dev_dbg(priv->adapter->dev, "cmd: set tx_buf=%d\n", buf_size);
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tx_buf->buff_size = cpu_to_le16(buf_size);
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break;
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case HostCmd_ACT_GEN_GET:
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default:
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tx_buf->buff_size = 0;
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break;
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}
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return 0;
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}
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/*
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* This function prepares command of AMSDU aggregation control.
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*
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* Preparation includes -
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* - Setting command ID, action and proper size
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* - Setting AMSDU control parameters (for SET only)
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* - Ensuring correct endian-ness
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*/
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int mwifiex_cmd_amsdu_aggr_ctrl(struct mwifiex_private *priv,
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struct host_cmd_ds_command *cmd,
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int cmd_action, void *data_buf)
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{
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struct host_cmd_ds_amsdu_aggr_ctrl *amsdu_ctrl =
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&cmd->params.amsdu_aggr_ctrl;
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u16 action = (u16) cmd_action;
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|
|
struct mwifiex_ds_11n_amsdu_aggr_ctrl *aa_ctrl =
|
|
|
|
(struct mwifiex_ds_11n_amsdu_aggr_ctrl *) data_buf;
|
|
|
|
|
|
|
|
cmd->command = cpu_to_le16(HostCmd_CMD_AMSDU_AGGR_CTRL);
|
|
|
|
cmd->size = cpu_to_le16(sizeof(struct host_cmd_ds_amsdu_aggr_ctrl)
|
|
|
|
+ S_DS_GEN);
|
|
|
|
amsdu_ctrl->action = cpu_to_le16(action);
|
|
|
|
switch (action) {
|
|
|
|
case HostCmd_ACT_GEN_SET:
|
|
|
|
amsdu_ctrl->enable = cpu_to_le16(aa_ctrl->enable);
|
|
|
|
amsdu_ctrl->curr_buf_size = 0;
|
|
|
|
break;
|
|
|
|
case HostCmd_ACT_GEN_GET:
|
|
|
|
default:
|
|
|
|
amsdu_ctrl->curr_buf_size = 0;
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* This function handles the command response of AMSDU aggregation
|
|
|
|
* control request.
|
|
|
|
*
|
|
|
|
* Handling includes changing the header fields into CPU format.
|
|
|
|
*/
|
|
|
|
int mwifiex_ret_amsdu_aggr_ctrl(struct mwifiex_private *priv,
|
|
|
|
struct host_cmd_ds_command *resp,
|
|
|
|
void *data_buf)
|
|
|
|
{
|
|
|
|
struct mwifiex_ds_11n_amsdu_aggr_ctrl *amsdu_aggr_ctrl = NULL;
|
|
|
|
struct host_cmd_ds_amsdu_aggr_ctrl *amsdu_ctrl =
|
|
|
|
&resp->params.amsdu_aggr_ctrl;
|
|
|
|
|
|
|
|
if (data_buf) {
|
|
|
|
amsdu_aggr_ctrl =
|
|
|
|
(struct mwifiex_ds_11n_amsdu_aggr_ctrl *) data_buf;
|
|
|
|
amsdu_aggr_ctrl->enable = le16_to_cpu(amsdu_ctrl->enable);
|
|
|
|
amsdu_aggr_ctrl->curr_buf_size =
|
|
|
|
le16_to_cpu(amsdu_ctrl->curr_buf_size);
|
|
|
|
}
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* This function prepares 11n configuration command.
|
|
|
|
*
|
|
|
|
* Preparation includes -
|
|
|
|
* - Setting command ID, action and proper size
|
|
|
|
* - Setting HT Tx capability and HT Tx information fields
|
|
|
|
* - Ensuring correct endian-ness
|
|
|
|
*/
|
|
|
|
int mwifiex_cmd_11n_cfg(struct mwifiex_private *priv,
|
|
|
|
struct host_cmd_ds_command *cmd,
|
|
|
|
u16 cmd_action, void *data_buf)
|
|
|
|
{
|
|
|
|
struct host_cmd_ds_11n_cfg *htcfg = &cmd->params.htcfg;
|
|
|
|
struct mwifiex_ds_11n_tx_cfg *txcfg =
|
|
|
|
(struct mwifiex_ds_11n_tx_cfg *) data_buf;
|
|
|
|
|
|
|
|
cmd->command = cpu_to_le16(HostCmd_CMD_11N_CFG);
|
|
|
|
cmd->size = cpu_to_le16(sizeof(struct host_cmd_ds_11n_cfg) + S_DS_GEN);
|
|
|
|
htcfg->action = cpu_to_le16(cmd_action);
|
|
|
|
htcfg->ht_tx_cap = cpu_to_le16(txcfg->tx_htcap);
|
|
|
|
htcfg->ht_tx_info = cpu_to_le16(txcfg->tx_htinfo);
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* This function appends an 11n TLV to a buffer.
|
|
|
|
*
|
|
|
|
* Buffer allocation is responsibility of the calling
|
|
|
|
* function. No size validation is made here.
|
|
|
|
*
|
|
|
|
* The function fills up the following sections, if applicable -
|
|
|
|
* - HT capability IE
|
|
|
|
* - HT information IE (with channel list)
|
|
|
|
* - 20/40 BSS Coexistence IE
|
|
|
|
* - HT Extended Capabilities IE
|
|
|
|
*/
|
|
|
|
int
|
|
|
|
mwifiex_cmd_append_11n_tlv(struct mwifiex_private *priv,
|
|
|
|
struct mwifiex_bssdescriptor *bss_desc,
|
|
|
|
u8 **buffer)
|
|
|
|
{
|
|
|
|
struct mwifiex_ie_types_htcap *ht_cap;
|
|
|
|
struct mwifiex_ie_types_htinfo *ht_info;
|
|
|
|
struct mwifiex_ie_types_chan_list_param_set *chan_list;
|
|
|
|
struct mwifiex_ie_types_2040bssco *bss_co_2040;
|
|
|
|
struct mwifiex_ie_types_extcap *ext_cap;
|
|
|
|
int ret_len = 0;
|
|
|
|
|
|
|
|
if (!buffer || !*buffer)
|
|
|
|
return ret_len;
|
|
|
|
|
|
|
|
if (bss_desc->bcn_ht_cap) {
|
|
|
|
ht_cap = (struct mwifiex_ie_types_htcap *) *buffer;
|
|
|
|
memset(ht_cap, 0, sizeof(struct mwifiex_ie_types_htcap));
|
|
|
|
ht_cap->header.type = cpu_to_le16(WLAN_EID_HT_CAPABILITY);
|
|
|
|
ht_cap->header.len =
|
|
|
|
cpu_to_le16(sizeof(struct ieee80211_ht_cap));
|
|
|
|
memcpy((u8 *) ht_cap + sizeof(struct mwifiex_ie_types_header),
|
|
|
|
(u8 *) bss_desc->bcn_ht_cap +
|
|
|
|
sizeof(struct ieee_types_header),
|
|
|
|
le16_to_cpu(ht_cap->header.len));
|
|
|
|
|
|
|
|
mwifiex_fill_cap_info(priv, ht_cap);
|
|
|
|
|
|
|
|
*buffer += sizeof(struct mwifiex_ie_types_htcap);
|
|
|
|
ret_len += sizeof(struct mwifiex_ie_types_htcap);
|
|
|
|
}
|
|
|
|
|
|
|
|
if (bss_desc->bcn_ht_info) {
|
2011-03-29 08:55:41 +08:00
|
|
|
if (priv->bss_mode == NL80211_IFTYPE_ADHOC) {
|
2011-03-22 09:00:50 +08:00
|
|
|
ht_info = (struct mwifiex_ie_types_htinfo *) *buffer;
|
|
|
|
memset(ht_info, 0,
|
|
|
|
sizeof(struct mwifiex_ie_types_htinfo));
|
|
|
|
ht_info->header.type =
|
|
|
|
cpu_to_le16(WLAN_EID_HT_INFORMATION);
|
|
|
|
ht_info->header.len =
|
|
|
|
cpu_to_le16(sizeof(struct ieee80211_ht_info));
|
|
|
|
|
|
|
|
memcpy((u8 *) ht_info +
|
|
|
|
sizeof(struct mwifiex_ie_types_header),
|
|
|
|
(u8 *) bss_desc->bcn_ht_info +
|
|
|
|
sizeof(struct ieee_types_header),
|
|
|
|
le16_to_cpu(ht_info->header.len));
|
|
|
|
|
|
|
|
if (!ISSUPP_CHANWIDTH40
|
2011-03-26 10:47:02 +08:00
|
|
|
(priv->adapter->hw_dot_11n_dev_cap))
|
|
|
|
ht_info->ht_info.ht_param &=
|
|
|
|
~(IEEE80211_HT_PARAM_CHAN_WIDTH_ANY |
|
|
|
|
IEEE80211_HT_PARAM_CHA_SEC_OFFSET);
|
2011-03-22 09:00:50 +08:00
|
|
|
|
|
|
|
*buffer += sizeof(struct mwifiex_ie_types_htinfo);
|
|
|
|
ret_len += sizeof(struct mwifiex_ie_types_htinfo);
|
|
|
|
}
|
|
|
|
|
|
|
|
chan_list =
|
|
|
|
(struct mwifiex_ie_types_chan_list_param_set *) *buffer;
|
|
|
|
memset(chan_list, 0,
|
|
|
|
sizeof(struct mwifiex_ie_types_chan_list_param_set));
|
|
|
|
chan_list->header.type = cpu_to_le16(TLV_TYPE_CHANLIST);
|
|
|
|
chan_list->header.len = cpu_to_le16(
|
|
|
|
sizeof(struct mwifiex_ie_types_chan_list_param_set) -
|
|
|
|
sizeof(struct mwifiex_ie_types_header));
|
|
|
|
chan_list->chan_scan_param[0].chan_number =
|
|
|
|
bss_desc->bcn_ht_info->control_chan;
|
|
|
|
chan_list->chan_scan_param[0].radio_type =
|
|
|
|
mwifiex_band_to_radio_type((u8) bss_desc->bss_band);
|
|
|
|
|
2011-03-26 10:47:02 +08:00
|
|
|
if (ISSUPP_CHANWIDTH40(priv->adapter->hw_dot_11n_dev_cap)
|
|
|
|
&& (bss_desc->bcn_ht_info->ht_param &
|
|
|
|
IEEE80211_HT_PARAM_CHAN_WIDTH_ANY))
|
2011-03-22 09:00:50 +08:00
|
|
|
SET_SECONDARYCHAN(chan_list->chan_scan_param[0].
|
|
|
|
radio_type,
|
2011-03-26 10:47:02 +08:00
|
|
|
(bss_desc->bcn_ht_info->ht_param &
|
|
|
|
IEEE80211_HT_PARAM_CHA_SEC_OFFSET));
|
2011-03-22 09:00:50 +08:00
|
|
|
|
|
|
|
*buffer += sizeof(struct mwifiex_ie_types_chan_list_param_set);
|
|
|
|
ret_len += sizeof(struct mwifiex_ie_types_chan_list_param_set);
|
|
|
|
}
|
|
|
|
|
|
|
|
if (bss_desc->bcn_bss_co_2040) {
|
|
|
|
bss_co_2040 = (struct mwifiex_ie_types_2040bssco *) *buffer;
|
|
|
|
memset(bss_co_2040, 0,
|
|
|
|
sizeof(struct mwifiex_ie_types_2040bssco));
|
|
|
|
bss_co_2040->header.type = cpu_to_le16(WLAN_EID_BSS_COEX_2040);
|
|
|
|
bss_co_2040->header.len =
|
|
|
|
cpu_to_le16(sizeof(bss_co_2040->bss_co_2040));
|
|
|
|
|
|
|
|
memcpy((u8 *) bss_co_2040 +
|
|
|
|
sizeof(struct mwifiex_ie_types_header),
|
|
|
|
(u8 *) bss_desc->bcn_bss_co_2040 +
|
|
|
|
sizeof(struct ieee_types_header),
|
|
|
|
le16_to_cpu(bss_co_2040->header.len));
|
|
|
|
|
|
|
|
*buffer += sizeof(struct mwifiex_ie_types_2040bssco);
|
|
|
|
ret_len += sizeof(struct mwifiex_ie_types_2040bssco);
|
|
|
|
}
|
|
|
|
|
|
|
|
if (bss_desc->bcn_ext_cap) {
|
|
|
|
ext_cap = (struct mwifiex_ie_types_extcap *) *buffer;
|
|
|
|
memset(ext_cap, 0, sizeof(struct mwifiex_ie_types_extcap));
|
|
|
|
ext_cap->header.type = cpu_to_le16(WLAN_EID_EXT_CAPABILITY);
|
|
|
|
ext_cap->header.len = cpu_to_le16(sizeof(ext_cap->ext_cap));
|
|
|
|
|
|
|
|
memcpy((u8 *) ext_cap +
|
|
|
|
sizeof(struct mwifiex_ie_types_header),
|
|
|
|
(u8 *) bss_desc->bcn_ext_cap +
|
|
|
|
sizeof(struct ieee_types_header),
|
|
|
|
le16_to_cpu(ext_cap->header.len));
|
|
|
|
|
|
|
|
*buffer += sizeof(struct mwifiex_ie_types_extcap);
|
|
|
|
ret_len += sizeof(struct mwifiex_ie_types_extcap);
|
|
|
|
}
|
|
|
|
|
|
|
|
return ret_len;
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* This function reconfigures the Tx buffer size in firmware.
|
|
|
|
*
|
|
|
|
* This function prepares a firmware command and issues it, if
|
|
|
|
* the current Tx buffer size is different from the one requested.
|
|
|
|
* Maximum configurable Tx buffer size is limited by the HT capability
|
|
|
|
* field value.
|
|
|
|
*/
|
|
|
|
void
|
|
|
|
mwifiex_cfg_tx_buf(struct mwifiex_private *priv,
|
|
|
|
struct mwifiex_bssdescriptor *bss_desc)
|
|
|
|
{
|
|
|
|
u16 max_amsdu = MWIFIEX_TX_DATA_BUF_SIZE_2K;
|
|
|
|
u16 tx_buf = 0;
|
|
|
|
u16 curr_tx_buf_size = 0;
|
|
|
|
|
|
|
|
if (bss_desc->bcn_ht_cap) {
|
2011-03-26 10:47:02 +08:00
|
|
|
if (le16_to_cpu(bss_desc->bcn_ht_cap->cap_info) &
|
|
|
|
IEEE80211_HT_CAP_MAX_AMSDU)
|
2011-03-22 09:00:50 +08:00
|
|
|
max_amsdu = MWIFIEX_TX_DATA_BUF_SIZE_8K;
|
|
|
|
else
|
|
|
|
max_amsdu = MWIFIEX_TX_DATA_BUF_SIZE_4K;
|
|
|
|
}
|
|
|
|
|
|
|
|
tx_buf = min(priv->adapter->max_tx_buf_size, max_amsdu);
|
|
|
|
|
|
|
|
dev_dbg(priv->adapter->dev, "info: max_amsdu=%d, max_tx_buf=%d\n",
|
|
|
|
max_amsdu, priv->adapter->max_tx_buf_size);
|
|
|
|
|
|
|
|
if (priv->adapter->curr_tx_buf_size <= MWIFIEX_TX_DATA_BUF_SIZE_2K)
|
|
|
|
curr_tx_buf_size = MWIFIEX_TX_DATA_BUF_SIZE_2K;
|
|
|
|
else if (priv->adapter->curr_tx_buf_size <= MWIFIEX_TX_DATA_BUF_SIZE_4K)
|
|
|
|
curr_tx_buf_size = MWIFIEX_TX_DATA_BUF_SIZE_4K;
|
|
|
|
else if (priv->adapter->curr_tx_buf_size <= MWIFIEX_TX_DATA_BUF_SIZE_8K)
|
|
|
|
curr_tx_buf_size = MWIFIEX_TX_DATA_BUF_SIZE_8K;
|
|
|
|
if (curr_tx_buf_size != tx_buf)
|
2011-04-14 08:27:06 +08:00
|
|
|
mwifiex_send_cmd_async(priv, HostCmd_CMD_RECONFIGURE_TX_BUFF,
|
|
|
|
HostCmd_ACT_GEN_SET, 0, &tx_buf);
|
2011-03-22 09:00:50 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* This function checks if the given pointer is valid entry of
|
|
|
|
* Tx BA Stream table.
|
|
|
|
*/
|
|
|
|
static int mwifiex_is_tx_ba_stream_ptr_valid(struct mwifiex_private *priv,
|
|
|
|
struct mwifiex_tx_ba_stream_tbl *tx_tbl_ptr)
|
|
|
|
{
|
|
|
|
struct mwifiex_tx_ba_stream_tbl *tx_ba_tsr_tbl;
|
|
|
|
|
|
|
|
list_for_each_entry(tx_ba_tsr_tbl, &priv->tx_ba_stream_tbl_ptr, list) {
|
|
|
|
if (tx_ba_tsr_tbl == tx_tbl_ptr)
|
|
|
|
return true;
|
|
|
|
}
|
|
|
|
|
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* This function deletes the given entry in Tx BA Stream table.
|
|
|
|
*
|
|
|
|
* The function also performs a validity check on the supplied
|
|
|
|
* pointer before trying to delete.
|
|
|
|
*/
|
|
|
|
void mwifiex_11n_delete_tx_ba_stream_tbl_entry(struct mwifiex_private *priv,
|
|
|
|
struct mwifiex_tx_ba_stream_tbl *tx_ba_tsr_tbl)
|
|
|
|
{
|
|
|
|
if (!tx_ba_tsr_tbl &&
|
|
|
|
mwifiex_is_tx_ba_stream_ptr_valid(priv, tx_ba_tsr_tbl))
|
|
|
|
return;
|
|
|
|
|
|
|
|
dev_dbg(priv->adapter->dev, "info: tx_ba_tsr_tbl %p\n", tx_ba_tsr_tbl);
|
|
|
|
|
|
|
|
list_del(&tx_ba_tsr_tbl->list);
|
|
|
|
|
|
|
|
kfree(tx_ba_tsr_tbl);
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* This function deletes all the entries in Tx BA Stream table.
|
|
|
|
*/
|
|
|
|
void mwifiex_11n_delete_all_tx_ba_stream_tbl(struct mwifiex_private *priv)
|
|
|
|
{
|
|
|
|
int i;
|
|
|
|
struct mwifiex_tx_ba_stream_tbl *del_tbl_ptr, *tmp_node;
|
|
|
|
unsigned long flags;
|
|
|
|
|
|
|
|
spin_lock_irqsave(&priv->tx_ba_stream_tbl_lock, flags);
|
|
|
|
list_for_each_entry_safe(del_tbl_ptr, tmp_node,
|
|
|
|
&priv->tx_ba_stream_tbl_ptr, list)
|
|
|
|
mwifiex_11n_delete_tx_ba_stream_tbl_entry(priv, del_tbl_ptr);
|
|
|
|
spin_unlock_irqrestore(&priv->tx_ba_stream_tbl_lock, flags);
|
|
|
|
|
|
|
|
INIT_LIST_HEAD(&priv->tx_ba_stream_tbl_ptr);
|
|
|
|
|
|
|
|
for (i = 0; i < MAX_NUM_TID; ++i)
|
|
|
|
priv->aggr_prio_tbl[i].ampdu_ap =
|
|
|
|
priv->aggr_prio_tbl[i].ampdu_user;
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* This function returns the pointer to an entry in BA Stream
|
|
|
|
* table which matches the given RA/TID pair.
|
|
|
|
*/
|
|
|
|
struct mwifiex_tx_ba_stream_tbl *
|
|
|
|
mwifiex_11n_get_tx_ba_stream_tbl(struct mwifiex_private *priv,
|
|
|
|
int tid, u8 *ra)
|
|
|
|
{
|
|
|
|
struct mwifiex_tx_ba_stream_tbl *tx_ba_tsr_tbl;
|
|
|
|
unsigned long flags;
|
|
|
|
|
|
|
|
spin_lock_irqsave(&priv->tx_ba_stream_tbl_lock, flags);
|
|
|
|
list_for_each_entry(tx_ba_tsr_tbl, &priv->tx_ba_stream_tbl_ptr, list) {
|
|
|
|
if ((!memcmp(tx_ba_tsr_tbl->ra, ra, ETH_ALEN))
|
|
|
|
&& (tx_ba_tsr_tbl->tid == tid)) {
|
|
|
|
spin_unlock_irqrestore(&priv->tx_ba_stream_tbl_lock,
|
|
|
|
flags);
|
|
|
|
return tx_ba_tsr_tbl;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
spin_unlock_irqrestore(&priv->tx_ba_stream_tbl_lock, flags);
|
|
|
|
return NULL;
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* This function creates an entry in Tx BA stream table for the
|
|
|
|
* given RA/TID pair.
|
|
|
|
*/
|
|
|
|
void mwifiex_11n_create_tx_ba_stream_tbl(struct mwifiex_private *priv,
|
|
|
|
u8 *ra, int tid,
|
|
|
|
enum mwifiex_ba_status ba_status)
|
|
|
|
{
|
|
|
|
struct mwifiex_tx_ba_stream_tbl *new_node;
|
|
|
|
unsigned long flags;
|
|
|
|
|
|
|
|
if (!mwifiex_11n_get_tx_ba_stream_tbl(priv, tid, ra)) {
|
|
|
|
new_node = kzalloc(sizeof(struct mwifiex_tx_ba_stream_tbl),
|
|
|
|
GFP_ATOMIC);
|
|
|
|
if (!new_node) {
|
|
|
|
dev_err(priv->adapter->dev,
|
|
|
|
"%s: failed to alloc new_node\n", __func__);
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
INIT_LIST_HEAD(&new_node->list);
|
|
|
|
|
|
|
|
new_node->tid = tid;
|
|
|
|
new_node->ba_status = ba_status;
|
|
|
|
memcpy(new_node->ra, ra, ETH_ALEN);
|
|
|
|
|
|
|
|
spin_lock_irqsave(&priv->tx_ba_stream_tbl_lock, flags);
|
|
|
|
list_add_tail(&new_node->list, &priv->tx_ba_stream_tbl_ptr);
|
|
|
|
spin_unlock_irqrestore(&priv->tx_ba_stream_tbl_lock, flags);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* This function sends an add BA request to the given TID/RA pair.
|
|
|
|
*/
|
|
|
|
int mwifiex_send_addba(struct mwifiex_private *priv, int tid, u8 *peer_mac)
|
|
|
|
{
|
|
|
|
struct host_cmd_ds_11n_addba_req add_ba_req;
|
|
|
|
static u8 dialog_tok;
|
|
|
|
int ret;
|
|
|
|
|
|
|
|
dev_dbg(priv->adapter->dev, "cmd: %s: tid %d\n", __func__, tid);
|
|
|
|
|
|
|
|
add_ba_req.block_ack_param_set = cpu_to_le16(
|
|
|
|
(u16) ((tid << BLOCKACKPARAM_TID_POS) |
|
|
|
|
(priv->add_ba_param.
|
|
|
|
tx_win_size << BLOCKACKPARAM_WINSIZE_POS) |
|
|
|
|
IMMEDIATE_BLOCK_ACK));
|
|
|
|
add_ba_req.block_ack_tmo = cpu_to_le16((u16)priv->add_ba_param.timeout);
|
|
|
|
|
|
|
|
++dialog_tok;
|
|
|
|
|
|
|
|
if (dialog_tok == 0)
|
|
|
|
dialog_tok = 1;
|
|
|
|
|
|
|
|
add_ba_req.dialog_token = dialog_tok;
|
|
|
|
memcpy(&add_ba_req.peer_mac_addr, peer_mac, ETH_ALEN);
|
|
|
|
|
|
|
|
/* We don't wait for the response of this command */
|
2011-04-14 08:27:06 +08:00
|
|
|
ret = mwifiex_send_cmd_async(priv, HostCmd_CMD_11N_ADDBA_REQ,
|
|
|
|
0, 0, &add_ba_req);
|
2011-03-22 09:00:50 +08:00
|
|
|
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* This function sends a delete BA request to the given TID/RA pair.
|
|
|
|
*/
|
|
|
|
int mwifiex_send_delba(struct mwifiex_private *priv, int tid, u8 *peer_mac,
|
|
|
|
int initiator)
|
|
|
|
{
|
|
|
|
struct host_cmd_ds_11n_delba delba;
|
|
|
|
int ret;
|
|
|
|
uint16_t del_ba_param_set;
|
|
|
|
|
|
|
|
memset(&delba, 0, sizeof(delba));
|
|
|
|
delba.del_ba_param_set = cpu_to_le16(tid << DELBA_TID_POS);
|
|
|
|
|
|
|
|
del_ba_param_set = le16_to_cpu(delba.del_ba_param_set);
|
|
|
|
if (initiator)
|
|
|
|
del_ba_param_set |= IEEE80211_DELBA_PARAM_INITIATOR_MASK;
|
|
|
|
else
|
|
|
|
del_ba_param_set &= ~IEEE80211_DELBA_PARAM_INITIATOR_MASK;
|
|
|
|
|
|
|
|
memcpy(&delba.peer_mac_addr, peer_mac, ETH_ALEN);
|
|
|
|
|
|
|
|
/* We don't wait for the response of this command */
|
2011-04-14 08:27:06 +08:00
|
|
|
ret = mwifiex_send_cmd_async(priv, HostCmd_CMD_11N_DELBA,
|
|
|
|
HostCmd_ACT_GEN_SET, 0, &delba);
|
2011-03-22 09:00:50 +08:00
|
|
|
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* This function handles the command response of a delete BA request.
|
|
|
|
*/
|
|
|
|
void mwifiex_11n_delete_ba_stream(struct mwifiex_private *priv, u8 *del_ba)
|
|
|
|
{
|
|
|
|
struct host_cmd_ds_11n_delba *cmd_del_ba =
|
|
|
|
(struct host_cmd_ds_11n_delba *) del_ba;
|
|
|
|
uint16_t del_ba_param_set = le16_to_cpu(cmd_del_ba->del_ba_param_set);
|
|
|
|
int tid;
|
|
|
|
|
|
|
|
tid = del_ba_param_set >> DELBA_TID_POS;
|
|
|
|
|
|
|
|
mwifiex_11n_delete_ba_stream_tbl(priv, tid, cmd_del_ba->peer_mac_addr,
|
|
|
|
TYPE_DELBA_RECEIVE,
|
|
|
|
INITIATOR_BIT(del_ba_param_set));
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* This function retrieves the Rx reordering table.
|
|
|
|
*/
|
|
|
|
int mwifiex_get_rx_reorder_tbl(struct mwifiex_private *priv,
|
|
|
|
struct mwifiex_ds_rx_reorder_tbl *buf)
|
|
|
|
{
|
|
|
|
int i;
|
|
|
|
struct mwifiex_ds_rx_reorder_tbl *rx_reo_tbl = buf;
|
|
|
|
struct mwifiex_rx_reorder_tbl *rx_reorder_tbl_ptr;
|
|
|
|
int count = 0;
|
|
|
|
unsigned long flags;
|
|
|
|
|
|
|
|
spin_lock_irqsave(&priv->rx_reorder_tbl_lock, flags);
|
|
|
|
list_for_each_entry(rx_reorder_tbl_ptr, &priv->rx_reorder_tbl_ptr,
|
|
|
|
list) {
|
|
|
|
rx_reo_tbl->tid = (u16) rx_reorder_tbl_ptr->tid;
|
|
|
|
memcpy(rx_reo_tbl->ta, rx_reorder_tbl_ptr->ta, ETH_ALEN);
|
|
|
|
rx_reo_tbl->start_win = rx_reorder_tbl_ptr->start_win;
|
|
|
|
rx_reo_tbl->win_size = rx_reorder_tbl_ptr->win_size;
|
|
|
|
for (i = 0; i < rx_reorder_tbl_ptr->win_size; ++i) {
|
|
|
|
if (rx_reorder_tbl_ptr->rx_reorder_ptr[i])
|
|
|
|
rx_reo_tbl->buffer[i] = true;
|
|
|
|
else
|
|
|
|
rx_reo_tbl->buffer[i] = false;
|
|
|
|
}
|
|
|
|
rx_reo_tbl++;
|
|
|
|
count++;
|
|
|
|
|
|
|
|
if (count >= MWIFIEX_MAX_RX_BASTREAM_SUPPORTED)
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
spin_unlock_irqrestore(&priv->rx_reorder_tbl_lock, flags);
|
|
|
|
|
|
|
|
return count;
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* This function retrieves the Tx BA stream table.
|
|
|
|
*/
|
|
|
|
int mwifiex_get_tx_ba_stream_tbl(struct mwifiex_private *priv,
|
|
|
|
struct mwifiex_ds_tx_ba_stream_tbl *buf)
|
|
|
|
{
|
|
|
|
struct mwifiex_tx_ba_stream_tbl *tx_ba_tsr_tbl;
|
|
|
|
struct mwifiex_ds_tx_ba_stream_tbl *rx_reo_tbl = buf;
|
|
|
|
int count = 0;
|
|
|
|
unsigned long flags;
|
|
|
|
|
|
|
|
spin_lock_irqsave(&priv->tx_ba_stream_tbl_lock, flags);
|
|
|
|
list_for_each_entry(tx_ba_tsr_tbl, &priv->tx_ba_stream_tbl_ptr, list) {
|
|
|
|
rx_reo_tbl->tid = (u16) tx_ba_tsr_tbl->tid;
|
|
|
|
dev_dbg(priv->adapter->dev, "data: %s tid=%d\n",
|
|
|
|
__func__, rx_reo_tbl->tid);
|
|
|
|
memcpy(rx_reo_tbl->ra, tx_ba_tsr_tbl->ra, ETH_ALEN);
|
|
|
|
rx_reo_tbl++;
|
|
|
|
count++;
|
|
|
|
if (count >= MWIFIEX_MAX_TX_BASTREAM_SUPPORTED)
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
spin_unlock_irqrestore(&priv->tx_ba_stream_tbl_lock, flags);
|
|
|
|
|
|
|
|
return count;
|
|
|
|
}
|