2012-08-02 16:17:51 +08:00
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/*
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* Power Management Service Unit(PMSU) support for Armada 370/XP platforms.
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*
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* Copyright (C) 2012 Marvell
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*
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* Yehuda Yitschak <yehuday@marvell.com>
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* Gregory Clement <gregory.clement@free-electrons.com>
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* Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
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*
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* This file is licensed under the terms of the GNU General Public
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* License version 2. This program is licensed "as is" without any
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* warranty of any kind, whether express or implied.
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*
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* The Armada 370 and Armada XP SOCs have a power management service
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* unit which is responsible for powering down and waking up CPUs and
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* other SOC units
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*/
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2014-04-14 21:50:30 +08:00
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#define pr_fmt(fmt) "mvebu-pmsu: " fmt
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2012-08-02 16:17:51 +08:00
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/of_address.h>
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#include <linux/io.h>
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#include <linux/smp.h>
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ARM: mvebu: start using the CPU reset driver
This commit changes the PMSU driver to no longer map itself the CPU
reset registers, and instead call into the CPU reset driver to
deassert the secondary CPUs for SMP booting.
In order to provide Device Tree backward compatibility, the CPU reset
driver is extended to not only support its official compatible string
"marvell,armada-370-cpu-reset", but to also look at the PMSU
compatible string "marvell,armada-370-xp-pmsu" to find the CPU reset
registers address. This allows old Device Tree to work correctly with
newer kernel versions. Therefore, the CPU reset driver implements the
following logic:
* If one of the normal compatible strings
"marvell,armada-370-cpu-reset" is found, then we map its first
memory resource as the CPU reset registers.
* Otherwise, if none of the normal compatible strings have been
found, we look for the "marvell,armada-370-xp-pmsu" compatible
string, and we map the second memory as the CPU reset registers.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Link: https://lkml.kernel.org/r/1397483433-25836-3-git-send-email-thomas.petazzoni@free-electrons.com
Acked-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2014-04-14 21:50:29 +08:00
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#include <linux/resource.h>
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2012-08-02 16:17:51 +08:00
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#include <asm/smp_plat.h>
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ARM: mvebu: start using the CPU reset driver
This commit changes the PMSU driver to no longer map itself the CPU
reset registers, and instead call into the CPU reset driver to
deassert the secondary CPUs for SMP booting.
In order to provide Device Tree backward compatibility, the CPU reset
driver is extended to not only support its official compatible string
"marvell,armada-370-cpu-reset", but to also look at the PMSU
compatible string "marvell,armada-370-xp-pmsu" to find the CPU reset
registers address. This allows old Device Tree to work correctly with
newer kernel versions. Therefore, the CPU reset driver implements the
following logic:
* If one of the normal compatible strings
"marvell,armada-370-cpu-reset" is found, then we map its first
memory resource as the CPU reset registers.
* Otherwise, if none of the normal compatible strings have been
found, we look for the "marvell,armada-370-xp-pmsu" compatible
string, and we map the second memory as the CPU reset registers.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Link: https://lkml.kernel.org/r/1397483433-25836-3-git-send-email-thomas.petazzoni@free-electrons.com
Acked-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2014-04-14 21:50:29 +08:00
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#include "common.h"
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2013-11-07 17:02:38 +08:00
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#include "pmsu.h"
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2012-08-02 16:17:51 +08:00
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static void __iomem *pmsu_mp_base;
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2014-04-14 21:50:31 +08:00
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#define PMSU_BASE_OFFSET 0x100
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#define PMSU_REG_SIZE 0x1000
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#define PMSU_BOOT_ADDR_REDIRECT_OFFSET(cpu) ((cpu * 0x100) + 0x124)
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2012-08-02 16:17:51 +08:00
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static struct of_device_id of_pmsu_table[] = {
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2014-04-14 21:50:31 +08:00
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{ .compatible = "marvell,armada-370-pmsu", },
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{ .compatible = "marvell,armada-370-xp-pmsu", },
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2014-04-14 21:54:04 +08:00
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{ .compatible = "marvell,armada-380-pmsu", },
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2012-08-02 16:17:51 +08:00
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{ /* end of list */ },
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};
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2014-04-14 21:53:58 +08:00
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void mvebu_pmsu_set_cpu_boot_addr(int hw_cpu, void *boot_addr)
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2014-04-14 21:50:33 +08:00
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{
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writel(virt_to_phys(boot_addr), pmsu_mp_base +
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PMSU_BOOT_ADDR_REDIRECT_OFFSET(hw_cpu));
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}
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2013-11-07 17:02:38 +08:00
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static int __init armada_370_xp_pmsu_init(void)
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2012-08-02 16:17:51 +08:00
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{
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struct device_node *np;
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2014-04-14 21:50:30 +08:00
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struct resource res;
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int ret = 0;
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2012-08-02 16:17:51 +08:00
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np = of_find_matching_node(NULL, of_pmsu_table);
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2014-04-14 21:50:30 +08:00
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if (!np)
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return 0;
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pr_info("Initializing Power Management Service Unit\n");
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if (of_address_to_resource(np, 0, &res)) {
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pr_err("unable to get resource\n");
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ret = -ENOENT;
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goto out;
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2012-08-02 16:17:51 +08:00
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}
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2014-04-14 21:50:31 +08:00
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if (of_device_is_compatible(np, "marvell,armada-370-xp-pmsu")) {
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pr_warn(FW_WARN "deprecated pmsu binding\n");
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res.start = res.start - PMSU_BASE_OFFSET;
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res.end = res.start + PMSU_REG_SIZE - 1;
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}
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2014-04-14 21:50:30 +08:00
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if (!request_mem_region(res.start, resource_size(&res),
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np->full_name)) {
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pr_err("unable to request region\n");
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ret = -EBUSY;
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goto out;
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}
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pmsu_mp_base = ioremap(res.start, resource_size(&res));
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if (!pmsu_mp_base) {
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pr_err("unable to map registers\n");
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release_mem_region(res.start, resource_size(&res));
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ret = -ENOMEM;
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goto out;
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}
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out:
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of_node_put(np);
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return ret;
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2012-08-02 16:17:51 +08:00
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}
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early_initcall(armada_370_xp_pmsu_init);
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