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linux_old1/arch/arm/mach-keystone/keystone.c

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ARM: keystone: Add minimal TI Keystone platform support Texas Instruments Keystone family of multi-core devices are based on ARM Cortex A15. Patch adds basic definitions for a new Keystone sub-architecture in ARM. The TCI66xxK2H Communications Infrastructure Keystone SoCs are member of the C66x family based on TI's new KeyStone 2 multi-core SoC Architecture designed specifically for high performance wireless and networking infrastructure applications. The SOCs contains many subsystems like Cortex A15 ARM CorePacs, C66XX DSP CorePacs, MSMC memory controller, Tera Net bus, IP Network, Navigator, Hyperlink, 1G/10G Ethernet, Radio layers and queue based communication systems. Cc: Arnd Bergmann <arnd@arndb.de> Cc: arm@kernel.org Acked-by: Olof Johansson <olof@lixom.net> Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
2013-06-10 23:27:13 +08:00
/*
* Keystone2 based boards and SOC related code.
*
* Copyright 2013 Texas Instruments, Inc.
* Cyril Chemparathy <cyril@ti.com>
* Santosh Shilimkar <santosh.shillimkar@ti.com>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
* version 2, as published by the Free Software Foundation.
*/
#include <linux/io.h>
#include <linux/of.h>
#include <linux/init.h>
#include <linux/of_platform.h>
#include <linux/of_address.h>
#include <asm/setup.h>
#include <asm/mach/map.h>
#include <asm/mach/arch.h>
#include <asm/mach/time.h>
ARM: keystone: Enable SMP support on Keystone machines Add basic SMP support for Keystone machines. This does not include support for CPU hotplug for now. Cc: Arnd Bergmann <arnd@arndb.de> Cc: arm@kernel.org Acked-by: Olof Johansson <olof@lixom.net> Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
2013-06-11 00:20:17 +08:00
#include <asm/smp_plat.h>
#include "keystone.h"
ARM: keystone: Add minimal TI Keystone platform support Texas Instruments Keystone family of multi-core devices are based on ARM Cortex A15. Patch adds basic definitions for a new Keystone sub-architecture in ARM. The TCI66xxK2H Communications Infrastructure Keystone SoCs are member of the C66x family based on TI's new KeyStone 2 multi-core SoC Architecture designed specifically for high performance wireless and networking infrastructure applications. The SOCs contains many subsystems like Cortex A15 ARM CorePacs, C66XX DSP CorePacs, MSMC memory controller, Tera Net bus, IP Network, Navigator, Hyperlink, 1G/10G Ethernet, Radio layers and queue based communication systems. Cc: Arnd Bergmann <arnd@arndb.de> Cc: arm@kernel.org Acked-by: Olof Johansson <olof@lixom.net> Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
2013-06-10 23:27:13 +08:00
#define PLL_RESET_WRITE_KEY_MASK 0xffff0000
#define PLL_RESET_WRITE_KEY 0x5a69
#define PLL_RESET BIT(16)
static void __iomem *keystone_rstctrl;
static void __init keystone_init(void)
{
struct device_node *node;
node = of_find_compatible_node(NULL, NULL, "ti,keystone-reset");
if (WARN_ON(!node))
pr_warn("ti,keystone-reset node undefined\n");
keystone_rstctrl = of_iomap(node, 0);
if (WARN_ON(!keystone_rstctrl))
pr_warn("ti,keystone-reset iomap error\n");
ARM: keystone: Make PM bus ready before populating platform devices Keystone PM bus makes use of generic PM clock core backend. Since generic PM clock core uses platform bus notifiers to track events like ADD_DEVICE/DEL_DEVICE and to fill clock lists per each device, we need to initialise Keystone PM domains before the platform devices have been created. Hence, fix it by moving keystone_pm_runtime_init() before platform devices have been populated. Reported-by: Grygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
2013-11-24 06:08:03 +08:00
keystone_pm_runtime_init();
ARM: keystone: Add minimal TI Keystone platform support Texas Instruments Keystone family of multi-core devices are based on ARM Cortex A15. Patch adds basic definitions for a new Keystone sub-architecture in ARM. The TCI66xxK2H Communications Infrastructure Keystone SoCs are member of the C66x family based on TI's new KeyStone 2 multi-core SoC Architecture designed specifically for high performance wireless and networking infrastructure applications. The SOCs contains many subsystems like Cortex A15 ARM CorePacs, C66XX DSP CorePacs, MSMC memory controller, Tera Net bus, IP Network, Navigator, Hyperlink, 1G/10G Ethernet, Radio layers and queue based communication systems. Cc: Arnd Bergmann <arnd@arndb.de> Cc: arm@kernel.org Acked-by: Olof Johansson <olof@lixom.net> Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
2013-06-10 23:27:13 +08:00
of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
}
static const char *keystone_match[] __initconst = {
ARM: dts: keystone: use common "ti,keystone" compatible instead of -evm As suggested by Olof Johansson at http://www.spinics.net/lists/arm-kernel/msg314009.html. It be better just keeping a "ti,keystone" top-level compatible and just using that to probe. If so we don't have to touch the file for new boards in the future. So use common "ti,keystone" compatible in keystone.c for all boards. Cc: Santosh Shilimkar <santosh.shilimkar@ti.com> Cc: Olof Johansson <olof@lixom.net> Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com> Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
2014-03-21 05:00:27 +08:00
"ti,keystone",
ARM: keystone: Add minimal TI Keystone platform support Texas Instruments Keystone family of multi-core devices are based on ARM Cortex A15. Patch adds basic definitions for a new Keystone sub-architecture in ARM. The TCI66xxK2H Communications Infrastructure Keystone SoCs are member of the C66x family based on TI's new KeyStone 2 multi-core SoC Architecture designed specifically for high performance wireless and networking infrastructure applications. The SOCs contains many subsystems like Cortex A15 ARM CorePacs, C66XX DSP CorePacs, MSMC memory controller, Tera Net bus, IP Network, Navigator, Hyperlink, 1G/10G Ethernet, Radio layers and queue based communication systems. Cc: Arnd Bergmann <arnd@arndb.de> Cc: arm@kernel.org Acked-by: Olof Johansson <olof@lixom.net> Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
2013-06-10 23:27:13 +08:00
NULL,
};
ARM: keystone: fix compilation warning Fix the following compilation warning: arch/arm/mach-keystone/keystone.c:74:2: warning: initialization from incompatible pointer type [enabled by default] arch/arm/mach-keystone/keystone.c:74:2: warning: (near initialization for ‘__mach_desc_KEYSTONE.restart’) [enabled by default] Signed-off-by: Vincent Stehlé <vincent.stehle@freescale.com> Cc: Robin Holt <holt@sgi.com> Cc: Russell King <linux@arm.linux.org.uk> Cc: trivial@kernel.org Signed-off-by: Olof Johansson <olof@lixom.net>
2013-06-27 20:49:27 +08:00
void keystone_restart(enum reboot_mode mode, const char *cmd)
ARM: keystone: Add minimal TI Keystone platform support Texas Instruments Keystone family of multi-core devices are based on ARM Cortex A15. Patch adds basic definitions for a new Keystone sub-architecture in ARM. The TCI66xxK2H Communications Infrastructure Keystone SoCs are member of the C66x family based on TI's new KeyStone 2 multi-core SoC Architecture designed specifically for high performance wireless and networking infrastructure applications. The SOCs contains many subsystems like Cortex A15 ARM CorePacs, C66XX DSP CorePacs, MSMC memory controller, Tera Net bus, IP Network, Navigator, Hyperlink, 1G/10G Ethernet, Radio layers and queue based communication systems. Cc: Arnd Bergmann <arnd@arndb.de> Cc: arm@kernel.org Acked-by: Olof Johansson <olof@lixom.net> Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
2013-06-10 23:27:13 +08:00
{
u32 val;
BUG_ON(!keystone_rstctrl);
/* Enable write access to RSTCTRL */
val = readl(keystone_rstctrl);
val &= PLL_RESET_WRITE_KEY_MASK;
val |= PLL_RESET_WRITE_KEY;
writel(val, keystone_rstctrl);
/* Reset the SOC */
val = readl(keystone_rstctrl);
val &= ~PLL_RESET;
writel(val, keystone_rstctrl);
}
DT_MACHINE_START(KEYSTONE, "Keystone")
ARM: keystone: enable DMA zone for LPAE Keystone II peripheral devices support 32-bit DMA and hence can access only first 2GB of the memory address space. So set the platform dma_zone_size to handle that case. Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
2013-11-24 05:58:03 +08:00
#if defined(CONFIG_ZONE_DMA) && defined(CONFIG_ARM_LPAE)
.dma_zone_size = SZ_2G,
#endif
ARM: keystone: Enable SMP support on Keystone machines Add basic SMP support for Keystone machines. This does not include support for CPU hotplug for now. Cc: Arnd Bergmann <arnd@arndb.de> Cc: arm@kernel.org Acked-by: Olof Johansson <olof@lixom.net> Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
2013-06-11 00:20:17 +08:00
.smp = smp_ops(keystone_smp_ops),
ARM: keystone: Add minimal TI Keystone platform support Texas Instruments Keystone family of multi-core devices are based on ARM Cortex A15. Patch adds basic definitions for a new Keystone sub-architecture in ARM. The TCI66xxK2H Communications Infrastructure Keystone SoCs are member of the C66x family based on TI's new KeyStone 2 multi-core SoC Architecture designed specifically for high performance wireless and networking infrastructure applications. The SOCs contains many subsystems like Cortex A15 ARM CorePacs, C66XX DSP CorePacs, MSMC memory controller, Tera Net bus, IP Network, Navigator, Hyperlink, 1G/10G Ethernet, Radio layers and queue based communication systems. Cc: Arnd Bergmann <arnd@arndb.de> Cc: arm@kernel.org Acked-by: Olof Johansson <olof@lixom.net> Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
2013-06-10 23:27:13 +08:00
.init_machine = keystone_init,
.dt_compat = keystone_match,
.restart = keystone_restart,
MACHINE_END