2014-06-04 04:03:59 +08:00
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/*
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* Thunderbolt Cactus Ridge driver - control channel and configuration commands
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*
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* Copyright (c) 2014 Andreas Noever <andreas.noever@gmail.com>
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*/
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#ifndef _TB_CFG
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#define _TB_CFG
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#include "nhi.h"
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2017-06-06 20:25:06 +08:00
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#include "tb_msgs.h"
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2014-06-04 04:03:59 +08:00
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/* control channel */
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struct tb_ctl;
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typedef void (*hotplug_cb)(void *data, u64 route, u8 port, bool unplug);
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struct tb_ctl *tb_ctl_alloc(struct tb_nhi *nhi, hotplug_cb cb, void *cb_data);
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void tb_ctl_start(struct tb_ctl *ctl);
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void tb_ctl_stop(struct tb_ctl *ctl);
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void tb_ctl_free(struct tb_ctl *ctl);
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/* configuration commands */
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#define TB_CFG_DEFAULT_TIMEOUT 5000 /* msec */
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struct tb_cfg_result {
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u64 response_route;
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u32 response_port; /*
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* If err = 1 then this is the port that send the
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* error.
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* If err = 0 and if this was a cfg_read/write then
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* this is the the upstream port of the responding
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* switch.
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* Otherwise the field is set to zero.
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*/
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int err; /* negative errors, 0 for success, 1 for tb errors */
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enum tb_cfg_error tb_error; /* valid if err == 1 */
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};
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int tb_cfg_error(struct tb_ctl *ctl, u64 route, u32 port,
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enum tb_cfg_error error);
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struct tb_cfg_result tb_cfg_reset(struct tb_ctl *ctl, u64 route,
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int timeout_msec);
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struct tb_cfg_result tb_cfg_read_raw(struct tb_ctl *ctl, void *buffer,
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u64 route, u32 port,
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enum tb_cfg_space space, u32 offset,
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u32 length, int timeout_msec);
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2017-06-06 20:24:53 +08:00
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struct tb_cfg_result tb_cfg_write_raw(struct tb_ctl *ctl, const void *buffer,
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2014-06-04 04:03:59 +08:00
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u64 route, u32 port,
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enum tb_cfg_space space, u32 offset,
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u32 length, int timeout_msec);
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int tb_cfg_read(struct tb_ctl *ctl, void *buffer, u64 route, u32 port,
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enum tb_cfg_space space, u32 offset, u32 length);
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2017-06-06 20:24:53 +08:00
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int tb_cfg_write(struct tb_ctl *ctl, const void *buffer, u64 route, u32 port,
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2014-06-04 04:03:59 +08:00
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enum tb_cfg_space space, u32 offset, u32 length);
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int tb_cfg_get_upstream_port(struct tb_ctl *ctl, u64 route);
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#endif
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