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linux_old1/drivers/clk/sunxi-ng/ccu-sun50i-a64.h

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treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 157 Based on 3 normalized pattern(s): this program is free software you can redistribute it and or modify it under the terms of the gnu general public license as published by the free software foundation either version 2 of the license or at your option any later version this program is distributed in the hope that it will be useful but without any warranty without even the implied warranty of merchantability or fitness for a particular purpose see the gnu general public license for more details this program is free software you can redistribute it and or modify it under the terms of the gnu general public license as published by the free software foundation either version 2 of the license or at your option any later version [author] [kishon] [vijay] [abraham] [i] [kishon]@[ti] [com] this program is distributed in the hope that it will be useful but without any warranty without even the implied warranty of merchantability or fitness for a particular purpose see the gnu general public license for more details this program is free software you can redistribute it and or modify it under the terms of the gnu general public license as published by the free software foundation either version 2 of the license or at your option any later version [author] [graeme] [gregory] [gg]@[slimlogic] [co] [uk] [author] [kishon] [vijay] [abraham] [i] [kishon]@[ti] [com] [based] [on] [twl6030]_[usb] [c] [author] [hema] [hk] [hemahk]@[ti] [com] this program is distributed in the hope that it will be useful but without any warranty without even the implied warranty of merchantability or fitness for a particular purpose see the gnu general public license for more details extracted by the scancode license scanner the SPDX license identifier GPL-2.0-or-later has been chosen to replace the boilerplate/reference in 1105 file(s). Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Allison Randal <allison@lohutok.net> Reviewed-by: Richard Fontana <rfontana@redhat.com> Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org> Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190527070033.202006027@linutronix.de Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2019-05-27 14:55:06 +08:00
/* SPDX-License-Identifier: GPL-2.0-or-later */
clk: sunxi-ng: Add A64 clocks Add the A64 CCU clocks set. Acked-by: Rob Herring <robh@kernel.org> Acked-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2016-07-06 14:31:34 +08:00
/*
* Copyright 2016 Maxime Ripard
*
* Maxime Ripard <maxime.ripard@free-electrons.com>
*/
#ifndef _CCU_SUN50I_A64_H_
#define _CCU_SUN50I_A64_H_
#include <dt-bindings/clock/sun50i-a64-ccu.h>
#include <dt-bindings/reset/sun50i-a64-ccu.h>
#define CLK_OSC_12M 0
#define CLK_PLL_CPUX 1
#define CLK_PLL_AUDIO_BASE 2
#define CLK_PLL_AUDIO 3
#define CLK_PLL_AUDIO_2X 4
#define CLK_PLL_AUDIO_4X 5
#define CLK_PLL_AUDIO_8X 6
dt-bindings: clock: sun50i-a64-ccu: Add PLL_VIDEO0 macro Allwinner A64 HDMI PHY clock has PLL_VIDEO0 as a parent. Include the macro on dt-bindings so-that the same can be used while defining CCU clock phandles. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
2018-09-04 12:40:49 +08:00
/* PLL_VIDEO0 exported for HDMI PHY */
clk: sunxi-ng: Add A64 clocks Add the A64 CCU clocks set. Acked-by: Rob Herring <robh@kernel.org> Acked-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2016-07-06 14:31:34 +08:00
#define CLK_PLL_VIDEO0_2X 8
#define CLK_PLL_VE 9
#define CLK_PLL_DDR0 10
clk: sunxi-ng: a64: Export PLL_PERIPH0 clock for the PRCM The PRCM takes PLL_PERIPH0 as one of its parents for the AR100 clock. As such we need to be able to describe this relationship in the device tree. Export the PLL_PERIPH0 clock so we can reference it in the PRCM node. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-05-31 15:58:23 +08:00
/* PLL_PERIPH0 exported for PRCM */
clk: sunxi-ng: Add A64 clocks Add the A64 CCU clocks set. Acked-by: Rob Herring <robh@kernel.org> Acked-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2016-07-06 14:31:34 +08:00
#define CLK_PLL_PERIPH0_2X 12
#define CLK_PLL_PERIPH1 13
#define CLK_PLL_PERIPH1_2X 14
#define CLK_PLL_VIDEO1 15
#define CLK_PLL_GPU 16
#define CLK_PLL_MIPI 17
#define CLK_PLL_HSIC 18
#define CLK_PLL_DE 19
#define CLK_PLL_DDR1 20
#define CLK_AXI 22
#define CLK_APB 23
#define CLK_AHB1 24
#define CLK_APB1 25
#define CLK_APB2 26
#define CLK_AHB2 27
/* All the bus gates are exported */
/* The first bunch of module clocks are exported */
#define CLK_USB_OHCI0_12M 90
#define CLK_USB_OHCI1_12M 92
#define CLK_DRAM 94
/* All the DRAM gates are exported */
/* And the DSI and GPU module clock is exported */
#define CLK_NUMBER (CLK_GPU + 1)
#endif /* _CCU_SUN50I_A64_H_ */