2011-07-26 08:13:27 +08:00
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/*
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* Driver for 93xx46 EEPROMs
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*
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* (C) 2011 DENX Software Engineering, Anatolij Gustschin <agust@denx.de>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/delay.h>
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#include <linux/device.h>
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/mutex.h>
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#include <linux/slab.h>
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#include <linux/spi/spi.h>
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#include <linux/sysfs.h>
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#include <linux/eeprom_93xx46.h>
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#define OP_START 0x4
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#define OP_WRITE (OP_START | 0x1)
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#define OP_READ (OP_START | 0x2)
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#define ADDR_EWDS 0x00
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#define ADDR_ERAL 0x20
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#define ADDR_EWEN 0x30
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struct eeprom_93xx46_dev {
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struct spi_device *spi;
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struct eeprom_93xx46_platform_data *pdata;
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struct bin_attribute bin;
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struct mutex lock;
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int addrlen;
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};
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static ssize_t
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eeprom_93xx46_bin_read(struct file *filp, struct kobject *kobj,
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struct bin_attribute *bin_attr,
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char *buf, loff_t off, size_t count)
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{
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struct eeprom_93xx46_dev *edev;
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struct device *dev;
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struct spi_message m;
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struct spi_transfer t[2];
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int bits, ret;
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u16 cmd_addr;
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dev = container_of(kobj, struct device, kobj);
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edev = dev_get_drvdata(dev);
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cmd_addr = OP_READ << edev->addrlen;
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if (edev->addrlen == 7) {
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cmd_addr |= off & 0x7f;
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bits = 10;
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} else {
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cmd_addr |= off & 0x3f;
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bits = 9;
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}
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dev_dbg(&edev->spi->dev, "read cmd 0x%x, %d Hz\n",
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cmd_addr, edev->spi->max_speed_hz);
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spi_message_init(&m);
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memset(t, 0, sizeof(t));
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t[0].tx_buf = (char *)&cmd_addr;
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t[0].len = 2;
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t[0].bits_per_word = bits;
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spi_message_add_tail(&t[0], &m);
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t[1].rx_buf = buf;
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t[1].len = count;
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t[1].bits_per_word = 8;
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spi_message_add_tail(&t[1], &m);
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mutex_lock(&edev->lock);
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if (edev->pdata->prepare)
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edev->pdata->prepare(edev);
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ret = spi_sync(edev->spi, &m);
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/* have to wait at least Tcsl ns */
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ndelay(250);
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if (ret) {
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dev_err(&edev->spi->dev, "read %zu bytes at %d: err. %d\n",
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count, (int)off, ret);
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}
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if (edev->pdata->finish)
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edev->pdata->finish(edev);
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mutex_unlock(&edev->lock);
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return ret ? : count;
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}
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static int eeprom_93xx46_ew(struct eeprom_93xx46_dev *edev, int is_on)
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{
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struct spi_message m;
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struct spi_transfer t;
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int bits, ret;
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u16 cmd_addr;
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cmd_addr = OP_START << edev->addrlen;
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if (edev->addrlen == 7) {
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cmd_addr |= (is_on ? ADDR_EWEN : ADDR_EWDS) << 1;
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bits = 10;
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} else {
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cmd_addr |= (is_on ? ADDR_EWEN : ADDR_EWDS);
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bits = 9;
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}
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dev_dbg(&edev->spi->dev, "ew cmd 0x%04x\n", cmd_addr);
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spi_message_init(&m);
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memset(&t, 0, sizeof(t));
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t.tx_buf = &cmd_addr;
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t.len = 2;
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t.bits_per_word = bits;
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spi_message_add_tail(&t, &m);
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mutex_lock(&edev->lock);
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if (edev->pdata->prepare)
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edev->pdata->prepare(edev);
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ret = spi_sync(edev->spi, &m);
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/* have to wait at least Tcsl ns */
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ndelay(250);
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if (ret)
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dev_err(&edev->spi->dev, "erase/write %sable error %d\n",
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is_on ? "en" : "dis", ret);
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if (edev->pdata->finish)
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edev->pdata->finish(edev);
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mutex_unlock(&edev->lock);
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return ret;
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}
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static ssize_t
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eeprom_93xx46_write_word(struct eeprom_93xx46_dev *edev,
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const char *buf, unsigned off)
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{
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struct spi_message m;
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struct spi_transfer t[2];
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int bits, data_len, ret;
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u16 cmd_addr;
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cmd_addr = OP_WRITE << edev->addrlen;
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if (edev->addrlen == 7) {
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cmd_addr |= off & 0x7f;
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bits = 10;
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data_len = 1;
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} else {
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cmd_addr |= off & 0x3f;
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bits = 9;
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data_len = 2;
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}
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dev_dbg(&edev->spi->dev, "write cmd 0x%x\n", cmd_addr);
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spi_message_init(&m);
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memset(t, 0, sizeof(t));
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t[0].tx_buf = (char *)&cmd_addr;
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t[0].len = 2;
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t[0].bits_per_word = bits;
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spi_message_add_tail(&t[0], &m);
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t[1].tx_buf = buf;
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t[1].len = data_len;
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t[1].bits_per_word = 8;
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spi_message_add_tail(&t[1], &m);
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ret = spi_sync(edev->spi, &m);
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/* have to wait program cycle time Twc ms */
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mdelay(6);
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return ret;
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}
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static ssize_t
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eeprom_93xx46_bin_write(struct file *filp, struct kobject *kobj,
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struct bin_attribute *bin_attr,
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char *buf, loff_t off, size_t count)
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{
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struct eeprom_93xx46_dev *edev;
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struct device *dev;
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int i, ret, step = 1;
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dev = container_of(kobj, struct device, kobj);
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edev = dev_get_drvdata(dev);
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/* only write even number of bytes on 16-bit devices */
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if (edev->addrlen == 6) {
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step = 2;
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count &= ~1;
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}
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/* erase/write enable */
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ret = eeprom_93xx46_ew(edev, 1);
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if (ret)
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return ret;
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mutex_lock(&edev->lock);
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if (edev->pdata->prepare)
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edev->pdata->prepare(edev);
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for (i = 0; i < count; i += step) {
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ret = eeprom_93xx46_write_word(edev, &buf[i], off + i);
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if (ret) {
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dev_err(&edev->spi->dev, "write failed at %d: %d\n",
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(int)off + i, ret);
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break;
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}
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}
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if (edev->pdata->finish)
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edev->pdata->finish(edev);
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mutex_unlock(&edev->lock);
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/* erase/write disable */
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eeprom_93xx46_ew(edev, 0);
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return ret ? : count;
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}
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static int eeprom_93xx46_eral(struct eeprom_93xx46_dev *edev)
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{
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struct eeprom_93xx46_platform_data *pd = edev->pdata;
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struct spi_message m;
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struct spi_transfer t;
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int bits, ret;
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u16 cmd_addr;
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cmd_addr = OP_START << edev->addrlen;
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if (edev->addrlen == 7) {
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cmd_addr |= ADDR_ERAL << 1;
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bits = 10;
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} else {
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cmd_addr |= ADDR_ERAL;
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bits = 9;
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}
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spi_message_init(&m);
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memset(&t, 0, sizeof(t));
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t.tx_buf = &cmd_addr;
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t.len = 2;
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t.bits_per_word = bits;
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spi_message_add_tail(&t, &m);
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mutex_lock(&edev->lock);
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if (edev->pdata->prepare)
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edev->pdata->prepare(edev);
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ret = spi_sync(edev->spi, &m);
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if (ret)
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dev_err(&edev->spi->dev, "erase error %d\n", ret);
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/* have to wait erase cycle time Tec ms */
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mdelay(6);
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if (pd->finish)
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pd->finish(edev);
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mutex_unlock(&edev->lock);
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return ret;
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}
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static ssize_t eeprom_93xx46_store_erase(struct device *dev,
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struct device_attribute *attr,
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const char *buf, size_t count)
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{
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struct eeprom_93xx46_dev *edev = dev_get_drvdata(dev);
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int erase = 0, ret;
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sscanf(buf, "%d", &erase);
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if (erase) {
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ret = eeprom_93xx46_ew(edev, 1);
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if (ret)
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return ret;
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ret = eeprom_93xx46_eral(edev);
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if (ret)
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return ret;
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ret = eeprom_93xx46_ew(edev, 0);
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if (ret)
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return ret;
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}
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return count;
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}
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static DEVICE_ATTR(erase, S_IWUSR, NULL, eeprom_93xx46_store_erase);
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2012-11-20 02:23:05 +08:00
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static int eeprom_93xx46_probe(struct spi_device *spi)
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2011-07-26 08:13:27 +08:00
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{
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struct eeprom_93xx46_platform_data *pd;
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struct eeprom_93xx46_dev *edev;
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int err;
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pd = spi->dev.platform_data;
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if (!pd) {
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dev_err(&spi->dev, "missing platform data\n");
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return -ENODEV;
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}
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edev = kzalloc(sizeof(*edev), GFP_KERNEL);
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if (!edev)
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return -ENOMEM;
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if (pd->flags & EE_ADDR8)
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edev->addrlen = 7;
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else if (pd->flags & EE_ADDR16)
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edev->addrlen = 6;
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else {
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dev_err(&spi->dev, "unspecified address type\n");
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err = -EINVAL;
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goto fail;
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}
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mutex_init(&edev->lock);
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edev->spi = spi_dev_get(spi);
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edev->pdata = pd;
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sysfs_bin_attr_init(&edev->bin);
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edev->bin.attr.name = "eeprom";
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edev->bin.attr.mode = S_IRUSR;
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edev->bin.read = eeprom_93xx46_bin_read;
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edev->bin.size = 128;
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if (!(pd->flags & EE_READONLY)) {
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edev->bin.write = eeprom_93xx46_bin_write;
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edev->bin.attr.mode |= S_IWUSR;
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}
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err = sysfs_create_bin_file(&spi->dev.kobj, &edev->bin);
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if (err)
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goto fail;
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dev_info(&spi->dev, "%d-bit eeprom %s\n",
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(pd->flags & EE_ADDR8) ? 8 : 16,
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(pd->flags & EE_READONLY) ? "(readonly)" : "");
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if (!(pd->flags & EE_READONLY)) {
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if (device_create_file(&spi->dev, &dev_attr_erase))
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dev_err(&spi->dev, "can't create erase interface\n");
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}
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2013-04-05 09:56:04 +08:00
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spi_set_drvdata(spi, edev);
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2011-07-26 08:13:27 +08:00
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return 0;
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fail:
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kfree(edev);
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return err;
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}
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|
2012-11-20 02:26:02 +08:00
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static int eeprom_93xx46_remove(struct spi_device *spi)
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2011-07-26 08:13:27 +08:00
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{
|
2013-04-05 09:56:04 +08:00
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struct eeprom_93xx46_dev *edev = spi_get_drvdata(spi);
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2011-07-26 08:13:27 +08:00
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if (!(edev->pdata->flags & EE_READONLY))
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device_remove_file(&spi->dev, &dev_attr_erase);
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sysfs_remove_bin_file(&spi->dev.kobj, &edev->bin);
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kfree(edev);
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return 0;
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}
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static struct spi_driver eeprom_93xx46_driver = {
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|
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.driver = {
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.name = "93xx46",
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},
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.probe = eeprom_93xx46_probe,
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2012-11-20 02:21:23 +08:00
|
|
|
.remove = eeprom_93xx46_remove,
|
2011-07-26 08:13:27 +08:00
|
|
|
};
|
|
|
|
|
2012-01-22 15:38:22 +08:00
|
|
|
module_spi_driver(eeprom_93xx46_driver);
|
2011-07-26 08:13:27 +08:00
|
|
|
|
|
|
|
MODULE_LICENSE("GPL");
|
|
|
|
MODULE_DESCRIPTION("Driver for 93xx46 EEPROMs");
|
|
|
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MODULE_AUTHOR("Anatolij Gustschin <agust@denx.de>");
|
|
|
|
MODULE_ALIAS("spi:93xx46");
|