2015-04-10 04:05:16 +08:00
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Common properties
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2017-10-12 18:40:10 +08:00
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=================
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Endianness
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----------
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2015-04-10 04:05:16 +08:00
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2017-06-23 00:15:39 +08:00
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The Devicetree Specification does not define any properties related to hardware
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2019-05-15 04:40:51 +08:00
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byte swapping, but endianness issues show up frequently in porting drivers to
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2015-04-10 04:05:16 +08:00
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different machine types. This document attempts to provide a consistent
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2019-05-15 04:40:51 +08:00
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way of handling byte swapping across drivers.
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2015-04-10 04:05:16 +08:00
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Optional properties:
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- big-endian: Boolean; force big endian register accesses
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unconditionally (e.g. ioread32be/iowrite32be). Use this if you
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2019-05-15 04:40:51 +08:00
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know the peripheral always needs to be accessed in big endian (BE) mode.
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2015-04-10 04:05:16 +08:00
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- little-endian: Boolean; force little endian register accesses
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unconditionally (e.g. readl/writel). Use this if you know the
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2019-05-15 04:40:51 +08:00
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peripheral always needs to be accessed in little endian (LE) mode.
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2015-04-10 04:05:16 +08:00
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- native-endian: Boolean; always use register accesses matched to the
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endianness of the kernel binary (e.g. LE vmlinux -> readl/writel,
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2019-05-15 04:40:51 +08:00
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BE vmlinux -> ioread32be/iowrite32be). In this case no byte swaps
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2015-04-10 04:05:16 +08:00
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will ever be performed. Use this if the hardware "self-adjusts"
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register endianness based on the CPU's configured endianness.
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If a binding supports these properties, then the binding should also
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specify the default behavior if none of these properties are present.
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In such cases, little-endian is the preferred default, but it is not
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2019-05-15 04:40:51 +08:00
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a requirement. Some implementations assume that little-endian is
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the default, because most existing (PCI-based) drivers implicitly
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default to LE for their MMIO accesses.
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2015-04-10 04:05:16 +08:00
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Examples:
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Scenario 1 : CPU in LE mode & device in LE mode.
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dev: dev@40031000 {
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compatible = "name";
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reg = <0x40031000 0x1000>;
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...
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native-endian;
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};
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Scenario 2 : CPU in LE mode & device in BE mode.
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dev: dev@40031000 {
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compatible = "name";
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reg = <0x40031000 0x1000>;
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...
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big-endian;
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};
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Scenario 3 : CPU in BE mode & device in BE mode.
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dev: dev@40031000 {
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compatible = "name";
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reg = <0x40031000 0x1000>;
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...
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native-endian;
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};
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Scenario 4 : CPU in BE mode & device in LE mode.
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dev: dev@40031000 {
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compatible = "name";
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reg = <0x40031000 0x1000>;
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...
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little-endian;
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};
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2017-10-12 18:40:10 +08:00
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Daisy-chained devices
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---------------------
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Many serially-attached GPIO and IIO devices are daisy-chainable. To the
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host controller, a daisy-chain appears as a single device, but the number
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of inputs and outputs it provides is the sum of inputs and outputs provided
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by all of its devices. The driver needs to know how many devices the
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daisy-chain comprises to determine the amount of data exchanged, how many
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inputs and outputs to register and so on.
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Optional properties:
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- #daisy-chained-devices: Number of devices in the daisy-chain (default is 1).
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Example:
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gpio@0 {
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compatible = "name";
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reg = <0>;
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gpio-controller;
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#gpio-cells = <2>;
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#daisy-chained-devices = <3>;
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};
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