drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-27 00:44:06 +08:00
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/*
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* Copyright (C) 2013 Red Hat
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* Author: Rob Clark <robdclark@gmail.com>
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License version 2 as published by
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* the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License along with
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* this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include "mdp4_kms.h"
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2014-12-08 23:48:59 +08:00
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#define DOWN_SCALE_MAX 8
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#define UP_SCALE_MAX 8
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drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-27 00:44:06 +08:00
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struct mdp4_plane {
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struct drm_plane base;
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const char *name;
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2013-10-08 00:42:27 +08:00
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enum mdp4_pipe pipe;
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drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-27 00:44:06 +08:00
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2015-07-09 06:12:40 +08:00
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uint32_t caps;
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drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-27 00:44:06 +08:00
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uint32_t nformats;
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uint32_t formats[32];
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bool enabled;
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};
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#define to_mdp4_plane(x) container_of(x, struct mdp4_plane, base)
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2015-01-30 22:48:11 +08:00
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/* MDP format helper functions */
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static inline
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enum mdp4_frame_format mdp4_get_frame_format(struct drm_framebuffer *fb)
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{
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bool is_tile = false;
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2016-11-16 19:33:16 +08:00
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if (fb->modifier == DRM_FORMAT_MOD_SAMSUNG_64_32_TILE)
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2015-01-30 22:48:11 +08:00
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is_tile = true;
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if (fb->pixel_format == DRM_FORMAT_NV12 && is_tile)
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return FRAME_TILE_YCBCR_420;
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return FRAME_LINEAR;
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}
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2014-11-09 02:24:08 +08:00
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static void mdp4_plane_set_scanout(struct drm_plane *plane,
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struct drm_framebuffer *fb);
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static int mdp4_plane_mode_set(struct drm_plane *plane,
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drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-27 00:44:06 +08:00
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struct drm_crtc *crtc, struct drm_framebuffer *fb,
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int crtc_x, int crtc_y,
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unsigned int crtc_w, unsigned int crtc_h,
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uint32_t src_x, uint32_t src_y,
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2014-11-09 02:24:08 +08:00
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uint32_t src_w, uint32_t src_h);
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drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-27 00:44:06 +08:00
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2014-11-09 02:24:08 +08:00
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static struct mdp4_kms *get_kms(struct drm_plane *plane)
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drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-27 00:44:06 +08:00
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{
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2014-11-09 02:24:08 +08:00
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struct msm_drm_private *priv = plane->dev->dev_private;
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return to_mdp4_kms(to_mdp_kms(priv->kms));
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drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-27 00:44:06 +08:00
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}
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static void mdp4_plane_destroy(struct drm_plane *plane)
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{
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struct mdp4_plane *mdp4_plane = to_mdp4_plane(plane);
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2014-11-09 02:24:08 +08:00
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drm_plane_helper_disable(plane);
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drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-27 00:44:06 +08:00
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drm_plane_cleanup(plane);
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kfree(mdp4_plane);
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}
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/* helper to install properties which are common to planes and crtcs */
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2015-07-28 23:05:03 +08:00
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static void mdp4_plane_install_properties(struct drm_plane *plane,
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drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-27 00:44:06 +08:00
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struct drm_mode_object *obj)
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{
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// XXX
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}
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2016-09-07 18:58:44 +08:00
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static int mdp4_plane_set_property(struct drm_plane *plane,
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drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-27 00:44:06 +08:00
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struct drm_property *property, uint64_t val)
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{
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// XXX
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return -EINVAL;
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}
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static const struct drm_plane_funcs mdp4_plane_funcs = {
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2014-11-09 02:24:08 +08:00
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.update_plane = drm_atomic_helper_update_plane,
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.disable_plane = drm_atomic_helper_disable_plane,
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drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-27 00:44:06 +08:00
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.destroy = mdp4_plane_destroy,
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.set_property = mdp4_plane_set_property,
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2014-11-09 02:24:08 +08:00
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.reset = drm_atomic_helper_plane_reset,
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.atomic_duplicate_state = drm_atomic_helper_plane_duplicate_state,
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.atomic_destroy_state = drm_atomic_helper_plane_destroy_state,
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drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-27 00:44:06 +08:00
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};
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2014-11-09 02:24:08 +08:00
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static int mdp4_plane_prepare_fb(struct drm_plane *plane,
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2016-08-19 02:00:16 +08:00
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struct drm_plane_state *new_state)
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2014-11-09 02:24:08 +08:00
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{
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struct mdp4_plane *mdp4_plane = to_mdp4_plane(plane);
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struct mdp4_kms *mdp4_kms = get_kms(plane);
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2015-09-02 16:42:40 +08:00
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struct drm_framebuffer *fb = new_state->fb;
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if (!fb)
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return 0;
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2014-11-09 02:24:08 +08:00
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DBG("%s: prepare: FB[%u]", mdp4_plane->name, fb->base.id);
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return msm_framebuffer_prepare(fb, mdp4_kms->id);
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}
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static void mdp4_plane_cleanup_fb(struct drm_plane *plane,
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2016-08-19 02:00:16 +08:00
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struct drm_plane_state *old_state)
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2014-11-09 02:24:08 +08:00
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{
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struct mdp4_plane *mdp4_plane = to_mdp4_plane(plane);
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struct mdp4_kms *mdp4_kms = get_kms(plane);
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2015-09-02 16:42:40 +08:00
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struct drm_framebuffer *fb = old_state->fb;
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if (!fb)
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return;
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2014-11-09 02:24:08 +08:00
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DBG("%s: cleanup: FB[%u]", mdp4_plane->name, fb->base.id);
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msm_framebuffer_cleanup(fb, mdp4_kms->id);
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}
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static int mdp4_plane_atomic_check(struct drm_plane *plane,
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struct drm_plane_state *state)
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{
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return 0;
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}
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2014-11-25 19:09:44 +08:00
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static void mdp4_plane_atomic_update(struct drm_plane *plane,
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struct drm_plane_state *old_state)
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2014-11-09 02:24:08 +08:00
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{
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struct drm_plane_state *state = plane->state;
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int ret;
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ret = mdp4_plane_mode_set(plane,
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state->crtc, state->fb,
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state->crtc_x, state->crtc_y,
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state->crtc_w, state->crtc_h,
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state->src_x, state->src_y,
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state->src_w, state->src_h);
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/* atomic_check should have ensured that this doesn't fail */
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WARN_ON(ret < 0);
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}
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static const struct drm_plane_helper_funcs mdp4_plane_helper_funcs = {
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.prepare_fb = mdp4_plane_prepare_fb,
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.cleanup_fb = mdp4_plane_cleanup_fb,
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|
|
.atomic_check = mdp4_plane_atomic_check,
|
|
|
|
.atomic_update = mdp4_plane_atomic_update,
|
|
|
|
};
|
|
|
|
|
|
|
|
static void mdp4_plane_set_scanout(struct drm_plane *plane,
|
drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-27 00:44:06 +08:00
|
|
|
struct drm_framebuffer *fb)
|
|
|
|
{
|
|
|
|
struct mdp4_plane *mdp4_plane = to_mdp4_plane(plane);
|
|
|
|
struct mdp4_kms *mdp4_kms = get_kms(plane);
|
2013-10-08 00:42:27 +08:00
|
|
|
enum mdp4_pipe pipe = mdp4_plane->pipe;
|
drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-27 00:44:06 +08:00
|
|
|
|
|
|
|
mdp4_write(mdp4_kms, REG_MDP4_PIPE_SRC_STRIDE_A(pipe),
|
|
|
|
MDP4_PIPE_SRC_STRIDE_A_P0(fb->pitches[0]) |
|
|
|
|
MDP4_PIPE_SRC_STRIDE_A_P1(fb->pitches[1]));
|
|
|
|
|
|
|
|
mdp4_write(mdp4_kms, REG_MDP4_PIPE_SRC_STRIDE_B(pipe),
|
|
|
|
MDP4_PIPE_SRC_STRIDE_B_P2(fb->pitches[2]) |
|
|
|
|
MDP4_PIPE_SRC_STRIDE_B_P3(fb->pitches[3]));
|
|
|
|
|
2014-12-08 23:48:59 +08:00
|
|
|
mdp4_write(mdp4_kms, REG_MDP4_PIPE_SRCP0_BASE(pipe),
|
|
|
|
msm_framebuffer_iova(fb, mdp4_kms->id, 0));
|
|
|
|
mdp4_write(mdp4_kms, REG_MDP4_PIPE_SRCP1_BASE(pipe),
|
|
|
|
msm_framebuffer_iova(fb, mdp4_kms->id, 1));
|
|
|
|
mdp4_write(mdp4_kms, REG_MDP4_PIPE_SRCP2_BASE(pipe),
|
|
|
|
msm_framebuffer_iova(fb, mdp4_kms->id, 2));
|
|
|
|
mdp4_write(mdp4_kms, REG_MDP4_PIPE_SRCP3_BASE(pipe),
|
|
|
|
msm_framebuffer_iova(fb, mdp4_kms->id, 3));
|
drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-27 00:44:06 +08:00
|
|
|
|
|
|
|
plane->fb = fb;
|
|
|
|
}
|
|
|
|
|
2014-12-08 23:48:59 +08:00
|
|
|
static void mdp4_write_csc_config(struct mdp4_kms *mdp4_kms,
|
|
|
|
enum mdp4_pipe pipe, struct csc_cfg *csc)
|
|
|
|
{
|
|
|
|
int i;
|
|
|
|
|
|
|
|
for (i = 0; i < ARRAY_SIZE(csc->matrix); i++) {
|
|
|
|
mdp4_write(mdp4_kms, REG_MDP4_PIPE_CSC_MV(pipe, i),
|
|
|
|
csc->matrix[i]);
|
|
|
|
}
|
|
|
|
|
|
|
|
for (i = 0; i < ARRAY_SIZE(csc->post_bias) ; i++) {
|
|
|
|
mdp4_write(mdp4_kms, REG_MDP4_PIPE_CSC_PRE_BV(pipe, i),
|
|
|
|
csc->pre_bias[i]);
|
|
|
|
|
|
|
|
mdp4_write(mdp4_kms, REG_MDP4_PIPE_CSC_POST_BV(pipe, i),
|
|
|
|
csc->post_bias[i]);
|
|
|
|
}
|
|
|
|
|
|
|
|
for (i = 0; i < ARRAY_SIZE(csc->post_clamp) ; i++) {
|
|
|
|
mdp4_write(mdp4_kms, REG_MDP4_PIPE_CSC_PRE_LV(pipe, i),
|
|
|
|
csc->pre_clamp[i]);
|
|
|
|
|
|
|
|
mdp4_write(mdp4_kms, REG_MDP4_PIPE_CSC_POST_LV(pipe, i),
|
|
|
|
csc->post_clamp[i]);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-27 00:44:06 +08:00
|
|
|
#define MDP4_VG_PHASE_STEP_DEFAULT 0x20000000
|
|
|
|
|
2014-11-09 02:24:08 +08:00
|
|
|
static int mdp4_plane_mode_set(struct drm_plane *plane,
|
drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-27 00:44:06 +08:00
|
|
|
struct drm_crtc *crtc, struct drm_framebuffer *fb,
|
|
|
|
int crtc_x, int crtc_y,
|
|
|
|
unsigned int crtc_w, unsigned int crtc_h,
|
|
|
|
uint32_t src_x, uint32_t src_y,
|
|
|
|
uint32_t src_w, uint32_t src_h)
|
|
|
|
{
|
2014-12-08 23:48:59 +08:00
|
|
|
struct drm_device *dev = plane->dev;
|
drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-27 00:44:06 +08:00
|
|
|
struct mdp4_plane *mdp4_plane = to_mdp4_plane(plane);
|
|
|
|
struct mdp4_kms *mdp4_kms = get_kms(plane);
|
2013-10-08 00:42:27 +08:00
|
|
|
enum mdp4_pipe pipe = mdp4_plane->pipe;
|
2013-12-01 03:58:23 +08:00
|
|
|
const struct mdp_format *format;
|
drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-27 00:44:06 +08:00
|
|
|
uint32_t op_mode = 0;
|
|
|
|
uint32_t phasex_step = MDP4_VG_PHASE_STEP_DEFAULT;
|
|
|
|
uint32_t phasey_step = MDP4_VG_PHASE_STEP_DEFAULT;
|
2015-06-26 18:19:43 +08:00
|
|
|
enum mdp4_frame_format frame_type;
|
drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-27 00:44:06 +08:00
|
|
|
|
2014-11-09 02:24:08 +08:00
|
|
|
if (!(crtc && fb)) {
|
|
|
|
DBG("%s: disabled!", mdp4_plane->name);
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2015-06-26 18:19:43 +08:00
|
|
|
frame_type = mdp4_get_frame_format(fb);
|
|
|
|
|
drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-27 00:44:06 +08:00
|
|
|
/* src values are in Q16 fixed point, convert to integer: */
|
|
|
|
src_x = src_x >> 16;
|
|
|
|
src_y = src_y >> 16;
|
|
|
|
src_w = src_w >> 16;
|
|
|
|
src_h = src_h >> 16;
|
|
|
|
|
2013-10-09 00:57:48 +08:00
|
|
|
DBG("%s: FB[%u] %u,%u,%u,%u -> CRTC[%u] %d,%d,%u,%u", mdp4_plane->name,
|
|
|
|
fb->base.id, src_x, src_y, src_w, src_h,
|
|
|
|
crtc->base.id, crtc_x, crtc_y, crtc_w, crtc_h);
|
|
|
|
|
2014-12-08 23:48:59 +08:00
|
|
|
format = to_mdp_format(msm_framebuffer_format(fb));
|
|
|
|
|
|
|
|
if (src_w > (crtc_w * DOWN_SCALE_MAX)) {
|
|
|
|
dev_err(dev->dev, "Width down scaling exceeds limits!\n");
|
|
|
|
return -ERANGE;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (src_h > (crtc_h * DOWN_SCALE_MAX)) {
|
|
|
|
dev_err(dev->dev, "Height down scaling exceeds limits!\n");
|
|
|
|
return -ERANGE;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (crtc_w > (src_w * UP_SCALE_MAX)) {
|
|
|
|
dev_err(dev->dev, "Width up scaling exceeds limits!\n");
|
|
|
|
return -ERANGE;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (crtc_h > (src_h * UP_SCALE_MAX)) {
|
|
|
|
dev_err(dev->dev, "Height up scaling exceeds limits!\n");
|
|
|
|
return -ERANGE;
|
|
|
|
}
|
|
|
|
|
drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-27 00:44:06 +08:00
|
|
|
if (src_w != crtc_w) {
|
2014-12-08 23:48:59 +08:00
|
|
|
uint32_t sel_unit = SCALE_FIR;
|
drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-27 00:44:06 +08:00
|
|
|
op_mode |= MDP4_PIPE_OP_MODE_SCALEX_EN;
|
2014-12-08 23:48:59 +08:00
|
|
|
|
|
|
|
if (MDP_FORMAT_IS_YUV(format)) {
|
|
|
|
if (crtc_w > src_w)
|
|
|
|
sel_unit = SCALE_PIXEL_RPT;
|
|
|
|
else if (crtc_w <= (src_w / 4))
|
|
|
|
sel_unit = SCALE_MN_PHASE;
|
|
|
|
|
|
|
|
op_mode |= MDP4_PIPE_OP_MODE_SCALEX_UNIT_SEL(sel_unit);
|
|
|
|
phasex_step = mult_frac(MDP4_VG_PHASE_STEP_DEFAULT,
|
|
|
|
src_w, crtc_w);
|
|
|
|
}
|
drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-27 00:44:06 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
if (src_h != crtc_h) {
|
2014-12-08 23:48:59 +08:00
|
|
|
uint32_t sel_unit = SCALE_FIR;
|
drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-27 00:44:06 +08:00
|
|
|
op_mode |= MDP4_PIPE_OP_MODE_SCALEY_EN;
|
2014-12-08 23:48:59 +08:00
|
|
|
|
|
|
|
if (MDP_FORMAT_IS_YUV(format)) {
|
|
|
|
|
|
|
|
if (crtc_h > src_h)
|
|
|
|
sel_unit = SCALE_PIXEL_RPT;
|
|
|
|
else if (crtc_h <= (src_h / 4))
|
|
|
|
sel_unit = SCALE_MN_PHASE;
|
|
|
|
|
|
|
|
op_mode |= MDP4_PIPE_OP_MODE_SCALEY_UNIT_SEL(sel_unit);
|
|
|
|
phasey_step = mult_frac(MDP4_VG_PHASE_STEP_DEFAULT,
|
|
|
|
src_h, crtc_h);
|
|
|
|
}
|
drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-27 00:44:06 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
mdp4_write(mdp4_kms, REG_MDP4_PIPE_SRC_SIZE(pipe),
|
|
|
|
MDP4_PIPE_SRC_SIZE_WIDTH(src_w) |
|
|
|
|
MDP4_PIPE_SRC_SIZE_HEIGHT(src_h));
|
|
|
|
|
|
|
|
mdp4_write(mdp4_kms, REG_MDP4_PIPE_SRC_XY(pipe),
|
|
|
|
MDP4_PIPE_SRC_XY_X(src_x) |
|
|
|
|
MDP4_PIPE_SRC_XY_Y(src_y));
|
|
|
|
|
|
|
|
mdp4_write(mdp4_kms, REG_MDP4_PIPE_DST_SIZE(pipe),
|
|
|
|
MDP4_PIPE_DST_SIZE_WIDTH(crtc_w) |
|
|
|
|
MDP4_PIPE_DST_SIZE_HEIGHT(crtc_h));
|
|
|
|
|
|
|
|
mdp4_write(mdp4_kms, REG_MDP4_PIPE_DST_XY(pipe),
|
2013-12-13 22:11:01 +08:00
|
|
|
MDP4_PIPE_DST_XY_X(crtc_x) |
|
|
|
|
MDP4_PIPE_DST_XY_Y(crtc_y));
|
drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-27 00:44:06 +08:00
|
|
|
|
|
|
|
mdp4_plane_set_scanout(plane, fb);
|
|
|
|
|
|
|
|
mdp4_write(mdp4_kms, REG_MDP4_PIPE_SRC_FORMAT(pipe),
|
|
|
|
MDP4_PIPE_SRC_FORMAT_A_BPC(format->bpc_a) |
|
|
|
|
MDP4_PIPE_SRC_FORMAT_R_BPC(format->bpc_r) |
|
|
|
|
MDP4_PIPE_SRC_FORMAT_G_BPC(format->bpc_g) |
|
|
|
|
MDP4_PIPE_SRC_FORMAT_B_BPC(format->bpc_b) |
|
|
|
|
COND(format->alpha_enable, MDP4_PIPE_SRC_FORMAT_ALPHA_ENABLE) |
|
|
|
|
MDP4_PIPE_SRC_FORMAT_CPP(format->cpp - 1) |
|
|
|
|
MDP4_PIPE_SRC_FORMAT_UNPACK_COUNT(format->unpack_count - 1) |
|
2014-12-08 23:48:59 +08:00
|
|
|
MDP4_PIPE_SRC_FORMAT_FETCH_PLANES(format->fetch_type) |
|
|
|
|
MDP4_PIPE_SRC_FORMAT_CHROMA_SAMP(format->chroma_sample) |
|
2015-01-30 22:48:11 +08:00
|
|
|
MDP4_PIPE_SRC_FORMAT_FRAME_FORMAT(frame_type) |
|
drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-27 00:44:06 +08:00
|
|
|
COND(format->unpack_tight, MDP4_PIPE_SRC_FORMAT_UNPACK_TIGHT));
|
|
|
|
|
|
|
|
mdp4_write(mdp4_kms, REG_MDP4_PIPE_SRC_UNPACK(pipe),
|
|
|
|
MDP4_PIPE_SRC_UNPACK_ELEM0(format->unpack[0]) |
|
|
|
|
MDP4_PIPE_SRC_UNPACK_ELEM1(format->unpack[1]) |
|
|
|
|
MDP4_PIPE_SRC_UNPACK_ELEM2(format->unpack[2]) |
|
|
|
|
MDP4_PIPE_SRC_UNPACK_ELEM3(format->unpack[3]));
|
|
|
|
|
2014-12-08 23:48:59 +08:00
|
|
|
if (MDP_FORMAT_IS_YUV(format)) {
|
|
|
|
struct csc_cfg *csc = mdp_get_default_csc_cfg(CSC_YUV2RGB);
|
|
|
|
|
|
|
|
op_mode |= MDP4_PIPE_OP_MODE_SRC_YCBCR;
|
|
|
|
op_mode |= MDP4_PIPE_OP_MODE_CSC_EN;
|
|
|
|
mdp4_write_csc_config(mdp4_kms, pipe, csc);
|
|
|
|
}
|
|
|
|
|
drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-27 00:44:06 +08:00
|
|
|
mdp4_write(mdp4_kms, REG_MDP4_PIPE_OP_MODE(pipe), op_mode);
|
|
|
|
mdp4_write(mdp4_kms, REG_MDP4_PIPE_PHASEX_STEP(pipe), phasex_step);
|
|
|
|
mdp4_write(mdp4_kms, REG_MDP4_PIPE_PHASEY_STEP(pipe), phasey_step);
|
|
|
|
|
2015-01-30 22:48:11 +08:00
|
|
|
if (frame_type != FRAME_LINEAR)
|
|
|
|
mdp4_write(mdp4_kms, REG_MDP4_PIPE_SSTILE_FRAME_SIZE(pipe),
|
|
|
|
MDP4_PIPE_SSTILE_FRAME_SIZE_WIDTH(src_w) |
|
|
|
|
MDP4_PIPE_SSTILE_FRAME_SIZE_HEIGHT(src_h));
|
|
|
|
|
drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-27 00:44:06 +08:00
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static const char *pipe_names[] = {
|
|
|
|
"VG1", "VG2",
|
|
|
|
"RGB1", "RGB2", "RGB3",
|
|
|
|
"VG3", "VG4",
|
|
|
|
};
|
|
|
|
|
2013-10-08 00:42:27 +08:00
|
|
|
enum mdp4_pipe mdp4_plane_pipe(struct drm_plane *plane)
|
drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-27 00:44:06 +08:00
|
|
|
{
|
|
|
|
struct mdp4_plane *mdp4_plane = to_mdp4_plane(plane);
|
|
|
|
return mdp4_plane->pipe;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* initialize plane */
|
|
|
|
struct drm_plane *mdp4_plane_init(struct drm_device *dev,
|
2013-10-08 00:42:27 +08:00
|
|
|
enum mdp4_pipe pipe_id, bool private_plane)
|
drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-27 00:44:06 +08:00
|
|
|
{
|
|
|
|
struct drm_plane *plane = NULL;
|
|
|
|
struct mdp4_plane *mdp4_plane;
|
|
|
|
int ret;
|
2014-04-02 06:22:39 +08:00
|
|
|
enum drm_plane_type type;
|
drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-27 00:44:06 +08:00
|
|
|
|
|
|
|
mdp4_plane = kzalloc(sizeof(*mdp4_plane), GFP_KERNEL);
|
|
|
|
if (!mdp4_plane) {
|
|
|
|
ret = -ENOMEM;
|
|
|
|
goto fail;
|
|
|
|
}
|
|
|
|
|
|
|
|
plane = &mdp4_plane->base;
|
|
|
|
|
|
|
|
mdp4_plane->pipe = pipe_id;
|
|
|
|
mdp4_plane->name = pipe_names[pipe_id];
|
2015-07-09 06:12:40 +08:00
|
|
|
mdp4_plane->caps = mdp4_pipe_caps(pipe_id);
|
drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-27 00:44:06 +08:00
|
|
|
|
2015-07-09 06:12:40 +08:00
|
|
|
mdp4_plane->nformats = mdp_get_formats(mdp4_plane->formats,
|
|
|
|
ARRAY_SIZE(mdp4_plane->formats),
|
|
|
|
!pipe_supports_yuv(mdp4_plane->caps));
|
2013-10-09 00:57:48 +08:00
|
|
|
|
2014-04-02 06:22:39 +08:00
|
|
|
type = private_plane ? DRM_PLANE_TYPE_PRIMARY : DRM_PLANE_TYPE_OVERLAY;
|
2014-11-09 02:24:08 +08:00
|
|
|
ret = drm_universal_plane_init(dev, plane, 0xff, &mdp4_plane_funcs,
|
drm: Pass 'name' to drm_universal_plane_init()
Done with coccinelle for the most part. It choked on
msm/mdp/mdp5/mdp5_plane.c like so:
"BAD:!!!!! enum drm_plane_type type;"
No idea how to deal with that, so I just fixed that up
by hand.
Also it thinks '...' is part of the semantic patch, so I put an
'int DOTDOTDOT' placeholder in its place and got rid of it with
sed afterwards.
I didn't convert drm_plane_init() since passing the varargs through
would mean either cpp macros or va_list, and I figured we don't
care about these legacy functions enough to warrant the extra pain.
@@
typedef uint32_t;
identifier dev, plane, possible_crtcs, funcs, formats, format_count, type;
@@
int drm_universal_plane_init(struct drm_device *dev,
struct drm_plane *plane,
unsigned long possible_crtcs,
const struct drm_plane_funcs *funcs,
const uint32_t *formats,
unsigned int format_count,
enum drm_plane_type type
+ ,const char *name, int DOTDOTDOT
)
{ ... }
@@
identifier dev, plane, possible_crtcs, funcs, formats, format_count, type;
@@
int drm_universal_plane_init(struct drm_device *dev,
struct drm_plane *plane,
unsigned long possible_crtcs,
const struct drm_plane_funcs *funcs,
const uint32_t *formats,
unsigned int format_count,
enum drm_plane_type type
+ ,const char *name, int DOTDOTDOT
);
@@
expression E1, E2, E3, E4, E5, E6, E7;
@@
drm_universal_plane_init(E1, E2, E3, E4, E5, E6, E7
+ ,NULL
)
v2: Split crtc and plane changes apart
Pass NUL for no-name instead of ""
Leave drm_plane_init() alone
v3: Add ', or NULL...' to @name kernel doc (Jani)
Annotate the function with __printf() attribute (Jani)
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Link: http://patchwork.freedesktop.org/patch/msgid/1449670795-2853-1-git-send-email-ville.syrjala@linux.intel.com
2015-12-09 22:19:55 +08:00
|
|
|
mdp4_plane->formats, mdp4_plane->nformats,
|
|
|
|
type, NULL);
|
2014-11-09 02:24:08 +08:00
|
|
|
if (ret)
|
|
|
|
goto fail;
|
|
|
|
|
|
|
|
drm_plane_helper_add(plane, &mdp4_plane_helper_funcs);
|
drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-27 00:44:06 +08:00
|
|
|
|
|
|
|
mdp4_plane_install_properties(plane, &plane->base);
|
|
|
|
|
|
|
|
return plane;
|
|
|
|
|
|
|
|
fail:
|
|
|
|
if (plane)
|
|
|
|
mdp4_plane_destroy(plane);
|
|
|
|
|
|
|
|
return ERR_PTR(ret);
|
|
|
|
}
|