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linux_old1/arch/blackfin/mach-bf548/Kconfig

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Blackfin: push BF5Xx configs down into mach-specific Kconfigs While we're moving the BF54x code, have the BF54xM variants select the normal BF54x values so that the rest of the Kconfig tree doesn't need to check the BF54xM variant everytime it wants to check the BF54x. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2009-11-17 07:49:41 +08:00
config BF542
def_bool y
depends on BF542_std || BF542M
config BF544
def_bool y
depends on BF544_std || BF544M
config BF547
def_bool y
depends on BF547_std || BF547M
config BF548
def_bool y
depends on BF548_std || BF548M
config BF549
def_bool y
depends on BF549_std || BF549M
config BF54xM
def_bool y
depends on (BF542M || BF544M || BF547M || BF548M || BF549M)
config BF54x
def_bool y
depends on (BF542 || BF544 || BF547 || BF548 || BF549)
Blackfin arch: initial supporting for BF548-EZKIT The ADSP-BF54x was specifically designed to meet the needs of convergent multimedia applications where system performance and cost are essential ingredients. The integration of multimedia, human interface, and connectivity peripherals combined with increased system bandwidth and on-chip memory provides customers a platform to design the most demanding applications. Since now, ADSP-BF54x will be supported in the Linux kernel and bunch of related drivers such as USB OTG, ATAPI, NAND flash controller, LCD framebuffer, sound, touch screen will be submitted later. Please enjoy the show. Signed-off-by: Roy Huang <roy.huang@analog.com> Signed-off-by: Bryan Wu <bryan.wu@analog.com>
2007-07-12 22:41:45 +08:00
if (BF54x)
Blackfin arch: split board selection off into mach subdirs Signed-off-by: Mike Frysinger <michael.frysinger@analog.com> Signed-off-by: Bryan Wu <bryan.wu@analog.com>
2007-11-15 20:49:44 +08:00
source "arch/blackfin/mach-bf548/boards/Kconfig"
Blackfin arch: initial supporting for BF548-EZKIT The ADSP-BF54x was specifically designed to meet the needs of convergent multimedia applications where system performance and cost are essential ingredients. The integration of multimedia, human interface, and connectivity peripherals combined with increased system bandwidth and on-chip memory provides customers a platform to design the most demanding applications. Since now, ADSP-BF54x will be supported in the Linux kernel and bunch of related drivers such as USB OTG, ATAPI, NAND flash controller, LCD framebuffer, sound, touch screen will be submitted later. Please enjoy the show. Signed-off-by: Roy Huang <roy.huang@analog.com> Signed-off-by: Bryan Wu <bryan.wu@analog.com>
2007-07-12 22:41:45 +08:00
menu "BF548 Specific Configuration"
Blackfin arch: Add option to priorize DMA over Core Signed-off-by: Michael Hennerich <michael.hennerich@analog.com> Signed-off-by: Bryan Wu <bryan.wu@analog.com>
2007-08-03 17:43:29 +08:00
config DEB_DMA_URGENT
bool "DMA has priority over core for ext. accesses"
depends on BF54x
[Blackfin] arch: set default value of DEB_DMA_URGENT to YES to avoid DMA aborting caused by conflict between core and DMA Signed-off-by: Cliff Cai <cliff.cai@analog.com> Signed-off-by: Bryan Wu <bryan.wu@analog.com>
2007-12-24 12:33:20 +08:00
default y
Blackfin arch: Add option to priorize DMA over Core Signed-off-by: Michael Hennerich <michael.hennerich@analog.com> Signed-off-by: Bryan Wu <bryan.wu@analog.com>
2007-08-03 17:43:29 +08:00
help
Treat any DEB1, DEB2 and DEB3 request as Urgent
Blackfin: Allow bf548 ATAPI to be routed to GPIO By default, it is routed to async memory address. In GPIO case, GPIO peripheral PINs should be requested in advance. Signed-off-by: Sonic Zhang <sonic.zhang@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org> Signed-off-by: Bryan Wu <cooloney@kernel.org>
2009-03-30 17:07:26 +08:00
config BF548_ATAPI_ALTERNATIVE_PORT
bool "BF548 ATAPI alternative port via GPIO"
help
BF548 ATAPI data and address PINs can be routed through
async address or GPIO port F and G. Select y to route it
to GPIO.
Blackfin: bf54x: add kconfig for UART2/3 DMA channel assignments The BF54x lacks dedicated DMA channels for the UART peripherals and need to be muxed between others. So add a kconfig option so people can select which channels the UARTs will use so they can pick between SPORTs and the less commonly used EPPI/PIXC peripherals. Signed-off-by: steven miao <realmz6@gmail.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-10-22 16:48:41 +08:00
choice
prompt "UART2 DMA channel selection"
depends on SERIAL_BFIN_UART2
default UART2_DMA_RX_ON_DMA18
help
UART2 DMA channel selection
RX -> DMA18
TX -> DMA19
or
RX -> DMA13
TX -> DMA14
config UART2_DMA_RX_ON_DMA18
bool "UART2 DMA RX -> DMA18 TX -> DMA19"
help
UART2 DMA channel assignment
RX -> DMA18
TX -> DMA19
use SPORT2 default DMA channel
config UART2_DMA_RX_ON_DMA13
bool "UART2 DMA RX -> DMA13 TX -> DMA14"
help
UART2 DMA channel assignment
RX -> DMA13
TX -> DMA14
use EPPI1 EPPI2 default DMA channel
endchoice
choice
prompt "UART3 DMA channel selection"
depends on SERIAL_BFIN_UART3
default UART3_DMA_RX_ON_DMA20
help
UART3 DMA channel selection
RX -> DMA20
TX -> DMA21
or
RX -> DMA15
TX -> DMA16
config UART3_DMA_RX_ON_DMA20
bool "UART3 DMA RX -> DMA20 TX -> DMA21"
help
UART3 DMA channel assignment
RX -> DMA20
TX -> DMA21
use SPORT3 default DMA channel
config UART3_DMA_RX_ON_DMA15
bool "UART3 DMA RX -> DMA15 TX -> DMA16"
help
UART3 DMA channel assignment
RX -> DMA15
TX -> DMA16
use PIXC default DMA channel
endchoice
Blackfin arch: initial supporting for BF548-EZKIT The ADSP-BF54x was specifically designed to meet the needs of convergent multimedia applications where system performance and cost are essential ingredients. The integration of multimedia, human interface, and connectivity peripherals combined with increased system bandwidth and on-chip memory provides customers a platform to design the most demanding applications. Since now, ADSP-BF54x will be supported in the Linux kernel and bunch of related drivers such as USB OTG, ATAPI, NAND flash controller, LCD framebuffer, sound, touch screen will be submitted later. Please enjoy the show. Signed-off-by: Roy Huang <roy.huang@analog.com> Signed-off-by: Bryan Wu <bryan.wu@analog.com>
2007-07-12 22:41:45 +08:00
comment "Interrupt Priority Assignment"
menu "Priority"
config IRQ_PLL_WAKEUP
int "IRQ_PLL_WAKEUP"
default 7
config IRQ_DMAC0_ERR
int "IRQ_DMAC0_ERR"
default 7
config IRQ_EPPI0_ERR
int "IRQ_EPPI0_ERR"
default 7
config IRQ_SPORT0_ERR
int "IRQ_SPORT0_ERR"
default 7
config IRQ_SPORT1_ERR
int "IRQ_SPORT1_ERR"
default 7
config IRQ_SPI0_ERR
int "IRQ_SPI0_ERR"
default 7
config IRQ_UART0_ERR
int "IRQ_UART0_ERR"
default 7
config IRQ_RTC
int "IRQ_RTC"
default 8
config IRQ_EPPI0
int "IRQ_EPPI0"
default 8
config IRQ_SPORT0_RX
int "IRQ_SPORT0_RX"
default 9
config IRQ_SPORT0_TX
int "IRQ_SPORT0_TX"
default 9
config IRQ_SPORT1_RX
int "IRQ_SPORT1_RX"
default 9
config IRQ_SPORT1_TX
int "IRQ_SPORT1_TX"
default 9
config IRQ_SPI0
int "IRQ_SPI0"
default 10
config IRQ_UART0_RX
int "IRQ_UART0_RX"
default 10
config IRQ_UART0_TX
int "IRQ_UART0_TX"
default 10
config IRQ_TIMER8
int "IRQ_TIMER8"
default 11
config IRQ_TIMER9
int "IRQ_TIMER9"
default 11
config IRQ_TIMER10
int "IRQ_TIMER10"
default 11
config IRQ_PINT0
int "IRQ_PINT0"
default 12
config IRQ_PINT1
int "IRQ_PINT0"
default 12
config IRQ_MDMAS0
int "IRQ_MDMAS0"
default 13
config IRQ_MDMAS1
int "IRQ_DMDMAS1"
default 13
config IRQ_WATCHDOG
int "IRQ_WATCHDOG"
default 13
config IRQ_DMAC1_ERR
int "IRQ_DMAC1_ERR"
default 7
config IRQ_SPORT2_ERR
int "IRQ_SPORT2_ERR"
default 7
config IRQ_SPORT3_ERR
int "IRQ_SPORT3_ERR"
default 7
config IRQ_MXVR_DATA
int "IRQ MXVR Data"
default 7
config IRQ_SPI1_ERR
int "IRQ_SPI1_ERR"
default 7
config IRQ_SPI2_ERR
int "IRQ_SPI2_ERR"
default 7
config IRQ_UART1_ERR
int "IRQ_UART1_ERR"
default 7
config IRQ_UART2_ERR
int "IRQ_UART2_ERR"
default 7
config IRQ_CAN0_ERR
int "IRQ_CAN0_ERR"
default 7
config IRQ_SPORT2_RX
int "IRQ_SPORT2_RX"
default 9
config IRQ_SPORT2_TX
int "IRQ_SPORT2_TX"
default 9
config IRQ_SPORT3_RX
int "IRQ_SPORT3_RX"
default 9
config IRQ_SPORT3_TX
int "IRQ_SPORT3_TX"
default 9
config IRQ_EPPI1
int "IRQ_EPPI1"
default 9
config IRQ_EPPI2
int "IRQ_EPPI2"
default 9
config IRQ_SPI1
int "IRQ_SPI1"
default 10
config IRQ_SPI2
int "IRQ_SPI2"
default 10
config IRQ_UART1_RX
int "IRQ_UART1_RX"
default 10
config IRQ_UART1_TX
int "IRQ_UART1_TX"
default 10
config IRQ_ATAPI_RX
int "IRQ_ATAPI_RX"
default 10
config IRQ_ATAPI_TX
int "IRQ_ATAPI_TX"
default 10
config IRQ_TWI0
int "IRQ_TWI0"
default 11
config IRQ_TWI1
int "IRQ_TWI1"
default 11
config IRQ_CAN0_RX
int "IRQ_CAN_RX"
default 11
config IRQ_CAN0_TX
int "IRQ_CAN_TX"
default 11
config IRQ_MDMAS2
int "IRQ_MDMAS2"
default 13
config IRQ_MDMAS3
int "IRQ_DMMAS3"
default 13
config IRQ_MXVR_ERR
int "IRQ_MXVR_ERR"
default 11
config IRQ_MXVR_MSG
int "IRQ_MXVR_MSG"
default 11
config IRQ_MXVR_PKT
int "IRQ_MXVR_PKT"
default 11
config IRQ_EPPI1_ERR
int "IRQ_EPPI1_ERR"
default 7
config IRQ_EPPI2_ERR
int "IRQ_EPPI2_ERR"
default 7
config IRQ_UART3_ERR
int "IRQ_UART3_ERR"
default 7
config IRQ_HOST_ERR
int "IRQ_HOST_ERR"
default 7
config IRQ_PIXC_ERR
int "IRQ_PIXC_ERR"
default 7
config IRQ_NFC_ERR
int "IRQ_NFC_ERR"
default 7
config IRQ_ATAPI_ERR
int "IRQ_ATAPI_ERR"
default 7
config IRQ_CAN1_ERR
int "IRQ_CAN1_ERR"
default 7
config IRQ_HS_DMA_ERR
int "IRQ Handshake DMA Status"
default 7
config IRQ_PIXC_IN0
int "IRQ PIXC IN0"
default 8
config IRQ_PIXC_IN1
int "IRQ PIXC IN1"
default 8
config IRQ_PIXC_OUT
int "IRQ PIXC OUT"
default 8
config IRQ_SDH
int "IRQ SDH"
default 8
config IRQ_CNT
int "IRQ CNT"
default 8
config IRQ_KEY
int "IRQ KEY"
default 8
config IRQ_CAN1_RX
int "IRQ CAN1 RX"
default 11
config IRQ_CAN1_TX
int "IRQ_CAN1_TX"
default 11
config IRQ_SDH_MASK0
int "IRQ_SDH_MASK0"
default 11
config IRQ_SDH_MASK1
int "IRQ_SDH_MASK1"
default 11
config IRQ_USB_INT0
int "IRQ USB INT0"
default 11
config IRQ_USB_INT1
int "IRQ USB INT1"
default 11
config IRQ_USB_INT2
int "IRQ USB INT2"
default 11
config IRQ_USB_DMA
int "IRQ USB DMA"
default 11
config IRQ_OTPSEC
int "IRQ OPTSEC"
default 11
config IRQ_TIMER0
int "IRQ_TIMER0"
Blackfin: add support for gptimer0 as a tick source For systems where the core cycles are not a usable tick source (like SMP or cycles gets updated), enable gptimer0 as an alternative. Signed-off-by: Graf Yang <graf.yang@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2009-05-15 19:01:59 +08:00
default 7 if TICKSOURCE_GPTMR0
Blackfin arch: merge adeos blackfin part to arch/blackfin/ [Mike Frysinger <vapier.adi@gmail.com>: - handle bf531/bf532/bf534/bf536 variants in ipipe.h - cleanup IPIPE logic for bfin_set_irq_handler() - cleanup ipipe asm code a bit and add missing ENDPROC() - simplify IPIPE code in trap_c - unify some of the IPIPE code and fix style - simplify DO_IRQ_L1 handling with ipipe code - revert IRQ_SW_INT# addition from ipipe merge - remove duplicate get_{c,s}clk() prototypes ] Signed-off-by: Yi Li <yi.li@analog.com> Signed-off-by: Mike Frysinger <vapier.adi@gmail.com> Signed-off-by: Bryan Wu <cooloney@kernel.org>
2009-01-07 23:14:39 +08:00
default 8
Blackfin arch: initial supporting for BF548-EZKIT The ADSP-BF54x was specifically designed to meet the needs of convergent multimedia applications where system performance and cost are essential ingredients. The integration of multimedia, human interface, and connectivity peripherals combined with increased system bandwidth and on-chip memory provides customers a platform to design the most demanding applications. Since now, ADSP-BF54x will be supported in the Linux kernel and bunch of related drivers such as USB OTG, ATAPI, NAND flash controller, LCD framebuffer, sound, touch screen will be submitted later. Please enjoy the show. Signed-off-by: Roy Huang <roy.huang@analog.com> Signed-off-by: Bryan Wu <bryan.wu@analog.com>
2007-07-12 22:41:45 +08:00
config IRQ_TIMER1
int "IRQ_TIMER1"
default 11
config IRQ_TIMER2
int "IRQ_TIMER2"
default 11
config IRQ_TIMER3
int "IRQ_TIMER3"
default 11
config IRQ_TIMER4
int "IRQ_TIMER4"
default 11
config IRQ_TIMER5
int "IRQ_TIMER5"
default 11
config IRQ_TIMER6
int "IRQ_TIMER6"
default 11
config IRQ_TIMER7
int "IRQ_TIMER7"
default 11
config IRQ_PINT2
int "IRQ_PIN2"
default 11
config IRQ_PINT3
int "IRQ_PIN3"
default 11
help
Enter the priority numbers between 7-13 ONLY. Others are Reserved.
This applies to all the above. It is not recommended to assign the
highest priority number 7 to UART or any other device.
endmenu
endmenu
endif