[ARM] add Marvell Kirkwood (88F6000) SoC support
The Marvell Kirkwood (88F6000) is a family of ARM SoCs based on a
Shiva CPU core, and features a DDR2 controller, a x1 PCIe interface,
a USB 2.0 interface, a SPI controller, a crypto accelerator, a TS
interface, and IDMA/XOR engines, and depending on the model, also
features one or two Gigabit Ethernet interfaces, two SATA II
interfaces, one or two TWSI interfaces, one or two UARTs, a
TDM/SLIC interface, a NAND controller, an I2S/SPDIF interface, and
an SDIO interface.
This patch adds supports for the Marvell DB-88F6281-BP Development
Board and the RD-88F6192-NAS and the RD-88F6281 Reference Designs,
enabling support for the PCIe interface, the USB interface, the
ethernet interfaces, the SATA interfaces, the TWSI interfaces, the
UARTs, and the NAND controller.
Signed-off-by: Saeed Bishara <saeed@marvell.com>
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
2008-06-23 04:45:06 +08:00
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/*
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* arch/arm/mach-kirkwood/common.c
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*
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* Core functions for Marvell Kirkwood SoCs
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*
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* This file is licensed under the terms of the GNU General Public
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* License version 2. This program is licensed "as is" without any
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* warranty of any kind, whether express or implied.
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*/
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/platform_device.h>
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#include <linux/serial_8250.h>
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#include <linux/mbus.h>
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#include <linux/mv643xx_eth.h>
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#include <linux/ata_platform.h>
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2008-08-09 21:38:18 +08:00
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#include <linux/spi/orion_spi.h>
|
[ARM] add Marvell Kirkwood (88F6000) SoC support
The Marvell Kirkwood (88F6000) is a family of ARM SoCs based on a
Shiva CPU core, and features a DDR2 controller, a x1 PCIe interface,
a USB 2.0 interface, a SPI controller, a crypto accelerator, a TS
interface, and IDMA/XOR engines, and depending on the model, also
features one or two Gigabit Ethernet interfaces, two SATA II
interfaces, one or two TWSI interfaces, one or two UARTs, a
TDM/SLIC interface, a NAND controller, an I2S/SPDIF interface, and
an SDIO interface.
This patch adds supports for the Marvell DB-88F6281-BP Development
Board and the RD-88F6192-NAS and the RD-88F6281 Reference Designs,
enabling support for the PCIe interface, the USB interface, the
ethernet interfaces, the SATA interfaces, the TWSI interfaces, the
UARTs, and the NAND controller.
Signed-off-by: Saeed Bishara <saeed@marvell.com>
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
2008-06-23 04:45:06 +08:00
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#include <asm/page.h>
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#include <asm/timex.h>
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#include <asm/mach/map.h>
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#include <asm/mach/time.h>
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2008-08-05 23:14:15 +08:00
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#include <mach/kirkwood.h>
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2008-08-09 19:44:58 +08:00
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#include <plat/cache-feroceon-l2.h>
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#include <plat/ehci-orion.h>
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2008-06-23 23:26:07 +08:00
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#include <plat/mv_xor.h>
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2008-08-09 19:44:58 +08:00
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#include <plat/orion_nand.h>
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#include <plat/time.h>
|
[ARM] add Marvell Kirkwood (88F6000) SoC support
The Marvell Kirkwood (88F6000) is a family of ARM SoCs based on a
Shiva CPU core, and features a DDR2 controller, a x1 PCIe interface,
a USB 2.0 interface, a SPI controller, a crypto accelerator, a TS
interface, and IDMA/XOR engines, and depending on the model, also
features one or two Gigabit Ethernet interfaces, two SATA II
interfaces, one or two TWSI interfaces, one or two UARTs, a
TDM/SLIC interface, a NAND controller, an I2S/SPDIF interface, and
an SDIO interface.
This patch adds supports for the Marvell DB-88F6281-BP Development
Board and the RD-88F6192-NAS and the RD-88F6281 Reference Designs,
enabling support for the PCIe interface, the USB interface, the
ethernet interfaces, the SATA interfaces, the TWSI interfaces, the
UARTs, and the NAND controller.
Signed-off-by: Saeed Bishara <saeed@marvell.com>
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
2008-06-23 04:45:06 +08:00
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#include "common.h"
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/*****************************************************************************
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* I/O Address Mapping
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****************************************************************************/
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static struct map_desc kirkwood_io_desc[] __initdata = {
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{
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.virtual = KIRKWOOD_PCIE_IO_VIRT_BASE,
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.pfn = __phys_to_pfn(KIRKWOOD_PCIE_IO_PHYS_BASE),
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.length = KIRKWOOD_PCIE_IO_SIZE,
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.type = MT_DEVICE,
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}, {
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.virtual = KIRKWOOD_REGS_VIRT_BASE,
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.pfn = __phys_to_pfn(KIRKWOOD_REGS_PHYS_BASE),
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.length = KIRKWOOD_REGS_SIZE,
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.type = MT_DEVICE,
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},
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};
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void __init kirkwood_map_io(void)
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{
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iotable_init(kirkwood_io_desc, ARRAY_SIZE(kirkwood_io_desc));
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}
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/*****************************************************************************
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* EHCI
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****************************************************************************/
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static struct orion_ehci_data kirkwood_ehci_data = {
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.dram = &kirkwood_mbus_dram_info,
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};
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static u64 ehci_dmamask = 0xffffffffUL;
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/*****************************************************************************
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* EHCI0
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****************************************************************************/
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static struct resource kirkwood_ehci_resources[] = {
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{
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.start = USB_PHYS_BASE,
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.end = USB_PHYS_BASE + 0x0fff,
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.flags = IORESOURCE_MEM,
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}, {
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.start = IRQ_KIRKWOOD_USB,
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.end = IRQ_KIRKWOOD_USB,
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.flags = IORESOURCE_IRQ,
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},
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};
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static struct platform_device kirkwood_ehci = {
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.name = "orion-ehci",
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.id = 0,
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.dev = {
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.dma_mask = &ehci_dmamask,
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.coherent_dma_mask = 0xffffffff,
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.platform_data = &kirkwood_ehci_data,
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},
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.resource = kirkwood_ehci_resources,
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.num_resources = ARRAY_SIZE(kirkwood_ehci_resources),
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};
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void __init kirkwood_ehci_init(void)
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{
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platform_device_register(&kirkwood_ehci);
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}
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/*****************************************************************************
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* GE00
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****************************************************************************/
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struct mv643xx_eth_shared_platform_data kirkwood_ge00_shared_data = {
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.dram = &kirkwood_mbus_dram_info,
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};
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static struct resource kirkwood_ge00_shared_resources[] = {
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{
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.name = "ge00 base",
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.start = GE00_PHYS_BASE + 0x2000,
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.end = GE00_PHYS_BASE + 0x3fff,
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.flags = IORESOURCE_MEM,
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2008-08-26 22:04:05 +08:00
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}, {
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.name = "ge00 err irq",
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.start = IRQ_KIRKWOOD_GE00_ERR,
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.end = IRQ_KIRKWOOD_GE00_ERR,
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.flags = IORESOURCE_IRQ,
|
[ARM] add Marvell Kirkwood (88F6000) SoC support
The Marvell Kirkwood (88F6000) is a family of ARM SoCs based on a
Shiva CPU core, and features a DDR2 controller, a x1 PCIe interface,
a USB 2.0 interface, a SPI controller, a crypto accelerator, a TS
interface, and IDMA/XOR engines, and depending on the model, also
features one or two Gigabit Ethernet interfaces, two SATA II
interfaces, one or two TWSI interfaces, one or two UARTs, a
TDM/SLIC interface, a NAND controller, an I2S/SPDIF interface, and
an SDIO interface.
This patch adds supports for the Marvell DB-88F6281-BP Development
Board and the RD-88F6192-NAS and the RD-88F6281 Reference Designs,
enabling support for the PCIe interface, the USB interface, the
ethernet interfaces, the SATA interfaces, the TWSI interfaces, the
UARTs, and the NAND controller.
Signed-off-by: Saeed Bishara <saeed@marvell.com>
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
2008-06-23 04:45:06 +08:00
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},
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};
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static struct platform_device kirkwood_ge00_shared = {
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.name = MV643XX_ETH_SHARED_NAME,
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.id = 0,
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.dev = {
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.platform_data = &kirkwood_ge00_shared_data,
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},
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2008-08-26 22:04:05 +08:00
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.num_resources = ARRAY_SIZE(kirkwood_ge00_shared_resources),
|
[ARM] add Marvell Kirkwood (88F6000) SoC support
The Marvell Kirkwood (88F6000) is a family of ARM SoCs based on a
Shiva CPU core, and features a DDR2 controller, a x1 PCIe interface,
a USB 2.0 interface, a SPI controller, a crypto accelerator, a TS
interface, and IDMA/XOR engines, and depending on the model, also
features one or two Gigabit Ethernet interfaces, two SATA II
interfaces, one or two TWSI interfaces, one or two UARTs, a
TDM/SLIC interface, a NAND controller, an I2S/SPDIF interface, and
an SDIO interface.
This patch adds supports for the Marvell DB-88F6281-BP Development
Board and the RD-88F6192-NAS and the RD-88F6281 Reference Designs,
enabling support for the PCIe interface, the USB interface, the
ethernet interfaces, the SATA interfaces, the TWSI interfaces, the
UARTs, and the NAND controller.
Signed-off-by: Saeed Bishara <saeed@marvell.com>
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
2008-06-23 04:45:06 +08:00
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.resource = kirkwood_ge00_shared_resources,
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};
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static struct resource kirkwood_ge00_resources[] = {
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{
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.name = "ge00 irq",
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.start = IRQ_KIRKWOOD_GE00_SUM,
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.end = IRQ_KIRKWOOD_GE00_SUM,
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.flags = IORESOURCE_IRQ,
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},
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};
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static struct platform_device kirkwood_ge00 = {
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.name = MV643XX_ETH_NAME,
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.id = 0,
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.num_resources = 1,
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.resource = kirkwood_ge00_resources,
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};
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void __init kirkwood_ge00_init(struct mv643xx_eth_platform_data *eth_data)
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{
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eth_data->shared = &kirkwood_ge00_shared;
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kirkwood_ge00.dev.platform_data = eth_data;
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platform_device_register(&kirkwood_ge00_shared);
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platform_device_register(&kirkwood_ge00);
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}
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/*****************************************************************************
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* SoC RTC
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****************************************************************************/
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static struct resource kirkwood_rtc_resource = {
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.start = RTC_PHYS_BASE,
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.end = RTC_PHYS_BASE + SZ_16 - 1,
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.flags = IORESOURCE_MEM,
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};
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void __init kirkwood_rtc_init(void)
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{
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platform_device_register_simple("rtc-mv", -1, &kirkwood_rtc_resource, 1);
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}
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/*****************************************************************************
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* SATA
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****************************************************************************/
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static struct resource kirkwood_sata_resources[] = {
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{
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.name = "sata base",
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.start = SATA_PHYS_BASE,
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.end = SATA_PHYS_BASE + 0x5000 - 1,
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.flags = IORESOURCE_MEM,
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}, {
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.name = "sata irq",
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.start = IRQ_KIRKWOOD_SATA,
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.end = IRQ_KIRKWOOD_SATA,
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.flags = IORESOURCE_IRQ,
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},
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};
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static struct platform_device kirkwood_sata = {
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.name = "sata_mv",
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.id = 0,
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.dev = {
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.coherent_dma_mask = 0xffffffff,
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},
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.num_resources = ARRAY_SIZE(kirkwood_sata_resources),
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.resource = kirkwood_sata_resources,
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};
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void __init kirkwood_sata_init(struct mv_sata_platform_data *sata_data)
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{
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sata_data->dram = &kirkwood_mbus_dram_info;
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kirkwood_sata.dev.platform_data = sata_data;
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platform_device_register(&kirkwood_sata);
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}
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|
2008-08-09 21:38:18 +08:00
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/*****************************************************************************
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* SPI
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****************************************************************************/
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static struct orion_spi_info kirkwood_spi_plat_data = {
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};
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static struct resource kirkwood_spi_resources[] = {
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{
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.start = SPI_PHYS_BASE,
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.end = SPI_PHYS_BASE + SZ_512 - 1,
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.flags = IORESOURCE_MEM,
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},
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};
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static struct platform_device kirkwood_spi = {
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.name = "orion_spi",
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.id = 0,
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.resource = kirkwood_spi_resources,
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.dev = {
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.platform_data = &kirkwood_spi_plat_data,
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},
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.num_resources = ARRAY_SIZE(kirkwood_spi_resources),
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};
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void __init kirkwood_spi_init()
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{
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platform_device_register(&kirkwood_spi);
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}
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|
|
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|
|
|
|
[ARM] add Marvell Kirkwood (88F6000) SoC support
The Marvell Kirkwood (88F6000) is a family of ARM SoCs based on a
Shiva CPU core, and features a DDR2 controller, a x1 PCIe interface,
a USB 2.0 interface, a SPI controller, a crypto accelerator, a TS
interface, and IDMA/XOR engines, and depending on the model, also
features one or two Gigabit Ethernet interfaces, two SATA II
interfaces, one or two TWSI interfaces, one or two UARTs, a
TDM/SLIC interface, a NAND controller, an I2S/SPDIF interface, and
an SDIO interface.
This patch adds supports for the Marvell DB-88F6281-BP Development
Board and the RD-88F6192-NAS and the RD-88F6281 Reference Designs,
enabling support for the PCIe interface, the USB interface, the
ethernet interfaces, the SATA interfaces, the TWSI interfaces, the
UARTs, and the NAND controller.
Signed-off-by: Saeed Bishara <saeed@marvell.com>
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
2008-06-23 04:45:06 +08:00
|
|
|
/*****************************************************************************
|
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* UART0
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****************************************************************************/
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static struct plat_serial8250_port kirkwood_uart0_data[] = {
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{
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.mapbase = UART0_PHYS_BASE,
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.membase = (char *)UART0_VIRT_BASE,
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.irq = IRQ_KIRKWOOD_UART_0,
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.flags = UPF_SKIP_TEST | UPF_BOOT_AUTOCONF,
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.iotype = UPIO_MEM,
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.regshift = 2,
|
2008-09-15 06:56:38 +08:00
|
|
|
.uartclk = 0,
|
[ARM] add Marvell Kirkwood (88F6000) SoC support
The Marvell Kirkwood (88F6000) is a family of ARM SoCs based on a
Shiva CPU core, and features a DDR2 controller, a x1 PCIe interface,
a USB 2.0 interface, a SPI controller, a crypto accelerator, a TS
interface, and IDMA/XOR engines, and depending on the model, also
features one or two Gigabit Ethernet interfaces, two SATA II
interfaces, one or two TWSI interfaces, one or two UARTs, a
TDM/SLIC interface, a NAND controller, an I2S/SPDIF interface, and
an SDIO interface.
This patch adds supports for the Marvell DB-88F6281-BP Development
Board and the RD-88F6192-NAS and the RD-88F6281 Reference Designs,
enabling support for the PCIe interface, the USB interface, the
ethernet interfaces, the SATA interfaces, the TWSI interfaces, the
UARTs, and the NAND controller.
Signed-off-by: Saeed Bishara <saeed@marvell.com>
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
2008-06-23 04:45:06 +08:00
|
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}, {
|
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},
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};
|
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static struct resource kirkwood_uart0_resources[] = {
|
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{
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.start = UART0_PHYS_BASE,
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.end = UART0_PHYS_BASE + 0xff,
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.flags = IORESOURCE_MEM,
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}, {
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.start = IRQ_KIRKWOOD_UART_0,
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.end = IRQ_KIRKWOOD_UART_0,
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.flags = IORESOURCE_IRQ,
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},
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};
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static struct platform_device kirkwood_uart0 = {
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.name = "serial8250",
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.id = 0,
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.dev = {
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|
|
.platform_data = kirkwood_uart0_data,
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|
},
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|
|
.resource = kirkwood_uart0_resources,
|
|
|
|
.num_resources = ARRAY_SIZE(kirkwood_uart0_resources),
|
|
|
|
};
|
|
|
|
|
|
|
|
void __init kirkwood_uart0_init(void)
|
|
|
|
{
|
|
|
|
platform_device_register(&kirkwood_uart0);
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
/*****************************************************************************
|
|
|
|
* UART1
|
|
|
|
****************************************************************************/
|
|
|
|
static struct plat_serial8250_port kirkwood_uart1_data[] = {
|
|
|
|
{
|
|
|
|
.mapbase = UART1_PHYS_BASE,
|
|
|
|
.membase = (char *)UART1_VIRT_BASE,
|
|
|
|
.irq = IRQ_KIRKWOOD_UART_1,
|
|
|
|
.flags = UPF_SKIP_TEST | UPF_BOOT_AUTOCONF,
|
|
|
|
.iotype = UPIO_MEM,
|
|
|
|
.regshift = 2,
|
2008-09-15 06:56:38 +08:00
|
|
|
.uartclk = 0,
|
[ARM] add Marvell Kirkwood (88F6000) SoC support
The Marvell Kirkwood (88F6000) is a family of ARM SoCs based on a
Shiva CPU core, and features a DDR2 controller, a x1 PCIe interface,
a USB 2.0 interface, a SPI controller, a crypto accelerator, a TS
interface, and IDMA/XOR engines, and depending on the model, also
features one or two Gigabit Ethernet interfaces, two SATA II
interfaces, one or two TWSI interfaces, one or two UARTs, a
TDM/SLIC interface, a NAND controller, an I2S/SPDIF interface, and
an SDIO interface.
This patch adds supports for the Marvell DB-88F6281-BP Development
Board and the RD-88F6192-NAS and the RD-88F6281 Reference Designs,
enabling support for the PCIe interface, the USB interface, the
ethernet interfaces, the SATA interfaces, the TWSI interfaces, the
UARTs, and the NAND controller.
Signed-off-by: Saeed Bishara <saeed@marvell.com>
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
2008-06-23 04:45:06 +08:00
|
|
|
}, {
|
|
|
|
},
|
|
|
|
};
|
|
|
|
|
|
|
|
static struct resource kirkwood_uart1_resources[] = {
|
|
|
|
{
|
|
|
|
.start = UART1_PHYS_BASE,
|
|
|
|
.end = UART1_PHYS_BASE + 0xff,
|
|
|
|
.flags = IORESOURCE_MEM,
|
|
|
|
}, {
|
|
|
|
.start = IRQ_KIRKWOOD_UART_1,
|
|
|
|
.end = IRQ_KIRKWOOD_UART_1,
|
|
|
|
.flags = IORESOURCE_IRQ,
|
|
|
|
},
|
|
|
|
};
|
|
|
|
|
|
|
|
static struct platform_device kirkwood_uart1 = {
|
|
|
|
.name = "serial8250",
|
|
|
|
.id = 1,
|
|
|
|
.dev = {
|
|
|
|
.platform_data = kirkwood_uart1_data,
|
|
|
|
},
|
|
|
|
.resource = kirkwood_uart1_resources,
|
|
|
|
.num_resources = ARRAY_SIZE(kirkwood_uart1_resources),
|
|
|
|
};
|
|
|
|
|
|
|
|
void __init kirkwood_uart1_init(void)
|
|
|
|
{
|
|
|
|
platform_device_register(&kirkwood_uart1);
|
|
|
|
}
|
|
|
|
|
|
|
|
|
2008-06-23 23:26:07 +08:00
|
|
|
/*****************************************************************************
|
|
|
|
* XOR
|
|
|
|
****************************************************************************/
|
|
|
|
static struct mv_xor_platform_shared_data kirkwood_xor_shared_data = {
|
|
|
|
.dram = &kirkwood_mbus_dram_info,
|
|
|
|
};
|
|
|
|
|
|
|
|
static u64 kirkwood_xor_dmamask = DMA_32BIT_MASK;
|
|
|
|
|
|
|
|
|
|
|
|
/*****************************************************************************
|
|
|
|
* XOR0
|
|
|
|
****************************************************************************/
|
|
|
|
static struct resource kirkwood_xor0_shared_resources[] = {
|
|
|
|
{
|
|
|
|
.name = "xor 0 low",
|
|
|
|
.start = XOR0_PHYS_BASE,
|
|
|
|
.end = XOR0_PHYS_BASE + 0xff,
|
|
|
|
.flags = IORESOURCE_MEM,
|
|
|
|
}, {
|
|
|
|
.name = "xor 0 high",
|
|
|
|
.start = XOR0_HIGH_PHYS_BASE,
|
|
|
|
.end = XOR0_HIGH_PHYS_BASE + 0xff,
|
|
|
|
.flags = IORESOURCE_MEM,
|
|
|
|
},
|
|
|
|
};
|
|
|
|
|
|
|
|
static struct platform_device kirkwood_xor0_shared = {
|
|
|
|
.name = MV_XOR_SHARED_NAME,
|
|
|
|
.id = 0,
|
|
|
|
.dev = {
|
|
|
|
.platform_data = &kirkwood_xor_shared_data,
|
|
|
|
},
|
|
|
|
.num_resources = ARRAY_SIZE(kirkwood_xor0_shared_resources),
|
|
|
|
.resource = kirkwood_xor0_shared_resources,
|
|
|
|
};
|
|
|
|
|
|
|
|
static struct resource kirkwood_xor00_resources[] = {
|
|
|
|
[0] = {
|
|
|
|
.start = IRQ_KIRKWOOD_XOR_00,
|
|
|
|
.end = IRQ_KIRKWOOD_XOR_00,
|
|
|
|
.flags = IORESOURCE_IRQ,
|
|
|
|
},
|
|
|
|
};
|
|
|
|
|
|
|
|
static struct mv_xor_platform_data kirkwood_xor00_data = {
|
|
|
|
.shared = &kirkwood_xor0_shared,
|
|
|
|
.hw_id = 0,
|
|
|
|
.pool_size = PAGE_SIZE,
|
|
|
|
};
|
|
|
|
|
|
|
|
static struct platform_device kirkwood_xor00_channel = {
|
|
|
|
.name = MV_XOR_NAME,
|
|
|
|
.id = 0,
|
|
|
|
.num_resources = ARRAY_SIZE(kirkwood_xor00_resources),
|
|
|
|
.resource = kirkwood_xor00_resources,
|
|
|
|
.dev = {
|
|
|
|
.dma_mask = &kirkwood_xor_dmamask,
|
|
|
|
.coherent_dma_mask = DMA_64BIT_MASK,
|
|
|
|
.platform_data = (void *)&kirkwood_xor00_data,
|
|
|
|
},
|
|
|
|
};
|
|
|
|
|
|
|
|
static struct resource kirkwood_xor01_resources[] = {
|
|
|
|
[0] = {
|
|
|
|
.start = IRQ_KIRKWOOD_XOR_01,
|
|
|
|
.end = IRQ_KIRKWOOD_XOR_01,
|
|
|
|
.flags = IORESOURCE_IRQ,
|
|
|
|
},
|
|
|
|
};
|
|
|
|
|
|
|
|
static struct mv_xor_platform_data kirkwood_xor01_data = {
|
|
|
|
.shared = &kirkwood_xor0_shared,
|
|
|
|
.hw_id = 1,
|
|
|
|
.pool_size = PAGE_SIZE,
|
|
|
|
};
|
|
|
|
|
|
|
|
static struct platform_device kirkwood_xor01_channel = {
|
|
|
|
.name = MV_XOR_NAME,
|
|
|
|
.id = 1,
|
|
|
|
.num_resources = ARRAY_SIZE(kirkwood_xor01_resources),
|
|
|
|
.resource = kirkwood_xor01_resources,
|
|
|
|
.dev = {
|
|
|
|
.dma_mask = &kirkwood_xor_dmamask,
|
|
|
|
.coherent_dma_mask = DMA_64BIT_MASK,
|
|
|
|
.platform_data = (void *)&kirkwood_xor01_data,
|
|
|
|
},
|
|
|
|
};
|
|
|
|
|
|
|
|
void __init kirkwood_xor0_init(void)
|
|
|
|
{
|
|
|
|
platform_device_register(&kirkwood_xor0_shared);
|
|
|
|
|
|
|
|
/*
|
|
|
|
* two engines can't do memset simultaneously, this limitation
|
|
|
|
* satisfied by removing memset support from one of the engines.
|
|
|
|
*/
|
|
|
|
dma_cap_set(DMA_MEMCPY, kirkwood_xor00_data.cap_mask);
|
|
|
|
dma_cap_set(DMA_XOR, kirkwood_xor00_data.cap_mask);
|
|
|
|
platform_device_register(&kirkwood_xor00_channel);
|
|
|
|
|
|
|
|
dma_cap_set(DMA_MEMCPY, kirkwood_xor01_data.cap_mask);
|
|
|
|
dma_cap_set(DMA_MEMSET, kirkwood_xor01_data.cap_mask);
|
|
|
|
dma_cap_set(DMA_XOR, kirkwood_xor01_data.cap_mask);
|
|
|
|
platform_device_register(&kirkwood_xor01_channel);
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
/*****************************************************************************
|
|
|
|
* XOR1
|
|
|
|
****************************************************************************/
|
|
|
|
static struct resource kirkwood_xor1_shared_resources[] = {
|
|
|
|
{
|
|
|
|
.name = "xor 1 low",
|
|
|
|
.start = XOR1_PHYS_BASE,
|
|
|
|
.end = XOR1_PHYS_BASE + 0xff,
|
|
|
|
.flags = IORESOURCE_MEM,
|
|
|
|
}, {
|
|
|
|
.name = "xor 1 high",
|
|
|
|
.start = XOR1_HIGH_PHYS_BASE,
|
|
|
|
.end = XOR1_HIGH_PHYS_BASE + 0xff,
|
|
|
|
.flags = IORESOURCE_MEM,
|
|
|
|
},
|
|
|
|
};
|
|
|
|
|
|
|
|
static struct platform_device kirkwood_xor1_shared = {
|
|
|
|
.name = MV_XOR_SHARED_NAME,
|
|
|
|
.id = 1,
|
|
|
|
.dev = {
|
|
|
|
.platform_data = &kirkwood_xor_shared_data,
|
|
|
|
},
|
|
|
|
.num_resources = ARRAY_SIZE(kirkwood_xor1_shared_resources),
|
|
|
|
.resource = kirkwood_xor1_shared_resources,
|
|
|
|
};
|
|
|
|
|
|
|
|
static struct resource kirkwood_xor10_resources[] = {
|
|
|
|
[0] = {
|
|
|
|
.start = IRQ_KIRKWOOD_XOR_10,
|
|
|
|
.end = IRQ_KIRKWOOD_XOR_10,
|
|
|
|
.flags = IORESOURCE_IRQ,
|
|
|
|
},
|
|
|
|
};
|
|
|
|
|
|
|
|
static struct mv_xor_platform_data kirkwood_xor10_data = {
|
|
|
|
.shared = &kirkwood_xor1_shared,
|
|
|
|
.hw_id = 0,
|
|
|
|
.pool_size = PAGE_SIZE,
|
|
|
|
};
|
|
|
|
|
|
|
|
static struct platform_device kirkwood_xor10_channel = {
|
|
|
|
.name = MV_XOR_NAME,
|
|
|
|
.id = 2,
|
|
|
|
.num_resources = ARRAY_SIZE(kirkwood_xor10_resources),
|
|
|
|
.resource = kirkwood_xor10_resources,
|
|
|
|
.dev = {
|
|
|
|
.dma_mask = &kirkwood_xor_dmamask,
|
|
|
|
.coherent_dma_mask = DMA_64BIT_MASK,
|
|
|
|
.platform_data = (void *)&kirkwood_xor10_data,
|
|
|
|
},
|
|
|
|
};
|
|
|
|
|
|
|
|
static struct resource kirkwood_xor11_resources[] = {
|
|
|
|
[0] = {
|
|
|
|
.start = IRQ_KIRKWOOD_XOR_11,
|
|
|
|
.end = IRQ_KIRKWOOD_XOR_11,
|
|
|
|
.flags = IORESOURCE_IRQ,
|
|
|
|
},
|
|
|
|
};
|
|
|
|
|
|
|
|
static struct mv_xor_platform_data kirkwood_xor11_data = {
|
|
|
|
.shared = &kirkwood_xor1_shared,
|
|
|
|
.hw_id = 1,
|
|
|
|
.pool_size = PAGE_SIZE,
|
|
|
|
};
|
|
|
|
|
|
|
|
static struct platform_device kirkwood_xor11_channel = {
|
|
|
|
.name = MV_XOR_NAME,
|
|
|
|
.id = 3,
|
|
|
|
.num_resources = ARRAY_SIZE(kirkwood_xor11_resources),
|
|
|
|
.resource = kirkwood_xor11_resources,
|
|
|
|
.dev = {
|
|
|
|
.dma_mask = &kirkwood_xor_dmamask,
|
|
|
|
.coherent_dma_mask = DMA_64BIT_MASK,
|
|
|
|
.platform_data = (void *)&kirkwood_xor11_data,
|
|
|
|
},
|
|
|
|
};
|
|
|
|
|
|
|
|
void __init kirkwood_xor1_init(void)
|
|
|
|
{
|
|
|
|
platform_device_register(&kirkwood_xor1_shared);
|
|
|
|
|
|
|
|
/*
|
|
|
|
* two engines can't do memset simultaneously, this limitation
|
|
|
|
* satisfied by removing memset support from one of the engines.
|
|
|
|
*/
|
|
|
|
dma_cap_set(DMA_MEMCPY, kirkwood_xor10_data.cap_mask);
|
|
|
|
dma_cap_set(DMA_XOR, kirkwood_xor10_data.cap_mask);
|
|
|
|
platform_device_register(&kirkwood_xor10_channel);
|
|
|
|
|
|
|
|
dma_cap_set(DMA_MEMCPY, kirkwood_xor11_data.cap_mask);
|
|
|
|
dma_cap_set(DMA_MEMSET, kirkwood_xor11_data.cap_mask);
|
|
|
|
dma_cap_set(DMA_XOR, kirkwood_xor11_data.cap_mask);
|
|
|
|
platform_device_register(&kirkwood_xor11_channel);
|
|
|
|
}
|
|
|
|
|
|
|
|
|
[ARM] add Marvell Kirkwood (88F6000) SoC support
The Marvell Kirkwood (88F6000) is a family of ARM SoCs based on a
Shiva CPU core, and features a DDR2 controller, a x1 PCIe interface,
a USB 2.0 interface, a SPI controller, a crypto accelerator, a TS
interface, and IDMA/XOR engines, and depending on the model, also
features one or two Gigabit Ethernet interfaces, two SATA II
interfaces, one or two TWSI interfaces, one or two UARTs, a
TDM/SLIC interface, a NAND controller, an I2S/SPDIF interface, and
an SDIO interface.
This patch adds supports for the Marvell DB-88F6281-BP Development
Board and the RD-88F6192-NAS and the RD-88F6281 Reference Designs,
enabling support for the PCIe interface, the USB interface, the
ethernet interfaces, the SATA interfaces, the TWSI interfaces, the
UARTs, and the NAND controller.
Signed-off-by: Saeed Bishara <saeed@marvell.com>
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
2008-06-23 04:45:06 +08:00
|
|
|
/*****************************************************************************
|
|
|
|
* Time handling
|
|
|
|
****************************************************************************/
|
2008-09-15 06:56:38 +08:00
|
|
|
int kirkwood_tclk;
|
|
|
|
|
|
|
|
int __init kirkwood_find_tclk(void)
|
|
|
|
{
|
|
|
|
return 166666667;
|
|
|
|
}
|
|
|
|
|
[ARM] add Marvell Kirkwood (88F6000) SoC support
The Marvell Kirkwood (88F6000) is a family of ARM SoCs based on a
Shiva CPU core, and features a DDR2 controller, a x1 PCIe interface,
a USB 2.0 interface, a SPI controller, a crypto accelerator, a TS
interface, and IDMA/XOR engines, and depending on the model, also
features one or two Gigabit Ethernet interfaces, two SATA II
interfaces, one or two TWSI interfaces, one or two UARTs, a
TDM/SLIC interface, a NAND controller, an I2S/SPDIF interface, and
an SDIO interface.
This patch adds supports for the Marvell DB-88F6281-BP Development
Board and the RD-88F6192-NAS and the RD-88F6281 Reference Designs,
enabling support for the PCIe interface, the USB interface, the
ethernet interfaces, the SATA interfaces, the TWSI interfaces, the
UARTs, and the NAND controller.
Signed-off-by: Saeed Bishara <saeed@marvell.com>
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
2008-06-23 04:45:06 +08:00
|
|
|
static void kirkwood_timer_init(void)
|
|
|
|
{
|
2008-09-15 06:56:38 +08:00
|
|
|
kirkwood_tclk = kirkwood_find_tclk();
|
|
|
|
orion_time_init(IRQ_KIRKWOOD_BRIDGE, kirkwood_tclk);
|
[ARM] add Marvell Kirkwood (88F6000) SoC support
The Marvell Kirkwood (88F6000) is a family of ARM SoCs based on a
Shiva CPU core, and features a DDR2 controller, a x1 PCIe interface,
a USB 2.0 interface, a SPI controller, a crypto accelerator, a TS
interface, and IDMA/XOR engines, and depending on the model, also
features one or two Gigabit Ethernet interfaces, two SATA II
interfaces, one or two TWSI interfaces, one or two UARTs, a
TDM/SLIC interface, a NAND controller, an I2S/SPDIF interface, and
an SDIO interface.
This patch adds supports for the Marvell DB-88F6281-BP Development
Board and the RD-88F6192-NAS and the RD-88F6281 Reference Designs,
enabling support for the PCIe interface, the USB interface, the
ethernet interfaces, the SATA interfaces, the TWSI interfaces, the
UARTs, and the NAND controller.
Signed-off-by: Saeed Bishara <saeed@marvell.com>
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
2008-06-23 04:45:06 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
struct sys_timer kirkwood_timer = {
|
|
|
|
.init = kirkwood_timer_init,
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
|
|
/*****************************************************************************
|
|
|
|
* General
|
|
|
|
****************************************************************************/
|
|
|
|
static char * __init kirkwood_id(void)
|
|
|
|
{
|
|
|
|
switch (readl(DEVICE_ID) & 0x3) {
|
|
|
|
case 0:
|
|
|
|
return "88F6180";
|
|
|
|
case 1:
|
|
|
|
return "88F6192";
|
|
|
|
case 2:
|
|
|
|
return "88F6281";
|
|
|
|
}
|
|
|
|
|
|
|
|
return "unknown 88F6000 variant";
|
|
|
|
}
|
|
|
|
|
2008-06-23 20:05:08 +08:00
|
|
|
static int __init is_l2_writethrough(void)
|
|
|
|
{
|
|
|
|
return !!(readl(L2_CONFIG_REG) & L2_WRITETHROUGH);
|
|
|
|
}
|
|
|
|
|
[ARM] add Marvell Kirkwood (88F6000) SoC support
The Marvell Kirkwood (88F6000) is a family of ARM SoCs based on a
Shiva CPU core, and features a DDR2 controller, a x1 PCIe interface,
a USB 2.0 interface, a SPI controller, a crypto accelerator, a TS
interface, and IDMA/XOR engines, and depending on the model, also
features one or two Gigabit Ethernet interfaces, two SATA II
interfaces, one or two TWSI interfaces, one or two UARTs, a
TDM/SLIC interface, a NAND controller, an I2S/SPDIF interface, and
an SDIO interface.
This patch adds supports for the Marvell DB-88F6281-BP Development
Board and the RD-88F6192-NAS and the RD-88F6281 Reference Designs,
enabling support for the PCIe interface, the USB interface, the
ethernet interfaces, the SATA interfaces, the TWSI interfaces, the
UARTs, and the NAND controller.
Signed-off-by: Saeed Bishara <saeed@marvell.com>
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
2008-06-23 04:45:06 +08:00
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void __init kirkwood_init(void)
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{
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printk(KERN_INFO "Kirkwood: %s, TCLK=%d.\n",
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2008-09-15 06:56:38 +08:00
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kirkwood_id(), kirkwood_tclk);
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kirkwood_ge00_shared_data.t_clk = kirkwood_tclk;
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kirkwood_spi_plat_data.tclk = kirkwood_tclk;
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kirkwood_uart0_data[0].uartclk = kirkwood_tclk;
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kirkwood_uart1_data[0].uartclk = kirkwood_tclk;
|
[ARM] add Marvell Kirkwood (88F6000) SoC support
The Marvell Kirkwood (88F6000) is a family of ARM SoCs based on a
Shiva CPU core, and features a DDR2 controller, a x1 PCIe interface,
a USB 2.0 interface, a SPI controller, a crypto accelerator, a TS
interface, and IDMA/XOR engines, and depending on the model, also
features one or two Gigabit Ethernet interfaces, two SATA II
interfaces, one or two TWSI interfaces, one or two UARTs, a
TDM/SLIC interface, a NAND controller, an I2S/SPDIF interface, and
an SDIO interface.
This patch adds supports for the Marvell DB-88F6281-BP Development
Board and the RD-88F6192-NAS and the RD-88F6281 Reference Designs,
enabling support for the PCIe interface, the USB interface, the
ethernet interfaces, the SATA interfaces, the TWSI interfaces, the
UARTs, and the NAND controller.
Signed-off-by: Saeed Bishara <saeed@marvell.com>
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
2008-06-23 04:45:06 +08:00
|
|
|
|
|
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kirkwood_setup_cpu_mbus();
|
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#ifdef CONFIG_CACHE_FEROCEON_L2
|
2008-06-23 20:05:08 +08:00
|
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feroceon_l2_init(is_l2_writethrough());
|
[ARM] add Marvell Kirkwood (88F6000) SoC support
The Marvell Kirkwood (88F6000) is a family of ARM SoCs based on a
Shiva CPU core, and features a DDR2 controller, a x1 PCIe interface,
a USB 2.0 interface, a SPI controller, a crypto accelerator, a TS
interface, and IDMA/XOR engines, and depending on the model, also
features one or two Gigabit Ethernet interfaces, two SATA II
interfaces, one or two TWSI interfaces, one or two UARTs, a
TDM/SLIC interface, a NAND controller, an I2S/SPDIF interface, and
an SDIO interface.
This patch adds supports for the Marvell DB-88F6281-BP Development
Board and the RD-88F6192-NAS and the RD-88F6281 Reference Designs,
enabling support for the PCIe interface, the USB interface, the
ethernet interfaces, the SATA interfaces, the TWSI interfaces, the
UARTs, and the NAND controller.
Signed-off-by: Saeed Bishara <saeed@marvell.com>
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
2008-06-23 04:45:06 +08:00
|
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|
#endif
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}
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