86 lines
3.2 KiB
C
86 lines
3.2 KiB
C
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/*
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* Copyright (C) 2001 Mike Corrigan IBM Corporation
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*/
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#ifndef _ISERIES_PROCESSOR_VPD_H
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#define _ISERIES_PROCESSOR_VPD_H
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#include <asm/types.h>
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/*
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* This struct maps Processor Vpd that is DMAd to SLIC by CSP
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*/
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struct IoHriProcessorVpd {
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u8 xFormat; // VPD format indicator x00-x00
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u8 xProcStatus:8; // Processor State x01-x01
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u8 xSecondaryThreadCount; // Secondary thread cnt x02-x02
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u8 xSrcType:1; // Src Type x03-x03
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u8 xSrcSoft:1; // Src stay soft ...
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u8 xSrcParable:1; // Src parable ...
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u8 xRsvd1:5; // Reserved ...
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u16 xHvPhysicalProcIndex; // Hypervisor physical proc index04-x05
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u16 xRsvd2; // Reserved x06-x07
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u32 xHwNodeId; // Hardware node id x08-x0B
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u32 xHwProcId; // Hardware processor id x0C-x0F
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u32 xTypeNum; // Card Type/CCIN number x10-x13
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u32 xModelNum; // Model/Feature number x14-x17
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u64 xSerialNum; // Serial number x18-x1F
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char xPartNum[12]; // Book Part or FPU number x20-x2B
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char xMfgID[4]; // Manufacturing ID x2C-x2F
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u32 xProcFreq; // Processor Frequency x30-x33
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u32 xTimeBaseFreq; // Time Base Frequency x34-x37
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u32 xChipEcLevel; // Chip EC Levels x38-x3B
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u32 xProcIdReg; // PIR SPR value x3C-x3F
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u32 xPVR; // PVR value x40-x43
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u8 xRsvd3[12]; // Reserved x44-x4F
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u32 xInstCacheSize; // Instruction cache size in KB x50-x53
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u32 xInstBlockSize; // Instruction cache block size x54-x57
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u32 xDataCacheOperandSize; // Data cache operand size x58-x5B
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u32 xInstCacheOperandSize; // Inst cache operand size x5C-x5F
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u32 xDataL1CacheSizeKB; // L1 data cache size in KB x60-x63
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u32 xDataL1CacheLineSize; // L1 data cache block size x64-x67
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u64 xRsvd4; // Reserved x68-x6F
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u32 xDataL2CacheSizeKB; // L2 data cache size in KB x70-x73
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u32 xDataL2CacheLineSize; // L2 data cache block size x74-x77
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u64 xRsvd5; // Reserved x78-x7F
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u32 xDataL3CacheSizeKB; // L3 data cache size in KB x80-x83
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u32 xDataL3CacheLineSize; // L3 data cache block size x84-x87
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u64 xRsvd6; // Reserved x88-x8F
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u64 xFruLabel; // Card Location Label x90-x97
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u8 xSlotsOnCard; // Slots on card (0=no slots) x98-x98
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u8 xPartLocFlag; // Location flag (0-pluggable 1-imbedded) x99-x99
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u16 xSlotMapIndex; // Index in slot map table x9A-x9B
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u8 xSmartCardPortNo; // Smart card port number x9C-x9C
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u8 xRsvd7; // Reserved x9D-x9D
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u16 xFrameIdAndRackUnit; // Frame ID and rack unit adr x9E-x9F
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u8 xRsvd8[24]; // Reserved xA0-xB7
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char xProcSrc[72]; // CSP format SRC xB8-xFF
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};
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extern struct IoHriProcessorVpd xIoHriProcessorVpd[];
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#endif /* _ISERIES_PROCESSOR_VPD_H */
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