2007-02-12 01:31:01 +08:00
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/* linux/arch/arm/plat-s3c24xx/devs.c
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2005-04-17 06:20:36 +08:00
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*
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* Copyright (c) 2004 Simtec Electronics
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2006-09-07 02:03:21 +08:00
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* Ben Dooks <ben@simtec.co.uk>
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2005-04-17 06:20:36 +08:00
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*
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2006-09-07 02:03:21 +08:00
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* Base S3C24XX platform device definitions
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2005-04-17 06:20:36 +08:00
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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*/
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#include <linux/kernel.h>
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#include <linux/types.h>
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#include <linux/interrupt.h>
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#include <linux/list.h>
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#include <linux/timer.h>
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#include <linux/init.h>
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2006-12-18 06:22:26 +08:00
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#include <linux/serial_core.h>
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2005-10-30 02:07:23 +08:00
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#include <linux/platform_device.h>
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2008-09-06 19:10:45 +08:00
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#include <linux/io.h>
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2005-04-17 06:20:36 +08:00
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#include <asm/mach/arch.h>
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#include <asm/mach/map.h>
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#include <asm/mach/irq.h>
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2008-08-05 23:14:15 +08:00
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#include <mach/fb.h>
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#include <mach/hardware.h>
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2005-04-17 06:20:36 +08:00
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#include <asm/irq.h>
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2008-10-08 05:26:09 +08:00
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#include <plat/regs-serial.h>
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2008-10-30 18:14:37 +08:00
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#include <plat/udc.h>
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2005-04-17 06:20:36 +08:00
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2008-10-08 05:26:09 +08:00
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#include <plat/devs.h>
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#include <plat/cpu.h>
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2008-10-30 18:14:38 +08:00
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#include <plat/regs-spi.h>
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2005-04-17 06:20:36 +08:00
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/* Serial port registrations */
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2006-06-19 06:04:05 +08:00
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static struct resource s3c2410_uart0_resource[] = {
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[0] = {
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.start = S3C2410_PA_UART0,
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.end = S3C2410_PA_UART0 + 0x3fff,
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.flags = IORESOURCE_MEM,
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},
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[1] = {
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.start = IRQ_S3CUART_RX0,
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.end = IRQ_S3CUART_ERR0,
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.flags = IORESOURCE_IRQ,
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}
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};
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static struct resource s3c2410_uart1_resource[] = {
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[0] = {
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.start = S3C2410_PA_UART1,
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.end = S3C2410_PA_UART1 + 0x3fff,
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.flags = IORESOURCE_MEM,
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},
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[1] = {
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.start = IRQ_S3CUART_RX1,
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.end = IRQ_S3CUART_ERR1,
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.flags = IORESOURCE_IRQ,
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}
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};
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static struct resource s3c2410_uart2_resource[] = {
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[0] = {
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.start = S3C2410_PA_UART2,
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.end = S3C2410_PA_UART2 + 0x3fff,
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.flags = IORESOURCE_MEM,
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},
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[1] = {
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.start = IRQ_S3CUART_RX2,
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.end = IRQ_S3CUART_ERR2,
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.flags = IORESOURCE_IRQ,
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}
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};
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2008-11-04 23:29:09 +08:00
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static struct resource s3c2410_uart3_resource[] = {
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[0] = {
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.start = S3C2443_PA_UART3,
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.end = S3C2443_PA_UART3 + 0x3fff,
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.flags = IORESOURCE_MEM,
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},
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[1] = {
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.start = IRQ_S3CUART_RX3,
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.end = IRQ_S3CUART_ERR3,
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.flags = IORESOURCE_IRQ,
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},
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};
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2006-06-19 06:04:05 +08:00
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struct s3c24xx_uart_resources s3c2410_uart_resources[] __initdata = {
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[0] = {
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.resources = s3c2410_uart0_resource,
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.nr_resources = ARRAY_SIZE(s3c2410_uart0_resource),
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},
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[1] = {
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.resources = s3c2410_uart1_resource,
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.nr_resources = ARRAY_SIZE(s3c2410_uart1_resource),
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},
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[2] = {
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.resources = s3c2410_uart2_resource,
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.nr_resources = ARRAY_SIZE(s3c2410_uart2_resource),
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},
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2008-11-04 23:29:09 +08:00
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[3] = {
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.resources = s3c2410_uart3_resource,
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.nr_resources = ARRAY_SIZE(s3c2410_uart3_resource),
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},
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2006-06-19 06:04:05 +08:00
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};
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/* yart devices */
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static struct platform_device s3c24xx_uart_device0 = {
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.id = 0,
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};
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static struct platform_device s3c24xx_uart_device1 = {
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.id = 1,
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};
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static struct platform_device s3c24xx_uart_device2 = {
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.id = 2,
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};
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2008-11-04 23:29:09 +08:00
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static struct platform_device s3c24xx_uart_device3 = {
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.id = 3,
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};
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struct platform_device *s3c24xx_uart_src[4] = {
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2006-06-19 06:04:05 +08:00
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&s3c24xx_uart_device0,
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&s3c24xx_uart_device1,
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&s3c24xx_uart_device2,
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2008-11-04 23:29:09 +08:00
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&s3c24xx_uart_device3,
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2006-06-19 06:04:05 +08:00
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};
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2008-11-04 23:29:09 +08:00
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struct platform_device *s3c24xx_uart_devs[4] = {
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2006-06-19 06:04:05 +08:00
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};
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2005-04-17 06:20:36 +08:00
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/* LCD Controller */
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static struct resource s3c_lcd_resource[] = {
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[0] = {
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2006-01-26 23:20:50 +08:00
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.start = S3C24XX_PA_LCD,
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.end = S3C24XX_PA_LCD + S3C24XX_SZ_LCD - 1,
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2005-04-17 06:20:36 +08:00
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.flags = IORESOURCE_MEM,
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},
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[1] = {
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.start = IRQ_LCD,
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.end = IRQ_LCD,
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.flags = IORESOURCE_IRQ,
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}
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};
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static u64 s3c_device_lcd_dmamask = 0xffffffffUL;
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struct platform_device s3c_device_lcd = {
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.name = "s3c2410-lcd",
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.id = -1,
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.num_resources = ARRAY_SIZE(s3c_lcd_resource),
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.resource = s3c_lcd_resource,
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.dev = {
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2005-06-29 18:09:15 +08:00
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.dma_mask = &s3c_device_lcd_dmamask,
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.coherent_dma_mask = 0xffffffffUL
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2005-04-17 06:20:36 +08:00
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}
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};
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EXPORT_SYMBOL(s3c_device_lcd);
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2005-10-28 22:31:45 +08:00
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void __init s3c24xx_fb_set_platdata(struct s3c2410fb_mach_info *pd)
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2005-09-10 04:10:10 +08:00
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{
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2005-10-28 22:31:45 +08:00
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struct s3c2410fb_mach_info *npd;
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npd = kmalloc(sizeof(*npd), GFP_KERNEL);
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if (npd) {
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memcpy(npd, pd, sizeof(*npd));
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s3c_device_lcd.dev.platform_data = npd;
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} else {
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printk(KERN_ERR "no memory for LCD platform data\n");
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}
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2005-09-10 04:10:10 +08:00
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}
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2005-04-17 06:20:36 +08:00
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/* NAND Controller */
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static struct resource s3c_nand_resource[] = {
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[0] = {
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2008-10-21 21:06:26 +08:00
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.start = S3C24XX_PA_NAND,
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.end = S3C24XX_PA_NAND + S3C24XX_SZ_NAND - 1,
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2005-04-17 06:20:36 +08:00
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.flags = IORESOURCE_MEM,
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}
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};
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struct platform_device s3c_device_nand = {
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.name = "s3c2410-nand",
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.id = -1,
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.num_resources = ARRAY_SIZE(s3c_nand_resource),
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.resource = s3c_nand_resource,
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};
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EXPORT_SYMBOL(s3c_device_nand);
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/* USB Device (Gadget)*/
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static struct resource s3c_usbgadget_resource[] = {
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[0] = {
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2006-01-26 23:20:50 +08:00
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.start = S3C24XX_PA_USBDEV,
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.end = S3C24XX_PA_USBDEV + S3C24XX_SZ_USBDEV - 1,
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2005-04-17 06:20:36 +08:00
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.flags = IORESOURCE_MEM,
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},
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[1] = {
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.start = IRQ_USBD,
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.end = IRQ_USBD,
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.flags = IORESOURCE_IRQ,
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}
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};
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struct platform_device s3c_device_usbgadget = {
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.name = "s3c2410-usbgadget",
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.id = -1,
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.num_resources = ARRAY_SIZE(s3c_usbgadget_resource),
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.resource = s3c_usbgadget_resource,
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};
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EXPORT_SYMBOL(s3c_device_usbgadget);
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2007-02-13 07:18:33 +08:00
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void __init s3c24xx_udc_set_platdata(struct s3c2410_udc_mach_info *pd)
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{
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struct s3c2410_udc_mach_info *npd;
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npd = kmalloc(sizeof(*npd), GFP_KERNEL);
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if (npd) {
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memcpy(npd, pd, sizeof(*npd));
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s3c_device_usbgadget.dev.platform_data = npd;
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} else {
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printk(KERN_ERR "no memory for udc platform data\n");
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}
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}
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2005-04-17 06:20:36 +08:00
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/* Watchdog */
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static struct resource s3c_wdt_resource[] = {
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[0] = {
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2006-01-26 23:20:50 +08:00
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.start = S3C24XX_PA_WATCHDOG,
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.end = S3C24XX_PA_WATCHDOG + S3C24XX_SZ_WATCHDOG - 1,
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2005-04-17 06:20:36 +08:00
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.flags = IORESOURCE_MEM,
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},
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[1] = {
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.start = IRQ_WDT,
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.end = IRQ_WDT,
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.flags = IORESOURCE_IRQ,
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}
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};
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struct platform_device s3c_device_wdt = {
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.name = "s3c2410-wdt",
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.id = -1,
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.num_resources = ARRAY_SIZE(s3c_wdt_resource),
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.resource = s3c_wdt_resource,
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};
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EXPORT_SYMBOL(s3c_device_wdt);
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/* IIS */
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static struct resource s3c_iis_resource[] = {
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[0] = {
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2006-01-26 23:20:50 +08:00
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.start = S3C24XX_PA_IIS,
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.end = S3C24XX_PA_IIS + S3C24XX_SZ_IIS -1,
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2005-04-17 06:20:36 +08:00
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.flags = IORESOURCE_MEM,
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}
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};
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static u64 s3c_device_iis_dmamask = 0xffffffffUL;
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struct platform_device s3c_device_iis = {
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.name = "s3c2410-iis",
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.id = -1,
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.num_resources = ARRAY_SIZE(s3c_iis_resource),
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.resource = s3c_iis_resource,
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.dev = {
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.dma_mask = &s3c_device_iis_dmamask,
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.coherent_dma_mask = 0xffffffffUL
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}
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};
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EXPORT_SYMBOL(s3c_device_iis);
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/* RTC */
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static struct resource s3c_rtc_resource[] = {
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[0] = {
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2006-01-26 23:20:50 +08:00
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.start = S3C24XX_PA_RTC,
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.end = S3C24XX_PA_RTC + 0xff,
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2005-04-17 06:20:36 +08:00
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.flags = IORESOURCE_MEM,
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},
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[1] = {
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.start = IRQ_RTC,
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.end = IRQ_RTC,
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.flags = IORESOURCE_IRQ,
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},
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[2] = {
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.start = IRQ_TICK,
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.end = IRQ_TICK,
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.flags = IORESOURCE_IRQ
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}
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};
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struct platform_device s3c_device_rtc = {
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.name = "s3c2410-rtc",
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.id = -1,
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.num_resources = ARRAY_SIZE(s3c_rtc_resource),
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.resource = s3c_rtc_resource,
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};
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EXPORT_SYMBOL(s3c_device_rtc);
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/* ADC */
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static struct resource s3c_adc_resource[] = {
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[0] = {
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2006-01-26 23:20:50 +08:00
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.start = S3C24XX_PA_ADC,
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.end = S3C24XX_PA_ADC + S3C24XX_SZ_ADC - 1,
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2005-04-17 06:20:36 +08:00
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.flags = IORESOURCE_MEM,
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},
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[1] = {
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.start = IRQ_TC,
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2006-02-09 06:03:31 +08:00
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.end = IRQ_TC,
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.flags = IORESOURCE_IRQ,
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},
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[2] = {
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.start = IRQ_ADC,
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2005-04-17 06:20:36 +08:00
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.end = IRQ_ADC,
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.flags = IORESOURCE_IRQ,
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|
|
|
}
|
|
|
|
|
|
|
|
};
|
|
|
|
|
|
|
|
struct platform_device s3c_device_adc = {
|
2008-12-18 22:20:04 +08:00
|
|
|
.name = "s3c24xx-adc",
|
2005-04-17 06:20:36 +08:00
|
|
|
.id = -1,
|
|
|
|
.num_resources = ARRAY_SIZE(s3c_adc_resource),
|
|
|
|
.resource = s3c_adc_resource,
|
|
|
|
};
|
|
|
|
|
2008-12-18 22:20:04 +08:00
|
|
|
/* HWMON */
|
|
|
|
|
|
|
|
struct platform_device s3c_device_hwmon = {
|
|
|
|
.name = "s3c24xx-hwmon",
|
|
|
|
.id = -1,
|
|
|
|
.dev.parent = &s3c_device_adc.dev,
|
|
|
|
};
|
|
|
|
|
2005-04-17 06:20:36 +08:00
|
|
|
/* SDI */
|
|
|
|
|
|
|
|
static struct resource s3c_sdi_resource[] = {
|
|
|
|
[0] = {
|
2008-10-21 21:06:26 +08:00
|
|
|
.start = S3C24XX_PA_SDI,
|
|
|
|
.end = S3C24XX_PA_SDI + S3C24XX_SZ_SDI - 1,
|
2005-04-17 06:20:36 +08:00
|
|
|
.flags = IORESOURCE_MEM,
|
|
|
|
},
|
|
|
|
[1] = {
|
|
|
|
.start = IRQ_SDI,
|
|
|
|
.end = IRQ_SDI,
|
|
|
|
.flags = IORESOURCE_IRQ,
|
|
|
|
}
|
|
|
|
|
|
|
|
};
|
|
|
|
|
|
|
|
struct platform_device s3c_device_sdi = {
|
|
|
|
.name = "s3c2410-sdi",
|
|
|
|
.id = -1,
|
|
|
|
.num_resources = ARRAY_SIZE(s3c_sdi_resource),
|
|
|
|
.resource = s3c_sdi_resource,
|
|
|
|
};
|
|
|
|
|
|
|
|
EXPORT_SYMBOL(s3c_device_sdi);
|
|
|
|
|
|
|
|
/* SPI (0) */
|
|
|
|
|
|
|
|
static struct resource s3c_spi0_resource[] = {
|
|
|
|
[0] = {
|
2006-01-26 23:20:50 +08:00
|
|
|
.start = S3C24XX_PA_SPI,
|
|
|
|
.end = S3C24XX_PA_SPI + 0x1f,
|
2005-04-17 06:20:36 +08:00
|
|
|
.flags = IORESOURCE_MEM,
|
|
|
|
},
|
|
|
|
[1] = {
|
|
|
|
.start = IRQ_SPI0,
|
|
|
|
.end = IRQ_SPI0,
|
|
|
|
.flags = IORESOURCE_IRQ,
|
|
|
|
}
|
|
|
|
|
|
|
|
};
|
|
|
|
|
2006-03-16 00:03:05 +08:00
|
|
|
static u64 s3c_device_spi0_dmamask = 0xffffffffUL;
|
|
|
|
|
2005-04-17 06:20:36 +08:00
|
|
|
struct platform_device s3c_device_spi0 = {
|
|
|
|
.name = "s3c2410-spi",
|
|
|
|
.id = 0,
|
|
|
|
.num_resources = ARRAY_SIZE(s3c_spi0_resource),
|
|
|
|
.resource = s3c_spi0_resource,
|
2006-03-16 00:03:05 +08:00
|
|
|
.dev = {
|
|
|
|
.dma_mask = &s3c_device_spi0_dmamask,
|
|
|
|
.coherent_dma_mask = 0xffffffffUL
|
|
|
|
}
|
2005-04-17 06:20:36 +08:00
|
|
|
};
|
|
|
|
|
|
|
|
EXPORT_SYMBOL(s3c_device_spi0);
|
|
|
|
|
|
|
|
/* SPI (1) */
|
|
|
|
|
|
|
|
static struct resource s3c_spi1_resource[] = {
|
|
|
|
[0] = {
|
2007-05-16 17:51:45 +08:00
|
|
|
.start = S3C24XX_PA_SPI + S3C2410_SPI1,
|
|
|
|
.end = S3C24XX_PA_SPI + S3C2410_SPI1 + 0x1f,
|
2005-04-17 06:20:36 +08:00
|
|
|
.flags = IORESOURCE_MEM,
|
|
|
|
},
|
|
|
|
[1] = {
|
|
|
|
.start = IRQ_SPI1,
|
|
|
|
.end = IRQ_SPI1,
|
|
|
|
.flags = IORESOURCE_IRQ,
|
|
|
|
}
|
|
|
|
|
|
|
|
};
|
|
|
|
|
2006-03-16 00:03:05 +08:00
|
|
|
static u64 s3c_device_spi1_dmamask = 0xffffffffUL;
|
|
|
|
|
2005-04-17 06:20:36 +08:00
|
|
|
struct platform_device s3c_device_spi1 = {
|
|
|
|
.name = "s3c2410-spi",
|
|
|
|
.id = 1,
|
|
|
|
.num_resources = ARRAY_SIZE(s3c_spi1_resource),
|
|
|
|
.resource = s3c_spi1_resource,
|
2006-03-16 00:03:05 +08:00
|
|
|
.dev = {
|
|
|
|
.dma_mask = &s3c_device_spi1_dmamask,
|
|
|
|
.coherent_dma_mask = 0xffffffffUL
|
|
|
|
}
|
2005-04-17 06:20:36 +08:00
|
|
|
};
|
|
|
|
|
|
|
|
EXPORT_SYMBOL(s3c_device_spi1);
|
|
|
|
|
|
|
|
#ifdef CONFIG_CPU_S3C2440
|
|
|
|
|
|
|
|
/* Camif Controller */
|
|
|
|
|
|
|
|
static struct resource s3c_camif_resource[] = {
|
|
|
|
[0] = {
|
|
|
|
.start = S3C2440_PA_CAMIF,
|
2005-10-28 22:26:42 +08:00
|
|
|
.end = S3C2440_PA_CAMIF + S3C2440_SZ_CAMIF - 1,
|
2005-04-17 06:20:36 +08:00
|
|
|
.flags = IORESOURCE_MEM,
|
|
|
|
},
|
|
|
|
[1] = {
|
|
|
|
.start = IRQ_CAM,
|
|
|
|
.end = IRQ_CAM,
|
|
|
|
.flags = IORESOURCE_IRQ,
|
|
|
|
}
|
|
|
|
|
|
|
|
};
|
|
|
|
|
|
|
|
static u64 s3c_device_camif_dmamask = 0xffffffffUL;
|
|
|
|
|
|
|
|
struct platform_device s3c_device_camif = {
|
|
|
|
.name = "s3c2440-camif",
|
|
|
|
.id = -1,
|
|
|
|
.num_resources = ARRAY_SIZE(s3c_camif_resource),
|
|
|
|
.resource = s3c_camif_resource,
|
|
|
|
.dev = {
|
|
|
|
.dma_mask = &s3c_device_camif_dmamask,
|
|
|
|
.coherent_dma_mask = 0xffffffffUL
|
|
|
|
}
|
|
|
|
};
|
|
|
|
|
|
|
|
EXPORT_SYMBOL(s3c_device_camif);
|
|
|
|
|
|
|
|
#endif // CONFIG_CPU_S32440
|