2009-11-29 23:15:25 +08:00
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/****************************************************************************
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2013-08-30 06:32:48 +08:00
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* Driver for Solarflare network controllers and boards
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* Copyright 2008-2013 Solarflare Communications Inc.
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2009-11-29 23:15:25 +08:00
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License version 2 as published
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* by the Free Software Foundation, incorporated herein by reference.
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*/
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#include <linux/delay.h>
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2013-08-28 06:04:29 +08:00
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#include <asm/cmpxchg.h>
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2009-11-29 23:15:25 +08:00
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#include "net_driver.h"
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#include "nic.h"
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#include "io.h"
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2012-09-18 08:57:07 +08:00
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#include "farch_regs.h"
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2009-11-29 23:15:25 +08:00
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#include "mcdi_pcol.h"
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#include "phy.h"
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/**************************************************************************
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*
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* Management-Controller-to-Driver Interface
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*
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**************************************************************************
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*/
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2012-12-01 10:21:17 +08:00
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#define MCDI_RPC_TIMEOUT (10 * HZ)
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2009-11-29 23:15:25 +08:00
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2011-12-21 07:39:31 +08:00
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/* A reboot/assertion causes the MCDI status word to be set after the
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* command word is set or a REBOOT event is sent. If we notice a reboot
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2013-09-20 23:45:10 +08:00
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* via these mechanisms then wait 250ms for the status word to be set.
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2013-06-20 18:40:07 +08:00
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*/
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2011-12-21 07:39:31 +08:00
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#define MCDI_STATUS_DELAY_US 100
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2013-09-20 23:45:10 +08:00
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#define MCDI_STATUS_DELAY_COUNT 2500
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2011-12-21 07:39:31 +08:00
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#define MCDI_STATUS_SLEEP_MS \
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(MCDI_STATUS_DELAY_US * MCDI_STATUS_DELAY_COUNT / 1000)
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2009-11-29 23:15:25 +08:00
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#define SEQ_MASK \
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EFX_MASK32(EFX_WIDTH(MCDI_HEADER_SEQ))
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2013-08-28 06:12:31 +08:00
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struct efx_mcdi_async_param {
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struct list_head list;
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unsigned int cmd;
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size_t inlen;
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size_t outlen;
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2013-06-01 01:36:12 +08:00
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bool quiet;
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2013-08-28 06:12:31 +08:00
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efx_mcdi_async_completer *complete;
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unsigned long cookie;
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/* followed by request/response buffer */
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};
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static void efx_mcdi_timeout_async(unsigned long context);
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2013-08-30 02:04:03 +08:00
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static int efx_mcdi_drv_attach(struct efx_nic *efx, bool driver_operating,
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bool *was_attached_out);
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2013-10-09 18:52:43 +08:00
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static bool efx_mcdi_poll_once(struct efx_nic *efx);
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sfc:On MCDI timeout, issue an FLR (and mark MCDI to fail-fast)
When an MCDI command times out (whether or not we find it
completed when we poll), call efx_mcdi_abandon(), which tells
all subsequent MCDI calls to fail-fast, and queues up an FLR.
Because an FLR doesn't lead to receiving any reboot even from
the MC (unlike most other types of reset), we have to call
efx_ef10_reset_mc_allocations.
In efx_start_all(), if a reset (of any kind) is pending, we
bail out.
Without this, attempts to reconfigure (e.g. change mtu) can
cause driver/mc state inconsistency if the first MCDI call
triggers an FLR.
For similar reasons, on EF10, in
efx_reset_down(method=RESET_TYPE_MCDI_TIMEOUT), set the number
of active queues to zero before calling efx_stop_all().
And, on farch, in efx_reset_up(method=RESET_TYPE_MCDI_TIMEOUT),
set active_queues and flushes pending & outstanding to zero.
efx_mcdi_mode_{poll,event}() should not take us out of fail-fast
mode. Instead, this is done by efx_mcdi_reset() after the FLR
completes.
The new FLR reset_type RESET_TYPE_MCDI_TIMEOUT doesn't really
fit into the hierarchy of reset 'scopes' whereby efx_reset()
decides some resets subsume others. Thus, it uses separate logic.
Also, fixed up some inconsistency around RESET_TYPE_MC_BIST,
which was in the wrong place in that hierarchy.
Signed-off-by: Shradha Shah <sshah@solarflare.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2014-04-17 02:27:48 +08:00
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static void efx_mcdi_abandon(struct efx_nic *efx);
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2009-11-29 23:15:25 +08:00
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2012-09-18 09:33:55 +08:00
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int efx_mcdi_init(struct efx_nic *efx)
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2009-11-29 23:15:25 +08:00
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{
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struct efx_mcdi_iface *mcdi;
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2013-08-30 02:04:03 +08:00
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bool already_attached;
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int rc;
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2009-11-29 23:15:25 +08:00
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2012-09-18 09:33:56 +08:00
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efx->mcdi = kzalloc(sizeof(*efx->mcdi), GFP_KERNEL);
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if (!efx->mcdi)
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return -ENOMEM;
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2009-11-29 23:15:25 +08:00
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mcdi = efx_mcdi(efx);
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2013-08-28 06:12:31 +08:00
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mcdi->efx = efx;
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2009-11-29 23:15:25 +08:00
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init_waitqueue_head(&mcdi->wq);
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spin_lock_init(&mcdi->iface_lock);
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2013-08-28 06:04:29 +08:00
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mcdi->state = MCDI_STATE_QUIESCENT;
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2009-11-29 23:15:25 +08:00
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mcdi->mode = MCDI_MODE_POLL;
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2013-08-28 06:12:31 +08:00
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spin_lock_init(&mcdi->async_lock);
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INIT_LIST_HEAD(&mcdi->async_list);
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setup_timer(&mcdi->async_timer, efx_mcdi_timeout_async,
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(unsigned long)mcdi);
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2009-11-29 23:15:25 +08:00
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(void) efx_mcdi_poll_reboot(efx);
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2013-06-20 18:40:07 +08:00
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mcdi->new_epoch = true;
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2012-09-18 09:33:55 +08:00
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/* Recover from a failed assertion before probing */
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2013-08-30 02:04:03 +08:00
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rc = efx_mcdi_handle_assertion(efx);
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if (rc)
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return rc;
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/* Let the MC (and BMC, if this is a LOM) know that the driver
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* is loaded. We should do this before we reset the NIC.
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*/
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rc = efx_mcdi_drv_attach(efx, true, &already_attached);
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if (rc) {
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netif_err(efx, probe, efx->net_dev,
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"Unable to register driver with MCPU\n");
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return rc;
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}
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if (already_attached)
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/* Not a fatal error */
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netif_err(efx, probe, efx->net_dev,
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"Host already registered with MCPU\n");
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2013-10-19 02:21:45 +08:00
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if (efx->mcdi->fn_flags &
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(1 << MC_CMD_DRV_ATTACH_EXT_OUT_FLAG_PRIMARY))
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efx->primary = efx;
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2013-08-30 02:04:03 +08:00
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return 0;
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2009-11-29 23:15:25 +08:00
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}
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2012-09-18 09:33:56 +08:00
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void efx_mcdi_fini(struct efx_nic *efx)
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{
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2013-08-30 02:04:03 +08:00
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if (!efx->mcdi)
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return;
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BUG_ON(efx->mcdi->iface.state != MCDI_STATE_QUIESCENT);
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/* Relinquish the device (back to the BMC, if this is a LOM) */
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efx_mcdi_drv_attach(efx, false, NULL);
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2012-09-18 09:33:56 +08:00
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kfree(efx->mcdi);
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}
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2013-08-23 05:06:09 +08:00
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static void efx_mcdi_send_request(struct efx_nic *efx, unsigned cmd,
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const efx_dword_t *inbuf, size_t inlen)
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2009-11-29 23:15:25 +08:00
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{
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struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
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2012-09-19 07:56:18 +08:00
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efx_dword_t hdr[2];
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size_t hdr_len;
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2009-11-29 23:15:25 +08:00
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u32 xflags, seqno;
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2013-08-28 06:04:29 +08:00
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BUG_ON(mcdi->state == MCDI_STATE_QUIESCENT);
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2009-11-29 23:15:25 +08:00
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2013-08-23 05:06:09 +08:00
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/* Serialise with efx_mcdi_ev_cpl() and efx_mcdi_ev_death() */
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spin_lock_bh(&mcdi->iface_lock);
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++mcdi->seqno;
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spin_unlock_bh(&mcdi->iface_lock);
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2009-11-29 23:15:25 +08:00
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seqno = mcdi->seqno & SEQ_MASK;
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xflags = 0;
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if (mcdi->mode == MCDI_MODE_EVENTS)
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xflags |= MCDI_HEADER_XFLAGS_EVREQ;
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2012-09-19 07:56:18 +08:00
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if (efx->type->mcdi_max_ver == 1) {
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/* MCDI v1 */
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2013-06-20 18:40:07 +08:00
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EFX_POPULATE_DWORD_7(hdr[0],
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2012-09-19 07:56:18 +08:00
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MCDI_HEADER_RESPONSE, 0,
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MCDI_HEADER_RESYNC, 1,
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MCDI_HEADER_CODE, cmd,
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MCDI_HEADER_DATALEN, inlen,
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MCDI_HEADER_SEQ, seqno,
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2013-06-20 18:40:07 +08:00
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MCDI_HEADER_XFLAGS, xflags,
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MCDI_HEADER_NOT_EPOCH, !mcdi->new_epoch);
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2012-09-19 07:56:18 +08:00
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hdr_len = 4;
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} else {
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/* MCDI v2 */
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BUG_ON(inlen > MCDI_CTL_SDU_LEN_MAX_V2);
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2013-06-20 18:40:07 +08:00
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EFX_POPULATE_DWORD_7(hdr[0],
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2012-09-19 07:56:18 +08:00
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MCDI_HEADER_RESPONSE, 0,
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MCDI_HEADER_RESYNC, 1,
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MCDI_HEADER_CODE, MC_CMD_V2_EXTN,
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MCDI_HEADER_DATALEN, 0,
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MCDI_HEADER_SEQ, seqno,
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2013-06-20 18:40:07 +08:00
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MCDI_HEADER_XFLAGS, xflags,
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MCDI_HEADER_NOT_EPOCH, !mcdi->new_epoch);
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2012-09-19 07:56:18 +08:00
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EFX_POPULATE_DWORD_2(hdr[1],
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MC_CMD_V2_EXTN_IN_EXTENDED_CMD, cmd,
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MC_CMD_V2_EXTN_IN_ACTUAL_LEN, inlen);
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hdr_len = 8;
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}
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2009-11-29 23:15:25 +08:00
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2012-09-19 07:56:18 +08:00
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efx->type->mcdi_request(efx, hdr, hdr_len, inbuf, inlen);
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2013-08-23 05:06:09 +08:00
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mcdi->new_epoch = false;
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2009-11-29 23:15:25 +08:00
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}
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2012-10-09 04:43:00 +08:00
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static int efx_mcdi_errno(unsigned int mcdi_err)
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{
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switch (mcdi_err) {
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case 0:
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return 0;
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#define TRANSLATE_ERROR(name) \
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case MC_CMD_ERR_ ## name: \
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return -name;
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2012-09-19 07:56:18 +08:00
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TRANSLATE_ERROR(EPERM);
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2012-10-09 04:43:00 +08:00
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TRANSLATE_ERROR(ENOENT);
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TRANSLATE_ERROR(EINTR);
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2012-09-19 07:56:18 +08:00
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TRANSLATE_ERROR(EAGAIN);
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2012-10-09 04:43:00 +08:00
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TRANSLATE_ERROR(EACCES);
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TRANSLATE_ERROR(EBUSY);
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TRANSLATE_ERROR(EINVAL);
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TRANSLATE_ERROR(EDEADLK);
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TRANSLATE_ERROR(ENOSYS);
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TRANSLATE_ERROR(ETIME);
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2012-09-19 07:56:18 +08:00
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TRANSLATE_ERROR(EALREADY);
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TRANSLATE_ERROR(ENOSPC);
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2012-10-09 04:43:00 +08:00
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#undef TRANSLATE_ERROR
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2013-10-08 23:36:58 +08:00
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case MC_CMD_ERR_ENOTSUP:
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return -EOPNOTSUPP;
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2012-09-19 07:56:18 +08:00
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case MC_CMD_ERR_ALLOC_FAIL:
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return -ENOBUFS;
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case MC_CMD_ERR_MAC_EXIST:
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return -EADDRINUSE;
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2012-10-09 04:43:00 +08:00
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default:
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2012-09-19 07:56:18 +08:00
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return -EPROTO;
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}
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}
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static void efx_mcdi_read_response_header(struct efx_nic *efx)
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{
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struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
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unsigned int respseq, respcmd, error;
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efx_dword_t hdr;
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efx->type->mcdi_read_response(efx, &hdr, 0, 4);
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respseq = EFX_DWORD_FIELD(hdr, MCDI_HEADER_SEQ);
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respcmd = EFX_DWORD_FIELD(hdr, MCDI_HEADER_CODE);
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error = EFX_DWORD_FIELD(hdr, MCDI_HEADER_ERROR);
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if (respcmd != MC_CMD_V2_EXTN) {
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mcdi->resp_hdr_len = 4;
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mcdi->resp_data_len = EFX_DWORD_FIELD(hdr, MCDI_HEADER_DATALEN);
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} else {
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efx->type->mcdi_read_response(efx, &hdr, 4, 4);
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mcdi->resp_hdr_len = 8;
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mcdi->resp_data_len =
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EFX_DWORD_FIELD(hdr, MC_CMD_V2_EXTN_IN_ACTUAL_LEN);
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}
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if (error && mcdi->resp_data_len == 0) {
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netif_err(efx, hw, efx->net_dev, "MC rebooted\n");
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mcdi->resprc = -EIO;
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} else if ((respseq ^ mcdi->seqno) & SEQ_MASK) {
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netif_err(efx, hw, efx->net_dev,
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"MC response mismatch tx seq 0x%x rx seq 0x%x\n",
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respseq, mcdi->seqno);
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mcdi->resprc = -EIO;
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} else if (error) {
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efx->type->mcdi_read_response(efx, &hdr, mcdi->resp_hdr_len, 4);
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mcdi->resprc =
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efx_mcdi_errno(EFX_DWORD_FIELD(hdr, EFX_DWORD_0));
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} else {
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mcdi->resprc = 0;
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2012-10-09 04:43:00 +08:00
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}
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}
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2013-10-09 18:52:43 +08:00
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static bool efx_mcdi_poll_once(struct efx_nic *efx)
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{
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struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
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rmb();
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if (!efx->type->mcdi_poll_response(efx))
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return false;
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spin_lock_bh(&mcdi->iface_lock);
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efx_mcdi_read_response_header(efx);
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spin_unlock_bh(&mcdi->iface_lock);
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return true;
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}
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2009-11-29 23:15:25 +08:00
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static int efx_mcdi_poll(struct efx_nic *efx)
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{
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struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
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2012-12-01 10:21:17 +08:00
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unsigned long time, finish;
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2012-10-09 04:43:00 +08:00
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unsigned int spins;
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int rc;
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2009-11-29 23:15:25 +08:00
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/* Check for a reboot atomically with respect to efx_mcdi_copyout() */
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2012-10-09 04:43:00 +08:00
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rc = efx_mcdi_poll_reboot(efx);
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2012-09-19 07:56:18 +08:00
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if (rc) {
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2012-10-27 00:53:12 +08:00
|
|
|
spin_lock_bh(&mcdi->iface_lock);
|
2012-09-19 07:56:18 +08:00
|
|
|
mcdi->resprc = rc;
|
|
|
|
mcdi->resp_hdr_len = 0;
|
|
|
|
mcdi->resp_data_len = 0;
|
2012-10-27 00:53:12 +08:00
|
|
|
spin_unlock_bh(&mcdi->iface_lock);
|
2012-09-19 07:56:18 +08:00
|
|
|
return 0;
|
|
|
|
}
|
2009-11-29 23:15:25 +08:00
|
|
|
|
|
|
|
/* Poll for completion. Poll quickly (once a us) for the 1st jiffy,
|
|
|
|
* because generally mcdi responses are fast. After that, back off
|
|
|
|
* and poll once a jiffy (approximately)
|
|
|
|
*/
|
|
|
|
spins = TICK_USEC;
|
2012-12-01 10:21:17 +08:00
|
|
|
finish = jiffies + MCDI_RPC_TIMEOUT;
|
2009-11-29 23:15:25 +08:00
|
|
|
|
|
|
|
while (1) {
|
|
|
|
if (spins != 0) {
|
|
|
|
--spins;
|
|
|
|
udelay(1);
|
2010-01-13 12:34:25 +08:00
|
|
|
} else {
|
|
|
|
schedule_timeout_uninterruptible(1);
|
|
|
|
}
|
2009-11-29 23:15:25 +08:00
|
|
|
|
2012-12-01 10:21:17 +08:00
|
|
|
time = jiffies;
|
2009-11-29 23:15:25 +08:00
|
|
|
|
2013-10-09 18:52:43 +08:00
|
|
|
if (efx_mcdi_poll_once(efx))
|
2009-11-29 23:15:25 +08:00
|
|
|
break;
|
|
|
|
|
2012-12-01 10:21:17 +08:00
|
|
|
if (time_after(time, finish))
|
2009-11-29 23:15:25 +08:00
|
|
|
return -ETIMEDOUT;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Return rc=0 like wait_event_timeout() */
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2012-10-02 03:58:35 +08:00
|
|
|
/* Test and clear MC-rebooted flag for this port/function; reset
|
|
|
|
* software state as necessary.
|
|
|
|
*/
|
2009-11-29 23:15:25 +08:00
|
|
|
int efx_mcdi_poll_reboot(struct efx_nic *efx)
|
|
|
|
{
|
2012-09-18 09:33:56 +08:00
|
|
|
if (!efx->mcdi)
|
|
|
|
return 0;
|
2009-11-29 23:15:25 +08:00
|
|
|
|
2012-12-15 05:52:56 +08:00
|
|
|
return efx->type->mcdi_poll_reboot(efx);
|
2009-11-29 23:15:25 +08:00
|
|
|
}
|
|
|
|
|
2013-08-28 06:12:31 +08:00
|
|
|
static bool efx_mcdi_acquire_async(struct efx_mcdi_iface *mcdi)
|
|
|
|
{
|
|
|
|
return cmpxchg(&mcdi->state,
|
|
|
|
MCDI_STATE_QUIESCENT, MCDI_STATE_RUNNING_ASYNC) ==
|
|
|
|
MCDI_STATE_QUIESCENT;
|
|
|
|
}
|
|
|
|
|
|
|
|
static void efx_mcdi_acquire_sync(struct efx_mcdi_iface *mcdi)
|
2009-11-29 23:15:25 +08:00
|
|
|
{
|
|
|
|
/* Wait until the interface becomes QUIESCENT and we win the race
|
2013-08-28 06:12:31 +08:00
|
|
|
* to mark it RUNNING_SYNC.
|
|
|
|
*/
|
2009-11-29 23:15:25 +08:00
|
|
|
wait_event(mcdi->wq,
|
2013-08-28 06:04:29 +08:00
|
|
|
cmpxchg(&mcdi->state,
|
2013-08-28 06:12:31 +08:00
|
|
|
MCDI_STATE_QUIESCENT, MCDI_STATE_RUNNING_SYNC) ==
|
2013-08-28 06:04:29 +08:00
|
|
|
MCDI_STATE_QUIESCENT);
|
2009-11-29 23:15:25 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
static int efx_mcdi_await_completion(struct efx_nic *efx)
|
|
|
|
{
|
|
|
|
struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
|
|
|
|
|
2013-08-28 06:04:29 +08:00
|
|
|
if (wait_event_timeout(mcdi->wq, mcdi->state == MCDI_STATE_COMPLETED,
|
|
|
|
MCDI_RPC_TIMEOUT) == 0)
|
2009-11-29 23:15:25 +08:00
|
|
|
return -ETIMEDOUT;
|
|
|
|
|
|
|
|
/* Check if efx_mcdi_set_mode() switched us back to polled completions.
|
|
|
|
* In which case, poll for completions directly. If efx_mcdi_ev_cpl()
|
|
|
|
* completed the request first, then we'll just end up completing the
|
|
|
|
* request again, which is safe.
|
|
|
|
*
|
|
|
|
* We need an smp_rmb() to synchronise with efx_mcdi_mode_poll(), which
|
|
|
|
* wait_event_timeout() implicitly provides.
|
|
|
|
*/
|
|
|
|
if (mcdi->mode == MCDI_MODE_POLL)
|
|
|
|
return efx_mcdi_poll(efx);
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2013-08-28 06:12:31 +08:00
|
|
|
/* If the interface is RUNNING_SYNC, switch to COMPLETED and wake the
|
|
|
|
* requester. Return whether this was done. Does not take any locks.
|
|
|
|
*/
|
|
|
|
static bool efx_mcdi_complete_sync(struct efx_mcdi_iface *mcdi)
|
2009-11-29 23:15:25 +08:00
|
|
|
{
|
2013-08-28 06:12:31 +08:00
|
|
|
if (cmpxchg(&mcdi->state,
|
|
|
|
MCDI_STATE_RUNNING_SYNC, MCDI_STATE_COMPLETED) ==
|
|
|
|
MCDI_STATE_RUNNING_SYNC) {
|
2009-11-29 23:15:25 +08:00
|
|
|
wake_up(&mcdi->wq);
|
|
|
|
return true;
|
|
|
|
}
|
|
|
|
|
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
|
|
|
static void efx_mcdi_release(struct efx_mcdi_iface *mcdi)
|
|
|
|
{
|
2013-08-28 06:12:31 +08:00
|
|
|
if (mcdi->mode == MCDI_MODE_EVENTS) {
|
|
|
|
struct efx_mcdi_async_param *async;
|
|
|
|
struct efx_nic *efx = mcdi->efx;
|
|
|
|
|
|
|
|
/* Process the asynchronous request queue */
|
|
|
|
spin_lock_bh(&mcdi->async_lock);
|
|
|
|
async = list_first_entry_or_null(
|
|
|
|
&mcdi->async_list, struct efx_mcdi_async_param, list);
|
|
|
|
if (async) {
|
|
|
|
mcdi->state = MCDI_STATE_RUNNING_ASYNC;
|
|
|
|
efx_mcdi_send_request(efx, async->cmd,
|
|
|
|
(const efx_dword_t *)(async + 1),
|
|
|
|
async->inlen);
|
|
|
|
mod_timer(&mcdi->async_timer,
|
|
|
|
jiffies + MCDI_RPC_TIMEOUT);
|
|
|
|
}
|
|
|
|
spin_unlock_bh(&mcdi->async_lock);
|
|
|
|
|
|
|
|
if (async)
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
2013-08-28 06:04:29 +08:00
|
|
|
mcdi->state = MCDI_STATE_QUIESCENT;
|
2009-11-29 23:15:25 +08:00
|
|
|
wake_up(&mcdi->wq);
|
|
|
|
}
|
|
|
|
|
2013-08-28 06:12:31 +08:00
|
|
|
/* If the interface is RUNNING_ASYNC, switch to COMPLETED, call the
|
|
|
|
* asynchronous completion function, and release the interface.
|
|
|
|
* Return whether this was done. Must be called in bh-disabled
|
|
|
|
* context. Will take iface_lock and async_lock.
|
|
|
|
*/
|
|
|
|
static bool efx_mcdi_complete_async(struct efx_mcdi_iface *mcdi, bool timeout)
|
|
|
|
{
|
|
|
|
struct efx_nic *efx = mcdi->efx;
|
|
|
|
struct efx_mcdi_async_param *async;
|
2013-06-01 01:36:12 +08:00
|
|
|
size_t hdr_len, data_len, err_len;
|
2013-08-28 06:12:31 +08:00
|
|
|
efx_dword_t *outbuf;
|
2013-06-01 01:36:12 +08:00
|
|
|
MCDI_DECLARE_BUF_OUT_OR_ERR(errbuf, 0);
|
2013-08-28 06:12:31 +08:00
|
|
|
int rc;
|
|
|
|
|
|
|
|
if (cmpxchg(&mcdi->state,
|
|
|
|
MCDI_STATE_RUNNING_ASYNC, MCDI_STATE_COMPLETED) !=
|
|
|
|
MCDI_STATE_RUNNING_ASYNC)
|
|
|
|
return false;
|
|
|
|
|
|
|
|
spin_lock(&mcdi->iface_lock);
|
|
|
|
if (timeout) {
|
|
|
|
/* Ensure that if the completion event arrives later,
|
|
|
|
* the seqno check in efx_mcdi_ev_cpl() will fail
|
|
|
|
*/
|
|
|
|
++mcdi->seqno;
|
|
|
|
++mcdi->credits;
|
|
|
|
rc = -ETIMEDOUT;
|
|
|
|
hdr_len = 0;
|
|
|
|
data_len = 0;
|
|
|
|
} else {
|
|
|
|
rc = mcdi->resprc;
|
|
|
|
hdr_len = mcdi->resp_hdr_len;
|
|
|
|
data_len = mcdi->resp_data_len;
|
|
|
|
}
|
|
|
|
spin_unlock(&mcdi->iface_lock);
|
|
|
|
|
|
|
|
/* Stop the timer. In case the timer function is running, we
|
|
|
|
* must wait for it to return so that there is no possibility
|
|
|
|
* of it aborting the next request.
|
|
|
|
*/
|
|
|
|
if (!timeout)
|
|
|
|
del_timer_sync(&mcdi->async_timer);
|
|
|
|
|
|
|
|
spin_lock(&mcdi->async_lock);
|
|
|
|
async = list_first_entry(&mcdi->async_list,
|
|
|
|
struct efx_mcdi_async_param, list);
|
|
|
|
list_del(&async->list);
|
|
|
|
spin_unlock(&mcdi->async_lock);
|
|
|
|
|
|
|
|
outbuf = (efx_dword_t *)(async + 1);
|
|
|
|
efx->type->mcdi_read_response(efx, outbuf, hdr_len,
|
|
|
|
min(async->outlen, data_len));
|
2013-06-01 01:36:12 +08:00
|
|
|
if (!timeout && rc && !async->quiet) {
|
|
|
|
err_len = min(sizeof(errbuf), data_len);
|
|
|
|
efx->type->mcdi_read_response(efx, errbuf, hdr_len,
|
|
|
|
sizeof(errbuf));
|
|
|
|
efx_mcdi_display_error(efx, async->cmd, async->inlen, errbuf,
|
|
|
|
err_len, rc);
|
|
|
|
}
|
2013-08-28 06:12:31 +08:00
|
|
|
async->complete(efx, async->cookie, rc, outbuf, data_len);
|
|
|
|
kfree(async);
|
|
|
|
|
|
|
|
efx_mcdi_release(mcdi);
|
|
|
|
|
|
|
|
return true;
|
|
|
|
}
|
|
|
|
|
2009-11-29 23:15:25 +08:00
|
|
|
static void efx_mcdi_ev_cpl(struct efx_nic *efx, unsigned int seqno,
|
2012-10-09 04:43:00 +08:00
|
|
|
unsigned int datalen, unsigned int mcdi_err)
|
2009-11-29 23:15:25 +08:00
|
|
|
{
|
|
|
|
struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
|
|
|
|
bool wake = false;
|
|
|
|
|
|
|
|
spin_lock(&mcdi->iface_lock);
|
|
|
|
|
|
|
|
if ((seqno ^ mcdi->seqno) & SEQ_MASK) {
|
|
|
|
if (mcdi->credits)
|
|
|
|
/* The request has been cancelled */
|
|
|
|
--mcdi->credits;
|
|
|
|
else
|
2010-06-23 19:30:07 +08:00
|
|
|
netif_err(efx, hw, efx->net_dev,
|
|
|
|
"MC response mismatch tx seq 0x%x rx "
|
|
|
|
"seq 0x%x\n", seqno, mcdi->seqno);
|
2009-11-29 23:15:25 +08:00
|
|
|
} else {
|
2012-09-19 07:56:18 +08:00
|
|
|
if (efx->type->mcdi_max_ver >= 2) {
|
|
|
|
/* MCDI v2 responses don't fit in an event */
|
|
|
|
efx_mcdi_read_response_header(efx);
|
|
|
|
} else {
|
|
|
|
mcdi->resprc = efx_mcdi_errno(mcdi_err);
|
|
|
|
mcdi->resp_hdr_len = 4;
|
|
|
|
mcdi->resp_data_len = datalen;
|
|
|
|
}
|
2009-11-29 23:15:25 +08:00
|
|
|
|
|
|
|
wake = true;
|
|
|
|
}
|
|
|
|
|
|
|
|
spin_unlock(&mcdi->iface_lock);
|
|
|
|
|
2013-08-28 06:12:31 +08:00
|
|
|
if (wake) {
|
|
|
|
if (!efx_mcdi_complete_async(mcdi, false))
|
|
|
|
(void) efx_mcdi_complete_sync(mcdi);
|
|
|
|
|
|
|
|
/* If the interface isn't RUNNING_ASYNC or
|
|
|
|
* RUNNING_SYNC then we've received a duplicate
|
|
|
|
* completion after we've already transitioned back to
|
|
|
|
* QUIESCENT. [A subsequent invocation would increment
|
|
|
|
* seqno, so would have failed the seqno check].
|
|
|
|
*/
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
static void efx_mcdi_timeout_async(unsigned long context)
|
|
|
|
{
|
|
|
|
struct efx_mcdi_iface *mcdi = (struct efx_mcdi_iface *)context;
|
|
|
|
|
|
|
|
efx_mcdi_complete_async(mcdi, true);
|
2009-11-29 23:15:25 +08:00
|
|
|
}
|
|
|
|
|
2013-08-23 05:06:09 +08:00
|
|
|
static int
|
|
|
|
efx_mcdi_check_supported(struct efx_nic *efx, unsigned int cmd, size_t inlen)
|
|
|
|
{
|
|
|
|
if (efx->type->mcdi_max_ver < 0 ||
|
|
|
|
(efx->type->mcdi_max_ver < 2 &&
|
|
|
|
cmd > MC_CMD_CMD_SPACE_ESCAPE_7))
|
|
|
|
return -EINVAL;
|
|
|
|
|
|
|
|
if (inlen > MCDI_CTL_SDU_LEN_MAX_V2 ||
|
|
|
|
(efx->type->mcdi_max_ver < 2 &&
|
|
|
|
inlen > MCDI_CTL_SDU_LEN_MAX_V1))
|
|
|
|
return -EMSGSIZE;
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2013-06-01 01:36:12 +08:00
|
|
|
static int _efx_mcdi_rpc_finish(struct efx_nic *efx, unsigned cmd, size_t inlen,
|
|
|
|
efx_dword_t *outbuf, size_t outlen,
|
|
|
|
size_t *outlen_actual, bool quiet)
|
|
|
|
{
|
|
|
|
struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
|
|
|
|
MCDI_DECLARE_BUF_OUT_OR_ERR(errbuf, 0);
|
|
|
|
int rc;
|
|
|
|
|
|
|
|
if (mcdi->mode == MCDI_MODE_POLL)
|
|
|
|
rc = efx_mcdi_poll(efx);
|
|
|
|
else
|
|
|
|
rc = efx_mcdi_await_completion(efx);
|
|
|
|
|
|
|
|
if (rc != 0) {
|
|
|
|
netif_err(efx, hw, efx->net_dev,
|
|
|
|
"MC command 0x%x inlen %d mode %d timed out\n",
|
|
|
|
cmd, (int)inlen, mcdi->mode);
|
|
|
|
|
|
|
|
if (mcdi->mode == MCDI_MODE_EVENTS && efx_mcdi_poll_once(efx)) {
|
|
|
|
netif_err(efx, hw, efx->net_dev,
|
|
|
|
"MCDI request was completed without an event\n");
|
|
|
|
rc = 0;
|
|
|
|
}
|
|
|
|
|
sfc:On MCDI timeout, issue an FLR (and mark MCDI to fail-fast)
When an MCDI command times out (whether or not we find it
completed when we poll), call efx_mcdi_abandon(), which tells
all subsequent MCDI calls to fail-fast, and queues up an FLR.
Because an FLR doesn't lead to receiving any reboot even from
the MC (unlike most other types of reset), we have to call
efx_ef10_reset_mc_allocations.
In efx_start_all(), if a reset (of any kind) is pending, we
bail out.
Without this, attempts to reconfigure (e.g. change mtu) can
cause driver/mc state inconsistency if the first MCDI call
triggers an FLR.
For similar reasons, on EF10, in
efx_reset_down(method=RESET_TYPE_MCDI_TIMEOUT), set the number
of active queues to zero before calling efx_stop_all().
And, on farch, in efx_reset_up(method=RESET_TYPE_MCDI_TIMEOUT),
set active_queues and flushes pending & outstanding to zero.
efx_mcdi_mode_{poll,event}() should not take us out of fail-fast
mode. Instead, this is done by efx_mcdi_reset() after the FLR
completes.
The new FLR reset_type RESET_TYPE_MCDI_TIMEOUT doesn't really
fit into the hierarchy of reset 'scopes' whereby efx_reset()
decides some resets subsume others. Thus, it uses separate logic.
Also, fixed up some inconsistency around RESET_TYPE_MC_BIST,
which was in the wrong place in that hierarchy.
Signed-off-by: Shradha Shah <sshah@solarflare.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2014-04-17 02:27:48 +08:00
|
|
|
efx_mcdi_abandon(efx);
|
|
|
|
|
2013-06-01 01:36:12 +08:00
|
|
|
/* Close the race with efx_mcdi_ev_cpl() executing just too late
|
|
|
|
* and completing a request we've just cancelled, by ensuring
|
|
|
|
* that the seqno check therein fails.
|
|
|
|
*/
|
|
|
|
spin_lock_bh(&mcdi->iface_lock);
|
|
|
|
++mcdi->seqno;
|
|
|
|
++mcdi->credits;
|
|
|
|
spin_unlock_bh(&mcdi->iface_lock);
|
|
|
|
}
|
|
|
|
|
|
|
|
if (rc != 0) {
|
|
|
|
if (outlen_actual)
|
|
|
|
*outlen_actual = 0;
|
|
|
|
} else {
|
|
|
|
size_t hdr_len, data_len, err_len;
|
|
|
|
|
|
|
|
/* At the very least we need a memory barrier here to ensure
|
|
|
|
* we pick up changes from efx_mcdi_ev_cpl(). Protect against
|
|
|
|
* a spurious efx_mcdi_ev_cpl() running concurrently by
|
|
|
|
* acquiring the iface_lock. */
|
|
|
|
spin_lock_bh(&mcdi->iface_lock);
|
|
|
|
rc = mcdi->resprc;
|
|
|
|
hdr_len = mcdi->resp_hdr_len;
|
|
|
|
data_len = mcdi->resp_data_len;
|
|
|
|
err_len = min(sizeof(errbuf), data_len);
|
|
|
|
spin_unlock_bh(&mcdi->iface_lock);
|
|
|
|
|
|
|
|
BUG_ON(rc > 0);
|
|
|
|
|
|
|
|
efx->type->mcdi_read_response(efx, outbuf, hdr_len,
|
|
|
|
min(outlen, data_len));
|
|
|
|
if (outlen_actual)
|
|
|
|
*outlen_actual = data_len;
|
|
|
|
|
|
|
|
efx->type->mcdi_read_response(efx, errbuf, hdr_len, err_len);
|
|
|
|
|
|
|
|
if (cmd == MC_CMD_REBOOT && rc == -EIO) {
|
|
|
|
/* Don't reset if MC_CMD_REBOOT returns EIO */
|
|
|
|
} else if (rc == -EIO || rc == -EINTR) {
|
|
|
|
netif_err(efx, hw, efx->net_dev, "MC fatal error %d\n",
|
|
|
|
-rc);
|
|
|
|
efx_schedule_reset(efx, RESET_TYPE_MC_FAILURE);
|
|
|
|
} else if (rc && !quiet) {
|
|
|
|
efx_mcdi_display_error(efx, cmd, inlen, errbuf, err_len,
|
|
|
|
rc);
|
|
|
|
}
|
|
|
|
|
|
|
|
if (rc == -EIO || rc == -EINTR) {
|
|
|
|
msleep(MCDI_STATUS_SLEEP_MS);
|
|
|
|
efx_mcdi_poll_reboot(efx);
|
|
|
|
mcdi->new_epoch = true;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
efx_mcdi_release(mcdi);
|
|
|
|
return rc;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int _efx_mcdi_rpc(struct efx_nic *efx, unsigned cmd,
|
|
|
|
const efx_dword_t *inbuf, size_t inlen,
|
|
|
|
efx_dword_t *outbuf, size_t outlen,
|
|
|
|
size_t *outlen_actual, bool quiet)
|
|
|
|
{
|
|
|
|
int rc;
|
|
|
|
|
|
|
|
rc = efx_mcdi_rpc_start(efx, cmd, inbuf, inlen);
|
|
|
|
if (rc) {
|
|
|
|
if (outlen_actual)
|
|
|
|
*outlen_actual = 0;
|
|
|
|
return rc;
|
|
|
|
}
|
|
|
|
return _efx_mcdi_rpc_finish(efx, cmd, inlen, outbuf, outlen,
|
|
|
|
outlen_actual, quiet);
|
|
|
|
}
|
|
|
|
|
2009-11-29 23:15:25 +08:00
|
|
|
int efx_mcdi_rpc(struct efx_nic *efx, unsigned cmd,
|
2012-09-15 00:31:41 +08:00
|
|
|
const efx_dword_t *inbuf, size_t inlen,
|
|
|
|
efx_dword_t *outbuf, size_t outlen,
|
2009-11-29 23:15:25 +08:00
|
|
|
size_t *outlen_actual)
|
2012-07-17 00:40:47 +08:00
|
|
|
{
|
2013-06-01 01:36:12 +08:00
|
|
|
return _efx_mcdi_rpc(efx, cmd, inbuf, inlen, outbuf, outlen,
|
|
|
|
outlen_actual, false);
|
|
|
|
}
|
2012-09-19 07:56:18 +08:00
|
|
|
|
2013-06-01 01:36:12 +08:00
|
|
|
/* Normally, on receiving an error code in the MCDI response,
|
|
|
|
* efx_mcdi_rpc will log an error message containing (among other
|
|
|
|
* things) the raw error code, by means of efx_mcdi_display_error.
|
|
|
|
* This _quiet version suppresses that; if the caller wishes to log
|
|
|
|
* the error conditionally on the return code, it should call this
|
|
|
|
* function and is then responsible for calling efx_mcdi_display_error
|
|
|
|
* as needed.
|
|
|
|
*/
|
|
|
|
int efx_mcdi_rpc_quiet(struct efx_nic *efx, unsigned cmd,
|
|
|
|
const efx_dword_t *inbuf, size_t inlen,
|
|
|
|
efx_dword_t *outbuf, size_t outlen,
|
|
|
|
size_t *outlen_actual)
|
|
|
|
{
|
|
|
|
return _efx_mcdi_rpc(efx, cmd, inbuf, inlen, outbuf, outlen,
|
|
|
|
outlen_actual, true);
|
2012-07-17 00:40:47 +08:00
|
|
|
}
|
|
|
|
|
2012-09-19 07:56:18 +08:00
|
|
|
int efx_mcdi_rpc_start(struct efx_nic *efx, unsigned cmd,
|
|
|
|
const efx_dword_t *inbuf, size_t inlen)
|
2009-11-29 23:15:25 +08:00
|
|
|
{
|
|
|
|
struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
|
2013-08-23 05:06:09 +08:00
|
|
|
int rc;
|
2012-07-17 00:40:47 +08:00
|
|
|
|
2013-08-23 05:06:09 +08:00
|
|
|
rc = efx_mcdi_check_supported(efx, cmd, inlen);
|
|
|
|
if (rc)
|
|
|
|
return rc;
|
2012-09-19 07:56:18 +08:00
|
|
|
|
2013-09-16 21:18:51 +08:00
|
|
|
if (efx->mc_bist_for_other_fn)
|
|
|
|
return -ENETDOWN;
|
|
|
|
|
sfc:On MCDI timeout, issue an FLR (and mark MCDI to fail-fast)
When an MCDI command times out (whether or not we find it
completed when we poll), call efx_mcdi_abandon(), which tells
all subsequent MCDI calls to fail-fast, and queues up an FLR.
Because an FLR doesn't lead to receiving any reboot even from
the MC (unlike most other types of reset), we have to call
efx_ef10_reset_mc_allocations.
In efx_start_all(), if a reset (of any kind) is pending, we
bail out.
Without this, attempts to reconfigure (e.g. change mtu) can
cause driver/mc state inconsistency if the first MCDI call
triggers an FLR.
For similar reasons, on EF10, in
efx_reset_down(method=RESET_TYPE_MCDI_TIMEOUT), set the number
of active queues to zero before calling efx_stop_all().
And, on farch, in efx_reset_up(method=RESET_TYPE_MCDI_TIMEOUT),
set active_queues and flushes pending & outstanding to zero.
efx_mcdi_mode_{poll,event}() should not take us out of fail-fast
mode. Instead, this is done by efx_mcdi_reset() after the FLR
completes.
The new FLR reset_type RESET_TYPE_MCDI_TIMEOUT doesn't really
fit into the hierarchy of reset 'scopes' whereby efx_reset()
decides some resets subsume others. Thus, it uses separate logic.
Also, fixed up some inconsistency around RESET_TYPE_MC_BIST,
which was in the wrong place in that hierarchy.
Signed-off-by: Shradha Shah <sshah@solarflare.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2014-04-17 02:27:48 +08:00
|
|
|
if (mcdi->mode == MCDI_MODE_FAIL)
|
|
|
|
return -ENETDOWN;
|
|
|
|
|
2013-08-28 06:12:31 +08:00
|
|
|
efx_mcdi_acquire_sync(mcdi);
|
2013-08-23 05:06:09 +08:00
|
|
|
efx_mcdi_send_request(efx, cmd, inbuf, inlen);
|
2012-09-19 07:56:18 +08:00
|
|
|
return 0;
|
2012-07-17 00:40:47 +08:00
|
|
|
}
|
|
|
|
|
2013-06-01 01:36:12 +08:00
|
|
|
static int _efx_mcdi_rpc_async(struct efx_nic *efx, unsigned int cmd,
|
|
|
|
const efx_dword_t *inbuf, size_t inlen,
|
|
|
|
size_t outlen,
|
|
|
|
efx_mcdi_async_completer *complete,
|
|
|
|
unsigned long cookie, bool quiet)
|
2013-08-28 06:12:31 +08:00
|
|
|
{
|
|
|
|
struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
|
|
|
|
struct efx_mcdi_async_param *async;
|
|
|
|
int rc;
|
|
|
|
|
|
|
|
rc = efx_mcdi_check_supported(efx, cmd, inlen);
|
|
|
|
if (rc)
|
|
|
|
return rc;
|
|
|
|
|
2013-09-16 21:18:51 +08:00
|
|
|
if (efx->mc_bist_for_other_fn)
|
|
|
|
return -ENETDOWN;
|
|
|
|
|
2013-08-28 06:12:31 +08:00
|
|
|
async = kmalloc(sizeof(*async) + ALIGN(max(inlen, outlen), 4),
|
|
|
|
GFP_ATOMIC);
|
|
|
|
if (!async)
|
|
|
|
return -ENOMEM;
|
|
|
|
|
|
|
|
async->cmd = cmd;
|
|
|
|
async->inlen = inlen;
|
|
|
|
async->outlen = outlen;
|
2013-06-01 01:36:12 +08:00
|
|
|
async->quiet = quiet;
|
2013-08-28 06:12:31 +08:00
|
|
|
async->complete = complete;
|
|
|
|
async->cookie = cookie;
|
|
|
|
memcpy(async + 1, inbuf, inlen);
|
|
|
|
|
|
|
|
spin_lock_bh(&mcdi->async_lock);
|
|
|
|
|
|
|
|
if (mcdi->mode == MCDI_MODE_EVENTS) {
|
|
|
|
list_add_tail(&async->list, &mcdi->async_list);
|
|
|
|
|
|
|
|
/* If this is at the front of the queue, try to start it
|
|
|
|
* immediately
|
|
|
|
*/
|
|
|
|
if (mcdi->async_list.next == &async->list &&
|
|
|
|
efx_mcdi_acquire_async(mcdi)) {
|
|
|
|
efx_mcdi_send_request(efx, cmd, inbuf, inlen);
|
|
|
|
mod_timer(&mcdi->async_timer,
|
|
|
|
jiffies + MCDI_RPC_TIMEOUT);
|
|
|
|
}
|
|
|
|
} else {
|
|
|
|
kfree(async);
|
|
|
|
rc = -ENETDOWN;
|
|
|
|
}
|
|
|
|
|
|
|
|
spin_unlock_bh(&mcdi->async_lock);
|
|
|
|
|
|
|
|
return rc;
|
|
|
|
}
|
|
|
|
|
2013-06-01 01:36:12 +08:00
|
|
|
/**
|
|
|
|
* efx_mcdi_rpc_async - Schedule an MCDI command to run asynchronously
|
|
|
|
* @efx: NIC through which to issue the command
|
|
|
|
* @cmd: Command type number
|
|
|
|
* @inbuf: Command parameters
|
|
|
|
* @inlen: Length of command parameters, in bytes
|
|
|
|
* @outlen: Length to allocate for response buffer, in bytes
|
|
|
|
* @complete: Function to be called on completion or cancellation.
|
|
|
|
* @cookie: Arbitrary value to be passed to @complete.
|
|
|
|
*
|
|
|
|
* This function does not sleep and therefore may be called in atomic
|
|
|
|
* context. It will fail if event queues are disabled or if MCDI
|
|
|
|
* event completions have been disabled due to an error.
|
|
|
|
*
|
|
|
|
* If it succeeds, the @complete function will be called exactly once
|
|
|
|
* in atomic context, when one of the following occurs:
|
|
|
|
* (a) the completion event is received (in NAPI context)
|
|
|
|
* (b) event queues are disabled (in the process that disables them)
|
|
|
|
* (c) the request times-out (in timer context)
|
|
|
|
*/
|
|
|
|
int
|
|
|
|
efx_mcdi_rpc_async(struct efx_nic *efx, unsigned int cmd,
|
|
|
|
const efx_dword_t *inbuf, size_t inlen, size_t outlen,
|
|
|
|
efx_mcdi_async_completer *complete, unsigned long cookie)
|
|
|
|
{
|
|
|
|
return _efx_mcdi_rpc_async(efx, cmd, inbuf, inlen, outlen, complete,
|
|
|
|
cookie, false);
|
|
|
|
}
|
|
|
|
|
|
|
|
int efx_mcdi_rpc_async_quiet(struct efx_nic *efx, unsigned int cmd,
|
|
|
|
const efx_dword_t *inbuf, size_t inlen,
|
|
|
|
size_t outlen, efx_mcdi_async_completer *complete,
|
|
|
|
unsigned long cookie)
|
|
|
|
{
|
|
|
|
return _efx_mcdi_rpc_async(efx, cmd, inbuf, inlen, outlen, complete,
|
|
|
|
cookie, true);
|
|
|
|
}
|
|
|
|
|
2012-07-17 00:40:47 +08:00
|
|
|
int efx_mcdi_rpc_finish(struct efx_nic *efx, unsigned cmd, size_t inlen,
|
2012-09-15 00:31:41 +08:00
|
|
|
efx_dword_t *outbuf, size_t outlen,
|
|
|
|
size_t *outlen_actual)
|
2012-07-17 00:40:47 +08:00
|
|
|
{
|
2013-06-01 01:36:12 +08:00
|
|
|
return _efx_mcdi_rpc_finish(efx, cmd, inlen, outbuf, outlen,
|
|
|
|
outlen_actual, false);
|
|
|
|
}
|
2012-10-09 04:43:00 +08:00
|
|
|
|
2013-06-01 01:36:12 +08:00
|
|
|
int efx_mcdi_rpc_finish_quiet(struct efx_nic *efx, unsigned cmd, size_t inlen,
|
|
|
|
efx_dword_t *outbuf, size_t outlen,
|
|
|
|
size_t *outlen_actual)
|
|
|
|
{
|
|
|
|
return _efx_mcdi_rpc_finish(efx, cmd, inlen, outbuf, outlen,
|
|
|
|
outlen_actual, true);
|
|
|
|
}
|
2011-12-21 07:39:31 +08:00
|
|
|
|
2013-06-01 01:36:12 +08:00
|
|
|
void efx_mcdi_display_error(struct efx_nic *efx, unsigned cmd,
|
|
|
|
size_t inlen, efx_dword_t *outbuf,
|
|
|
|
size_t outlen, int rc)
|
|
|
|
{
|
|
|
|
int code = 0, err_arg = 0;
|
2009-11-29 23:15:25 +08:00
|
|
|
|
2013-06-01 01:36:12 +08:00
|
|
|
if (outlen >= MC_CMD_ERR_CODE_OFST + 4)
|
|
|
|
code = MCDI_DWORD(outbuf, ERR_CODE);
|
|
|
|
if (outlen >= MC_CMD_ERR_ARG_OFST + 4)
|
|
|
|
err_arg = MCDI_DWORD(outbuf, ERR_ARG);
|
|
|
|
netif_err(efx, hw, efx->net_dev,
|
|
|
|
"MC command 0x%x inlen %d failed rc=%d (raw=%d) arg=%d\n",
|
|
|
|
cmd, (int)inlen, rc, code, err_arg);
|
2009-11-29 23:15:25 +08:00
|
|
|
}
|
|
|
|
|
2013-08-28 06:12:31 +08:00
|
|
|
/* Switch to polled MCDI completions. This can be called in various
|
|
|
|
* error conditions with various locks held, so it must be lockless.
|
|
|
|
* Caller is responsible for flushing asynchronous requests later.
|
|
|
|
*/
|
2009-11-29 23:15:25 +08:00
|
|
|
void efx_mcdi_mode_poll(struct efx_nic *efx)
|
|
|
|
{
|
|
|
|
struct efx_mcdi_iface *mcdi;
|
|
|
|
|
2012-09-18 09:33:56 +08:00
|
|
|
if (!efx->mcdi)
|
2009-11-29 23:15:25 +08:00
|
|
|
return;
|
|
|
|
|
|
|
|
mcdi = efx_mcdi(efx);
|
sfc:On MCDI timeout, issue an FLR (and mark MCDI to fail-fast)
When an MCDI command times out (whether or not we find it
completed when we poll), call efx_mcdi_abandon(), which tells
all subsequent MCDI calls to fail-fast, and queues up an FLR.
Because an FLR doesn't lead to receiving any reboot even from
the MC (unlike most other types of reset), we have to call
efx_ef10_reset_mc_allocations.
In efx_start_all(), if a reset (of any kind) is pending, we
bail out.
Without this, attempts to reconfigure (e.g. change mtu) can
cause driver/mc state inconsistency if the first MCDI call
triggers an FLR.
For similar reasons, on EF10, in
efx_reset_down(method=RESET_TYPE_MCDI_TIMEOUT), set the number
of active queues to zero before calling efx_stop_all().
And, on farch, in efx_reset_up(method=RESET_TYPE_MCDI_TIMEOUT),
set active_queues and flushes pending & outstanding to zero.
efx_mcdi_mode_{poll,event}() should not take us out of fail-fast
mode. Instead, this is done by efx_mcdi_reset() after the FLR
completes.
The new FLR reset_type RESET_TYPE_MCDI_TIMEOUT doesn't really
fit into the hierarchy of reset 'scopes' whereby efx_reset()
decides some resets subsume others. Thus, it uses separate logic.
Also, fixed up some inconsistency around RESET_TYPE_MC_BIST,
which was in the wrong place in that hierarchy.
Signed-off-by: Shradha Shah <sshah@solarflare.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2014-04-17 02:27:48 +08:00
|
|
|
/* If already in polling mode, nothing to do.
|
|
|
|
* If in fail-fast state, don't switch to polled completion.
|
|
|
|
* FLR recovery will do that later.
|
|
|
|
*/
|
|
|
|
if (mcdi->mode == MCDI_MODE_POLL || mcdi->mode == MCDI_MODE_FAIL)
|
2009-11-29 23:15:25 +08:00
|
|
|
return;
|
|
|
|
|
|
|
|
/* We can switch from event completion to polled completion, because
|
|
|
|
* mcdi requests are always completed in shared memory. We do this by
|
|
|
|
* switching the mode to POLL'd then completing the request.
|
|
|
|
* efx_mcdi_await_completion() will then call efx_mcdi_poll().
|
|
|
|
*
|
|
|
|
* We need an smp_wmb() to synchronise with efx_mcdi_await_completion(),
|
2013-08-28 06:12:31 +08:00
|
|
|
* which efx_mcdi_complete_sync() provides for us.
|
2009-11-29 23:15:25 +08:00
|
|
|
*/
|
|
|
|
mcdi->mode = MCDI_MODE_POLL;
|
|
|
|
|
2013-08-28 06:12:31 +08:00
|
|
|
efx_mcdi_complete_sync(mcdi);
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Flush any running or queued asynchronous requests, after event processing
|
|
|
|
* is stopped
|
|
|
|
*/
|
|
|
|
void efx_mcdi_flush_async(struct efx_nic *efx)
|
|
|
|
{
|
|
|
|
struct efx_mcdi_async_param *async, *next;
|
|
|
|
struct efx_mcdi_iface *mcdi;
|
|
|
|
|
|
|
|
if (!efx->mcdi)
|
|
|
|
return;
|
|
|
|
|
|
|
|
mcdi = efx_mcdi(efx);
|
|
|
|
|
sfc:On MCDI timeout, issue an FLR (and mark MCDI to fail-fast)
When an MCDI command times out (whether or not we find it
completed when we poll), call efx_mcdi_abandon(), which tells
all subsequent MCDI calls to fail-fast, and queues up an FLR.
Because an FLR doesn't lead to receiving any reboot even from
the MC (unlike most other types of reset), we have to call
efx_ef10_reset_mc_allocations.
In efx_start_all(), if a reset (of any kind) is pending, we
bail out.
Without this, attempts to reconfigure (e.g. change mtu) can
cause driver/mc state inconsistency if the first MCDI call
triggers an FLR.
For similar reasons, on EF10, in
efx_reset_down(method=RESET_TYPE_MCDI_TIMEOUT), set the number
of active queues to zero before calling efx_stop_all().
And, on farch, in efx_reset_up(method=RESET_TYPE_MCDI_TIMEOUT),
set active_queues and flushes pending & outstanding to zero.
efx_mcdi_mode_{poll,event}() should not take us out of fail-fast
mode. Instead, this is done by efx_mcdi_reset() after the FLR
completes.
The new FLR reset_type RESET_TYPE_MCDI_TIMEOUT doesn't really
fit into the hierarchy of reset 'scopes' whereby efx_reset()
decides some resets subsume others. Thus, it uses separate logic.
Also, fixed up some inconsistency around RESET_TYPE_MC_BIST,
which was in the wrong place in that hierarchy.
Signed-off-by: Shradha Shah <sshah@solarflare.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2014-04-17 02:27:48 +08:00
|
|
|
/* We must be in poll or fail mode so no more requests can be queued */
|
|
|
|
BUG_ON(mcdi->mode == MCDI_MODE_EVENTS);
|
2013-08-28 06:12:31 +08:00
|
|
|
|
|
|
|
del_timer_sync(&mcdi->async_timer);
|
|
|
|
|
|
|
|
/* If a request is still running, make sure we give the MC
|
|
|
|
* time to complete it so that the response won't overwrite our
|
|
|
|
* next request.
|
|
|
|
*/
|
|
|
|
if (mcdi->state == MCDI_STATE_RUNNING_ASYNC) {
|
|
|
|
efx_mcdi_poll(efx);
|
|
|
|
mcdi->state = MCDI_STATE_QUIESCENT;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Nothing else will access the async list now, so it is safe
|
|
|
|
* to walk it without holding async_lock. If we hold it while
|
|
|
|
* calling a completer then lockdep may warn that we have
|
|
|
|
* acquired locks in the wrong order.
|
|
|
|
*/
|
|
|
|
list_for_each_entry_safe(async, next, &mcdi->async_list, list) {
|
|
|
|
async->complete(efx, async->cookie, -ENETDOWN, NULL, 0);
|
|
|
|
list_del(&async->list);
|
|
|
|
kfree(async);
|
|
|
|
}
|
2009-11-29 23:15:25 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
void efx_mcdi_mode_event(struct efx_nic *efx)
|
|
|
|
{
|
|
|
|
struct efx_mcdi_iface *mcdi;
|
|
|
|
|
2012-09-18 09:33:56 +08:00
|
|
|
if (!efx->mcdi)
|
2009-11-29 23:15:25 +08:00
|
|
|
return;
|
|
|
|
|
|
|
|
mcdi = efx_mcdi(efx);
|
sfc:On MCDI timeout, issue an FLR (and mark MCDI to fail-fast)
When an MCDI command times out (whether or not we find it
completed when we poll), call efx_mcdi_abandon(), which tells
all subsequent MCDI calls to fail-fast, and queues up an FLR.
Because an FLR doesn't lead to receiving any reboot even from
the MC (unlike most other types of reset), we have to call
efx_ef10_reset_mc_allocations.
In efx_start_all(), if a reset (of any kind) is pending, we
bail out.
Without this, attempts to reconfigure (e.g. change mtu) can
cause driver/mc state inconsistency if the first MCDI call
triggers an FLR.
For similar reasons, on EF10, in
efx_reset_down(method=RESET_TYPE_MCDI_TIMEOUT), set the number
of active queues to zero before calling efx_stop_all().
And, on farch, in efx_reset_up(method=RESET_TYPE_MCDI_TIMEOUT),
set active_queues and flushes pending & outstanding to zero.
efx_mcdi_mode_{poll,event}() should not take us out of fail-fast
mode. Instead, this is done by efx_mcdi_reset() after the FLR
completes.
The new FLR reset_type RESET_TYPE_MCDI_TIMEOUT doesn't really
fit into the hierarchy of reset 'scopes' whereby efx_reset()
decides some resets subsume others. Thus, it uses separate logic.
Also, fixed up some inconsistency around RESET_TYPE_MC_BIST,
which was in the wrong place in that hierarchy.
Signed-off-by: Shradha Shah <sshah@solarflare.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2014-04-17 02:27:48 +08:00
|
|
|
/* If already in event completion mode, nothing to do.
|
|
|
|
* If in fail-fast state, don't switch to event completion. FLR
|
|
|
|
* recovery will do that later.
|
|
|
|
*/
|
|
|
|
if (mcdi->mode == MCDI_MODE_EVENTS || mcdi->mode == MCDI_MODE_FAIL)
|
2009-11-29 23:15:25 +08:00
|
|
|
return;
|
|
|
|
|
|
|
|
/* We can't switch from polled to event completion in the middle of a
|
|
|
|
* request, because the completion method is specified in the request.
|
|
|
|
* So acquire the interface to serialise the requestors. We don't need
|
|
|
|
* to acquire the iface_lock to change the mode here, but we do need a
|
|
|
|
* write memory barrier ensure that efx_mcdi_rpc() sees it, which
|
|
|
|
* efx_mcdi_acquire() provides.
|
|
|
|
*/
|
2013-08-28 06:12:31 +08:00
|
|
|
efx_mcdi_acquire_sync(mcdi);
|
2009-11-29 23:15:25 +08:00
|
|
|
mcdi->mode = MCDI_MODE_EVENTS;
|
|
|
|
efx_mcdi_release(mcdi);
|
|
|
|
}
|
|
|
|
|
|
|
|
static void efx_mcdi_ev_death(struct efx_nic *efx, int rc)
|
|
|
|
{
|
|
|
|
struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
|
|
|
|
|
|
|
|
/* If there is an outstanding MCDI request, it has been terminated
|
|
|
|
* either by a BADASSERT or REBOOT event. If the mcdi interface is
|
|
|
|
* in polled mode, then do nothing because the MC reboot handler will
|
|
|
|
* set the header correctly. However, if the mcdi interface is waiting
|
|
|
|
* for a CMDDONE event it won't receive it [and since all MCDI events
|
|
|
|
* are sent to the same queue, we can't be racing with
|
|
|
|
* efx_mcdi_ev_cpl()]
|
|
|
|
*
|
2013-08-28 06:12:31 +08:00
|
|
|
* If there is an outstanding asynchronous request, we can't
|
|
|
|
* complete it now (efx_mcdi_complete() would deadlock). The
|
|
|
|
* reset process will take care of this.
|
|
|
|
*
|
|
|
|
* There's a race here with efx_mcdi_send_request(), because
|
|
|
|
* we might receive a REBOOT event *before* the request has
|
|
|
|
* been copied out. In polled mode (during startup) this is
|
|
|
|
* irrelevant, because efx_mcdi_complete_sync() is ignored. In
|
|
|
|
* event mode, this condition is just an edge-case of
|
|
|
|
* receiving a REBOOT event after posting the MCDI
|
|
|
|
* request. Did the mc reboot before or after the copyout? The
|
|
|
|
* best we can do always is just return failure.
|
2009-11-29 23:15:25 +08:00
|
|
|
*/
|
|
|
|
spin_lock(&mcdi->iface_lock);
|
2013-08-28 06:12:31 +08:00
|
|
|
if (efx_mcdi_complete_sync(mcdi)) {
|
2009-11-29 23:15:25 +08:00
|
|
|
if (mcdi->mode == MCDI_MODE_EVENTS) {
|
|
|
|
mcdi->resprc = rc;
|
2012-09-19 07:56:18 +08:00
|
|
|
mcdi->resp_hdr_len = 0;
|
|
|
|
mcdi->resp_data_len = 0;
|
2010-12-02 21:46:55 +08:00
|
|
|
++mcdi->credits;
|
2009-11-29 23:15:25 +08:00
|
|
|
}
|
2011-12-21 07:39:31 +08:00
|
|
|
} else {
|
|
|
|
int count;
|
|
|
|
|
|
|
|
/* Consume the status word since efx_mcdi_rpc_finish() won't */
|
|
|
|
for (count = 0; count < MCDI_STATUS_DELAY_COUNT; ++count) {
|
|
|
|
if (efx_mcdi_poll_reboot(efx))
|
|
|
|
break;
|
|
|
|
udelay(MCDI_STATUS_DELAY_US);
|
|
|
|
}
|
2013-06-20 18:40:07 +08:00
|
|
|
mcdi->new_epoch = true;
|
2013-09-18 17:16:24 +08:00
|
|
|
|
|
|
|
/* Nobody was waiting for an MCDI request, so trigger a reset */
|
|
|
|
efx_schedule_reset(efx, RESET_TYPE_MC_FAILURE);
|
2011-12-21 07:39:31 +08:00
|
|
|
}
|
|
|
|
|
2009-11-29 23:15:25 +08:00
|
|
|
spin_unlock(&mcdi->iface_lock);
|
|
|
|
}
|
|
|
|
|
2013-09-16 21:18:51 +08:00
|
|
|
/* The MC is going down in to BIST mode. set the BIST flag to block
|
|
|
|
* new MCDI, cancel any outstanding MCDI and and schedule a BIST-type reset
|
|
|
|
* (which doesn't actually execute a reset, it waits for the controlling
|
|
|
|
* function to reset it).
|
|
|
|
*/
|
|
|
|
static void efx_mcdi_ev_bist(struct efx_nic *efx)
|
|
|
|
{
|
|
|
|
struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
|
|
|
|
|
|
|
|
spin_lock(&mcdi->iface_lock);
|
|
|
|
efx->mc_bist_for_other_fn = true;
|
|
|
|
if (efx_mcdi_complete_sync(mcdi)) {
|
|
|
|
if (mcdi->mode == MCDI_MODE_EVENTS) {
|
|
|
|
mcdi->resprc = -EIO;
|
|
|
|
mcdi->resp_hdr_len = 0;
|
|
|
|
mcdi->resp_data_len = 0;
|
|
|
|
++mcdi->credits;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
mcdi->new_epoch = true;
|
|
|
|
efx_schedule_reset(efx, RESET_TYPE_MC_BIST);
|
|
|
|
spin_unlock(&mcdi->iface_lock);
|
|
|
|
}
|
|
|
|
|
sfc:On MCDI timeout, issue an FLR (and mark MCDI to fail-fast)
When an MCDI command times out (whether or not we find it
completed when we poll), call efx_mcdi_abandon(), which tells
all subsequent MCDI calls to fail-fast, and queues up an FLR.
Because an FLR doesn't lead to receiving any reboot even from
the MC (unlike most other types of reset), we have to call
efx_ef10_reset_mc_allocations.
In efx_start_all(), if a reset (of any kind) is pending, we
bail out.
Without this, attempts to reconfigure (e.g. change mtu) can
cause driver/mc state inconsistency if the first MCDI call
triggers an FLR.
For similar reasons, on EF10, in
efx_reset_down(method=RESET_TYPE_MCDI_TIMEOUT), set the number
of active queues to zero before calling efx_stop_all().
And, on farch, in efx_reset_up(method=RESET_TYPE_MCDI_TIMEOUT),
set active_queues and flushes pending & outstanding to zero.
efx_mcdi_mode_{poll,event}() should not take us out of fail-fast
mode. Instead, this is done by efx_mcdi_reset() after the FLR
completes.
The new FLR reset_type RESET_TYPE_MCDI_TIMEOUT doesn't really
fit into the hierarchy of reset 'scopes' whereby efx_reset()
decides some resets subsume others. Thus, it uses separate logic.
Also, fixed up some inconsistency around RESET_TYPE_MC_BIST,
which was in the wrong place in that hierarchy.
Signed-off-by: Shradha Shah <sshah@solarflare.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2014-04-17 02:27:48 +08:00
|
|
|
/* MCDI timeouts seen, so make all MCDI calls fail-fast and issue an FLR to try
|
|
|
|
* to recover.
|
|
|
|
*/
|
|
|
|
static void efx_mcdi_abandon(struct efx_nic *efx)
|
|
|
|
{
|
|
|
|
struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
|
|
|
|
|
|
|
|
if (xchg(&mcdi->mode, MCDI_MODE_FAIL) == MCDI_MODE_FAIL)
|
|
|
|
return; /* it had already been done */
|
|
|
|
netif_dbg(efx, hw, efx->net_dev, "MCDI is timing out; trying to recover\n");
|
|
|
|
efx_schedule_reset(efx, RESET_TYPE_MCDI_TIMEOUT);
|
|
|
|
}
|
|
|
|
|
2009-11-29 23:15:25 +08:00
|
|
|
/* Called from falcon_process_eventq for MCDI events */
|
|
|
|
void efx_mcdi_process_event(struct efx_channel *channel,
|
|
|
|
efx_qword_t *event)
|
|
|
|
{
|
|
|
|
struct efx_nic *efx = channel->efx;
|
|
|
|
int code = EFX_QWORD_FIELD(*event, MCDI_EVENT_CODE);
|
|
|
|
u32 data = EFX_QWORD_FIELD(*event, MCDI_EVENT_DATA);
|
|
|
|
|
|
|
|
switch (code) {
|
|
|
|
case MCDI_EVENT_CODE_BADSSERT:
|
2010-06-23 19:30:07 +08:00
|
|
|
netif_err(efx, hw, efx->net_dev,
|
|
|
|
"MC watchdog or assertion failure at 0x%x\n", data);
|
2012-10-09 04:43:00 +08:00
|
|
|
efx_mcdi_ev_death(efx, -EINTR);
|
2009-11-29 23:15:25 +08:00
|
|
|
break;
|
|
|
|
|
|
|
|
case MCDI_EVENT_CODE_PMNOTICE:
|
2010-06-23 19:30:07 +08:00
|
|
|
netif_info(efx, wol, efx->net_dev, "MCDI PM event.\n");
|
2009-11-29 23:15:25 +08:00
|
|
|
break;
|
|
|
|
|
|
|
|
case MCDI_EVENT_CODE_CMDDONE:
|
|
|
|
efx_mcdi_ev_cpl(efx,
|
|
|
|
MCDI_EVENT_FIELD(*event, CMDDONE_SEQ),
|
|
|
|
MCDI_EVENT_FIELD(*event, CMDDONE_DATALEN),
|
|
|
|
MCDI_EVENT_FIELD(*event, CMDDONE_ERRNO));
|
|
|
|
break;
|
|
|
|
|
|
|
|
case MCDI_EVENT_CODE_LINKCHANGE:
|
|
|
|
efx_mcdi_process_link_change(efx, event);
|
|
|
|
break;
|
|
|
|
case MCDI_EVENT_CODE_SENSOREVT:
|
|
|
|
efx_mcdi_sensor_event(efx, event);
|
|
|
|
break;
|
|
|
|
case MCDI_EVENT_CODE_SCHEDERR:
|
2013-10-08 01:44:17 +08:00
|
|
|
netif_dbg(efx, hw, efx->net_dev,
|
|
|
|
"MC Scheduler alert (0x%x)\n", data);
|
2009-11-29 23:15:25 +08:00
|
|
|
break;
|
|
|
|
case MCDI_EVENT_CODE_REBOOT:
|
2013-08-30 02:19:29 +08:00
|
|
|
case MCDI_EVENT_CODE_MC_REBOOT:
|
2010-06-23 19:30:07 +08:00
|
|
|
netif_info(efx, hw, efx->net_dev, "MC Reboot\n");
|
2012-10-09 04:43:00 +08:00
|
|
|
efx_mcdi_ev_death(efx, -EIO);
|
2009-11-29 23:15:25 +08:00
|
|
|
break;
|
2013-09-16 21:18:51 +08:00
|
|
|
case MCDI_EVENT_CODE_MC_BIST:
|
|
|
|
netif_info(efx, hw, efx->net_dev, "MC entered BIST mode\n");
|
|
|
|
efx_mcdi_ev_bist(efx);
|
|
|
|
break;
|
2009-11-29 23:15:25 +08:00
|
|
|
case MCDI_EVENT_CODE_MAC_STATS_DMA:
|
|
|
|
/* MAC stats are gather lazily. We can ignore this. */
|
|
|
|
break;
|
sfc: Add SR-IOV back-end support for SFC9000 family
On the SFC9000 family, each port has 1024 Virtual Interfaces (VIs),
each with an RX queue, a TX queue, an event queue and a mailbox
register. These may be assigned to up to 127 SR-IOV virtual functions
per port, with up to 64 VIs per VF.
We allocate an extra channel (IRQ and event queue only) to receive
requests from VF drivers.
There is a per-port limit of 4 concurrent RX queue flushes, and queue
flushes may be initiated by the MC in response to a Function Level
Reset (FLR) of a VF. Therefore, when SR-IOV is in use, we submit all
flush requests via the MC.
The RSS indirection table is shared with VFs, so the number of RX
queues used in the PF is limited to the number of VIs per VF.
This is almost entirely the work of Steve Hodgson, formerly
shodgson@solarflare.com.
Signed-off-by: Ben Hutchings <bhutchings@solarflare.com>
2012-02-14 08:48:07 +08:00
|
|
|
case MCDI_EVENT_CODE_FLR:
|
2014-11-05 20:16:32 +08:00
|
|
|
efx_siena_sriov_flr(efx, MCDI_EVENT_FIELD(*event, FLR_VF));
|
sfc: Add SR-IOV back-end support for SFC9000 family
On the SFC9000 family, each port has 1024 Virtual Interfaces (VIs),
each with an RX queue, a TX queue, an event queue and a mailbox
register. These may be assigned to up to 127 SR-IOV virtual functions
per port, with up to 64 VIs per VF.
We allocate an extra channel (IRQ and event queue only) to receive
requests from VF drivers.
There is a per-port limit of 4 concurrent RX queue flushes, and queue
flushes may be initiated by the MC in response to a Function Level
Reset (FLR) of a VF. Therefore, when SR-IOV is in use, we submit all
flush requests via the MC.
The RSS indirection table is shared with VFs, so the number of RX
queues used in the PF is limited to the number of VIs per VF.
This is almost entirely the work of Steve Hodgson, formerly
shodgson@solarflare.com.
Signed-off-by: Ben Hutchings <bhutchings@solarflare.com>
2012-02-14 08:48:07 +08:00
|
|
|
break;
|
2012-09-03 18:09:36 +08:00
|
|
|
case MCDI_EVENT_CODE_PTP_RX:
|
|
|
|
case MCDI_EVENT_CODE_PTP_FAULT:
|
|
|
|
case MCDI_EVENT_CODE_PTP_PPS:
|
|
|
|
efx_ptp_event(efx, event);
|
|
|
|
break;
|
2013-11-18 20:54:41 +08:00
|
|
|
case MCDI_EVENT_CODE_PTP_TIME:
|
|
|
|
efx_time_sync_event(channel, event);
|
|
|
|
break;
|
2013-08-30 02:19:29 +08:00
|
|
|
case MCDI_EVENT_CODE_TX_FLUSH:
|
|
|
|
case MCDI_EVENT_CODE_RX_FLUSH:
|
|
|
|
/* Two flush events will be sent: one to the same event
|
|
|
|
* queue as completions, and one to event queue 0.
|
|
|
|
* In the latter case the {RX,TX}_FLUSH_TO_DRIVER
|
|
|
|
* flag will be set, and we should ignore the event
|
|
|
|
* because we want to wait for all completions.
|
|
|
|
*/
|
|
|
|
BUILD_BUG_ON(MCDI_EVENT_TX_FLUSH_TO_DRIVER_LBN !=
|
|
|
|
MCDI_EVENT_RX_FLUSH_TO_DRIVER_LBN);
|
|
|
|
if (!MCDI_EVENT_FIELD(*event, TX_FLUSH_TO_DRIVER))
|
|
|
|
efx_ef10_handle_drain_event(efx);
|
|
|
|
break;
|
2013-06-13 18:36:15 +08:00
|
|
|
case MCDI_EVENT_CODE_TX_ERR:
|
|
|
|
case MCDI_EVENT_CODE_RX_ERR:
|
|
|
|
netif_err(efx, hw, efx->net_dev,
|
|
|
|
"%s DMA error (event: "EFX_QWORD_FMT")\n",
|
|
|
|
code == MCDI_EVENT_CODE_TX_ERR ? "TX" : "RX",
|
|
|
|
EFX_QWORD_VAL(*event));
|
|
|
|
efx_schedule_reset(efx, RESET_TYPE_DMA_ERROR);
|
|
|
|
break;
|
2009-11-29 23:15:25 +08:00
|
|
|
default:
|
2010-06-23 19:30:07 +08:00
|
|
|
netif_err(efx, hw, efx->net_dev, "Unknown MCDI event 0x%x\n",
|
|
|
|
code);
|
2009-11-29 23:15:25 +08:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
/**************************************************************************
|
|
|
|
*
|
|
|
|
* Specific request functions
|
|
|
|
*
|
|
|
|
**************************************************************************
|
|
|
|
*/
|
|
|
|
|
2011-02-25 07:57:47 +08:00
|
|
|
void efx_mcdi_print_fwver(struct efx_nic *efx, char *buf, size_t len)
|
2009-11-29 23:15:25 +08:00
|
|
|
{
|
2013-08-30 02:19:29 +08:00
|
|
|
MCDI_DECLARE_BUF(outbuf,
|
|
|
|
max(MC_CMD_GET_VERSION_OUT_LEN,
|
|
|
|
MC_CMD_GET_CAPABILITIES_OUT_LEN));
|
2009-11-29 23:15:25 +08:00
|
|
|
size_t outlength;
|
|
|
|
const __le16 *ver_words;
|
2013-08-30 02:19:29 +08:00
|
|
|
size_t offset;
|
2009-11-29 23:15:25 +08:00
|
|
|
int rc;
|
|
|
|
|
|
|
|
BUILD_BUG_ON(MC_CMD_GET_VERSION_IN_LEN != 0);
|
|
|
|
rc = efx_mcdi_rpc(efx, MC_CMD_GET_VERSION, NULL, 0,
|
|
|
|
outbuf, sizeof(outbuf), &outlength);
|
|
|
|
if (rc)
|
|
|
|
goto fail;
|
2011-12-20 08:44:06 +08:00
|
|
|
if (outlength < MC_CMD_GET_VERSION_OUT_LEN) {
|
2010-04-28 17:27:14 +08:00
|
|
|
rc = -EIO;
|
2009-11-29 23:15:25 +08:00
|
|
|
goto fail;
|
|
|
|
}
|
|
|
|
|
|
|
|
ver_words = (__le16 *)MCDI_PTR(outbuf, GET_VERSION_OUT_VERSION);
|
2013-08-30 02:19:29 +08:00
|
|
|
offset = snprintf(buf, len, "%u.%u.%u.%u",
|
|
|
|
le16_to_cpu(ver_words[0]), le16_to_cpu(ver_words[1]),
|
|
|
|
le16_to_cpu(ver_words[2]), le16_to_cpu(ver_words[3]));
|
|
|
|
|
|
|
|
/* EF10 may have multiple datapath firmware variants within a
|
|
|
|
* single version. Report which variants are running.
|
|
|
|
*/
|
|
|
|
if (efx_nic_rev(efx) >= EFX_REV_HUNT_A0) {
|
|
|
|
BUILD_BUG_ON(MC_CMD_GET_CAPABILITIES_IN_LEN != 0);
|
|
|
|
rc = efx_mcdi_rpc(efx, MC_CMD_GET_CAPABILITIES, NULL, 0,
|
|
|
|
outbuf, sizeof(outbuf), &outlength);
|
|
|
|
if (rc || outlength < MC_CMD_GET_CAPABILITIES_OUT_LEN)
|
|
|
|
offset += snprintf(
|
|
|
|
buf + offset, len - offset, " rx? tx?");
|
|
|
|
else
|
|
|
|
offset += snprintf(
|
|
|
|
buf + offset, len - offset, " rx%x tx%x",
|
|
|
|
MCDI_WORD(outbuf,
|
|
|
|
GET_CAPABILITIES_OUT_RX_DPCPU_FW_ID),
|
|
|
|
MCDI_WORD(outbuf,
|
|
|
|
GET_CAPABILITIES_OUT_TX_DPCPU_FW_ID));
|
|
|
|
|
|
|
|
/* It's theoretically possible for the string to exceed 31
|
|
|
|
* characters, though in practice the first three version
|
|
|
|
* components are short enough that this doesn't happen.
|
|
|
|
*/
|
|
|
|
if (WARN_ON(offset >= len))
|
|
|
|
buf[0] = 0;
|
|
|
|
}
|
|
|
|
|
2011-02-25 07:57:47 +08:00
|
|
|
return;
|
2009-11-29 23:15:25 +08:00
|
|
|
|
|
|
|
fail:
|
2010-06-23 19:30:07 +08:00
|
|
|
netif_err(efx, probe, efx->net_dev, "%s: failed rc=%d\n", __func__, rc);
|
2011-02-25 07:57:47 +08:00
|
|
|
buf[0] = 0;
|
2009-11-29 23:15:25 +08:00
|
|
|
}
|
|
|
|
|
2013-08-30 02:04:03 +08:00
|
|
|
static int efx_mcdi_drv_attach(struct efx_nic *efx, bool driver_operating,
|
|
|
|
bool *was_attached)
|
2009-11-29 23:15:25 +08:00
|
|
|
{
|
2012-09-15 00:30:10 +08:00
|
|
|
MCDI_DECLARE_BUF(inbuf, MC_CMD_DRV_ATTACH_IN_LEN);
|
2013-10-08 03:10:11 +08:00
|
|
|
MCDI_DECLARE_BUF(outbuf, MC_CMD_DRV_ATTACH_EXT_OUT_LEN);
|
2009-11-29 23:15:25 +08:00
|
|
|
size_t outlen;
|
|
|
|
int rc;
|
|
|
|
|
|
|
|
MCDI_SET_DWORD(inbuf, DRV_ATTACH_IN_NEW_STATE,
|
|
|
|
driver_operating ? 1 : 0);
|
|
|
|
MCDI_SET_DWORD(inbuf, DRV_ATTACH_IN_UPDATE, 1);
|
2013-08-21 03:35:50 +08:00
|
|
|
MCDI_SET_DWORD(inbuf, DRV_ATTACH_IN_FIRMWARE_ID, MC_CMD_FW_LOW_LATENCY);
|
2009-11-29 23:15:25 +08:00
|
|
|
|
|
|
|
rc = efx_mcdi_rpc(efx, MC_CMD_DRV_ATTACH, inbuf, sizeof(inbuf),
|
|
|
|
outbuf, sizeof(outbuf), &outlen);
|
|
|
|
if (rc)
|
|
|
|
goto fail;
|
2010-04-28 17:27:14 +08:00
|
|
|
if (outlen < MC_CMD_DRV_ATTACH_OUT_LEN) {
|
|
|
|
rc = -EIO;
|
2009-11-29 23:15:25 +08:00
|
|
|
goto fail;
|
2010-04-28 17:27:14 +08:00
|
|
|
}
|
2009-11-29 23:15:25 +08:00
|
|
|
|
2013-10-17 01:32:34 +08:00
|
|
|
if (driver_operating) {
|
|
|
|
if (outlen >= MC_CMD_DRV_ATTACH_EXT_OUT_LEN) {
|
|
|
|
efx->mcdi->fn_flags =
|
|
|
|
MCDI_DWORD(outbuf,
|
|
|
|
DRV_ATTACH_EXT_OUT_FUNC_FLAGS);
|
|
|
|
} else {
|
|
|
|
/* Synthesise flags for Siena */
|
|
|
|
efx->mcdi->fn_flags =
|
|
|
|
1 << MC_CMD_DRV_ATTACH_EXT_OUT_FLAG_LINKCTRL |
|
|
|
|
1 << MC_CMD_DRV_ATTACH_EXT_OUT_FLAG_TRUSTED |
|
|
|
|
(efx_port_num(efx) == 0) <<
|
|
|
|
MC_CMD_DRV_ATTACH_EXT_OUT_FLAG_PRIMARY;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2013-10-08 03:10:11 +08:00
|
|
|
/* We currently assume we have control of the external link
|
|
|
|
* and are completely trusted by firmware. Abort probing
|
|
|
|
* if that's not true for this function.
|
|
|
|
*/
|
|
|
|
if (driver_operating &&
|
2013-10-17 01:32:34 +08:00
|
|
|
(efx->mcdi->fn_flags &
|
2013-10-08 03:10:11 +08:00
|
|
|
(1 << MC_CMD_DRV_ATTACH_EXT_OUT_FLAG_LINKCTRL |
|
|
|
|
1 << MC_CMD_DRV_ATTACH_EXT_OUT_FLAG_TRUSTED)) !=
|
|
|
|
(1 << MC_CMD_DRV_ATTACH_EXT_OUT_FLAG_LINKCTRL |
|
|
|
|
1 << MC_CMD_DRV_ATTACH_EXT_OUT_FLAG_TRUSTED)) {
|
|
|
|
netif_err(efx, probe, efx->net_dev,
|
|
|
|
"This driver version only supports one function per port\n");
|
|
|
|
return -ENODEV;
|
|
|
|
}
|
|
|
|
|
2009-11-29 23:15:25 +08:00
|
|
|
if (was_attached != NULL)
|
|
|
|
*was_attached = MCDI_DWORD(outbuf, DRV_ATTACH_OUT_OLD_STATE);
|
|
|
|
return 0;
|
|
|
|
|
|
|
|
fail:
|
2010-06-23 19:30:07 +08:00
|
|
|
netif_err(efx, probe, efx->net_dev, "%s: failed rc=%d\n", __func__, rc);
|
2009-11-29 23:15:25 +08:00
|
|
|
return rc;
|
|
|
|
}
|
|
|
|
|
|
|
|
int efx_mcdi_get_board_cfg(struct efx_nic *efx, u8 *mac_address,
|
2010-07-14 22:36:19 +08:00
|
|
|
u16 *fw_subtype_list, u32 *capabilities)
|
2009-11-29 23:15:25 +08:00
|
|
|
{
|
2012-09-15 00:30:10 +08:00
|
|
|
MCDI_DECLARE_BUF(outbuf, MC_CMD_GET_BOARD_CFG_OUT_LENMAX);
|
2012-09-15 00:31:33 +08:00
|
|
|
size_t outlen, i;
|
2009-11-29 23:15:25 +08:00
|
|
|
int port_num = efx_port_num(efx);
|
|
|
|
int rc;
|
|
|
|
|
|
|
|
BUILD_BUG_ON(MC_CMD_GET_BOARD_CFG_IN_LEN != 0);
|
2014-03-08 02:27:41 +08:00
|
|
|
/* we need __aligned(2) for ether_addr_copy */
|
|
|
|
BUILD_BUG_ON(MC_CMD_GET_BOARD_CFG_OUT_MAC_ADDR_BASE_PORT0_OFST & 1);
|
|
|
|
BUILD_BUG_ON(MC_CMD_GET_BOARD_CFG_OUT_MAC_ADDR_BASE_PORT1_OFST & 1);
|
2009-11-29 23:15:25 +08:00
|
|
|
|
|
|
|
rc = efx_mcdi_rpc(efx, MC_CMD_GET_BOARD_CFG, NULL, 0,
|
|
|
|
outbuf, sizeof(outbuf), &outlen);
|
|
|
|
if (rc)
|
|
|
|
goto fail;
|
|
|
|
|
2011-12-20 08:44:06 +08:00
|
|
|
if (outlen < MC_CMD_GET_BOARD_CFG_OUT_LENMIN) {
|
2010-04-28 17:27:14 +08:00
|
|
|
rc = -EIO;
|
2009-11-29 23:15:25 +08:00
|
|
|
goto fail;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (mac_address)
|
2014-03-08 02:27:41 +08:00
|
|
|
ether_addr_copy(mac_address,
|
|
|
|
port_num ?
|
|
|
|
MCDI_PTR(outbuf, GET_BOARD_CFG_OUT_MAC_ADDR_BASE_PORT1) :
|
|
|
|
MCDI_PTR(outbuf, GET_BOARD_CFG_OUT_MAC_ADDR_BASE_PORT0));
|
2012-09-07 07:58:10 +08:00
|
|
|
if (fw_subtype_list) {
|
|
|
|
for (i = 0;
|
2012-09-15 00:31:33 +08:00
|
|
|
i < MCDI_VAR_ARRAY_LEN(outlen,
|
|
|
|
GET_BOARD_CFG_OUT_FW_SUBTYPE_LIST);
|
|
|
|
i++)
|
|
|
|
fw_subtype_list[i] = MCDI_ARRAY_WORD(
|
|
|
|
outbuf, GET_BOARD_CFG_OUT_FW_SUBTYPE_LIST, i);
|
|
|
|
for (; i < MC_CMD_GET_BOARD_CFG_OUT_FW_SUBTYPE_LIST_MAXNUM; i++)
|
|
|
|
fw_subtype_list[i] = 0;
|
2012-09-07 07:58:10 +08:00
|
|
|
}
|
2010-07-14 22:36:19 +08:00
|
|
|
if (capabilities) {
|
|
|
|
if (port_num)
|
|
|
|
*capabilities = MCDI_DWORD(outbuf,
|
|
|
|
GET_BOARD_CFG_OUT_CAPABILITIES_PORT1);
|
|
|
|
else
|
|
|
|
*capabilities = MCDI_DWORD(outbuf,
|
|
|
|
GET_BOARD_CFG_OUT_CAPABILITIES_PORT0);
|
|
|
|
}
|
2009-11-29 23:15:25 +08:00
|
|
|
|
|
|
|
return 0;
|
|
|
|
|
|
|
|
fail:
|
2010-06-23 19:30:07 +08:00
|
|
|
netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d len=%d\n",
|
|
|
|
__func__, rc, (int)outlen);
|
2009-11-29 23:15:25 +08:00
|
|
|
|
|
|
|
return rc;
|
|
|
|
}
|
|
|
|
|
|
|
|
int efx_mcdi_log_ctrl(struct efx_nic *efx, bool evq, bool uart, u32 dest_evq)
|
|
|
|
{
|
2012-09-15 00:30:10 +08:00
|
|
|
MCDI_DECLARE_BUF(inbuf, MC_CMD_LOG_CTRL_IN_LEN);
|
2009-11-29 23:15:25 +08:00
|
|
|
u32 dest = 0;
|
|
|
|
int rc;
|
|
|
|
|
|
|
|
if (uart)
|
|
|
|
dest |= MC_CMD_LOG_CTRL_IN_LOG_DEST_UART;
|
|
|
|
if (evq)
|
|
|
|
dest |= MC_CMD_LOG_CTRL_IN_LOG_DEST_EVQ;
|
|
|
|
|
|
|
|
MCDI_SET_DWORD(inbuf, LOG_CTRL_IN_LOG_DEST, dest);
|
|
|
|
MCDI_SET_DWORD(inbuf, LOG_CTRL_IN_LOG_DEST_EVQ, dest_evq);
|
|
|
|
|
|
|
|
BUILD_BUG_ON(MC_CMD_LOG_CTRL_OUT_LEN != 0);
|
|
|
|
|
|
|
|
rc = efx_mcdi_rpc(efx, MC_CMD_LOG_CTRL, inbuf, sizeof(inbuf),
|
|
|
|
NULL, 0, NULL);
|
|
|
|
return rc;
|
|
|
|
}
|
|
|
|
|
|
|
|
int efx_mcdi_nvram_types(struct efx_nic *efx, u32 *nvram_types_out)
|
|
|
|
{
|
2012-09-15 00:30:10 +08:00
|
|
|
MCDI_DECLARE_BUF(outbuf, MC_CMD_NVRAM_TYPES_OUT_LEN);
|
2009-11-29 23:15:25 +08:00
|
|
|
size_t outlen;
|
|
|
|
int rc;
|
|
|
|
|
|
|
|
BUILD_BUG_ON(MC_CMD_NVRAM_TYPES_IN_LEN != 0);
|
|
|
|
|
|
|
|
rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_TYPES, NULL, 0,
|
|
|
|
outbuf, sizeof(outbuf), &outlen);
|
|
|
|
if (rc)
|
|
|
|
goto fail;
|
2010-04-28 17:27:14 +08:00
|
|
|
if (outlen < MC_CMD_NVRAM_TYPES_OUT_LEN) {
|
|
|
|
rc = -EIO;
|
2009-11-29 23:15:25 +08:00
|
|
|
goto fail;
|
2010-04-28 17:27:14 +08:00
|
|
|
}
|
2009-11-29 23:15:25 +08:00
|
|
|
|
|
|
|
*nvram_types_out = MCDI_DWORD(outbuf, NVRAM_TYPES_OUT_TYPES);
|
|
|
|
return 0;
|
|
|
|
|
|
|
|
fail:
|
2010-06-23 19:30:07 +08:00
|
|
|
netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n",
|
|
|
|
__func__, rc);
|
2009-11-29 23:15:25 +08:00
|
|
|
return rc;
|
|
|
|
}
|
|
|
|
|
|
|
|
int efx_mcdi_nvram_info(struct efx_nic *efx, unsigned int type,
|
|
|
|
size_t *size_out, size_t *erase_size_out,
|
|
|
|
bool *protected_out)
|
|
|
|
{
|
2012-09-15 00:30:10 +08:00
|
|
|
MCDI_DECLARE_BUF(inbuf, MC_CMD_NVRAM_INFO_IN_LEN);
|
|
|
|
MCDI_DECLARE_BUF(outbuf, MC_CMD_NVRAM_INFO_OUT_LEN);
|
2009-11-29 23:15:25 +08:00
|
|
|
size_t outlen;
|
|
|
|
int rc;
|
|
|
|
|
|
|
|
MCDI_SET_DWORD(inbuf, NVRAM_INFO_IN_TYPE, type);
|
|
|
|
|
|
|
|
rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_INFO, inbuf, sizeof(inbuf),
|
|
|
|
outbuf, sizeof(outbuf), &outlen);
|
|
|
|
if (rc)
|
|
|
|
goto fail;
|
2010-04-28 17:27:14 +08:00
|
|
|
if (outlen < MC_CMD_NVRAM_INFO_OUT_LEN) {
|
|
|
|
rc = -EIO;
|
2009-11-29 23:15:25 +08:00
|
|
|
goto fail;
|
2010-04-28 17:27:14 +08:00
|
|
|
}
|
2009-11-29 23:15:25 +08:00
|
|
|
|
|
|
|
*size_out = MCDI_DWORD(outbuf, NVRAM_INFO_OUT_SIZE);
|
|
|
|
*erase_size_out = MCDI_DWORD(outbuf, NVRAM_INFO_OUT_ERASESIZE);
|
|
|
|
*protected_out = !!(MCDI_DWORD(outbuf, NVRAM_INFO_OUT_FLAGS) &
|
2011-12-20 08:44:06 +08:00
|
|
|
(1 << MC_CMD_NVRAM_INFO_OUT_PROTECTED_LBN));
|
2009-11-29 23:15:25 +08:00
|
|
|
return 0;
|
|
|
|
|
|
|
|
fail:
|
2010-06-23 19:30:07 +08:00
|
|
|
netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n", __func__, rc);
|
2009-11-29 23:15:25 +08:00
|
|
|
return rc;
|
|
|
|
}
|
|
|
|
|
2010-02-03 17:31:01 +08:00
|
|
|
static int efx_mcdi_nvram_test(struct efx_nic *efx, unsigned int type)
|
|
|
|
{
|
2012-09-15 00:30:10 +08:00
|
|
|
MCDI_DECLARE_BUF(inbuf, MC_CMD_NVRAM_TEST_IN_LEN);
|
|
|
|
MCDI_DECLARE_BUF(outbuf, MC_CMD_NVRAM_TEST_OUT_LEN);
|
2010-02-03 17:31:01 +08:00
|
|
|
int rc;
|
|
|
|
|
|
|
|
MCDI_SET_DWORD(inbuf, NVRAM_TEST_IN_TYPE, type);
|
|
|
|
|
|
|
|
rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_TEST, inbuf, sizeof(inbuf),
|
|
|
|
outbuf, sizeof(outbuf), NULL);
|
|
|
|
if (rc)
|
|
|
|
return rc;
|
|
|
|
|
|
|
|
switch (MCDI_DWORD(outbuf, NVRAM_TEST_OUT_RESULT)) {
|
|
|
|
case MC_CMD_NVRAM_TEST_PASS:
|
|
|
|
case MC_CMD_NVRAM_TEST_NOTSUPP:
|
|
|
|
return 0;
|
|
|
|
default:
|
|
|
|
return -EIO;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
int efx_mcdi_nvram_test_all(struct efx_nic *efx)
|
|
|
|
{
|
|
|
|
u32 nvram_types;
|
|
|
|
unsigned int type;
|
|
|
|
int rc;
|
|
|
|
|
|
|
|
rc = efx_mcdi_nvram_types(efx, &nvram_types);
|
|
|
|
if (rc)
|
2010-04-28 17:28:36 +08:00
|
|
|
goto fail1;
|
2010-02-03 17:31:01 +08:00
|
|
|
|
|
|
|
type = 0;
|
|
|
|
while (nvram_types != 0) {
|
|
|
|
if (nvram_types & 1) {
|
|
|
|
rc = efx_mcdi_nvram_test(efx, type);
|
|
|
|
if (rc)
|
2010-04-28 17:28:36 +08:00
|
|
|
goto fail2;
|
2010-02-03 17:31:01 +08:00
|
|
|
}
|
|
|
|
type++;
|
|
|
|
nvram_types >>= 1;
|
|
|
|
}
|
|
|
|
|
|
|
|
return 0;
|
2010-04-28 17:28:36 +08:00
|
|
|
|
|
|
|
fail2:
|
2010-06-23 19:30:07 +08:00
|
|
|
netif_err(efx, hw, efx->net_dev, "%s: failed type=%u\n",
|
|
|
|
__func__, type);
|
2010-04-28 17:28:36 +08:00
|
|
|
fail1:
|
2010-06-23 19:30:07 +08:00
|
|
|
netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n", __func__, rc);
|
2010-04-28 17:28:36 +08:00
|
|
|
return rc;
|
2010-02-03 17:31:01 +08:00
|
|
|
}
|
|
|
|
|
2010-02-03 17:30:17 +08:00
|
|
|
static int efx_mcdi_read_assertion(struct efx_nic *efx)
|
2009-11-29 23:15:25 +08:00
|
|
|
{
|
2012-09-15 00:30:10 +08:00
|
|
|
MCDI_DECLARE_BUF(inbuf, MC_CMD_GET_ASSERTS_IN_LEN);
|
2013-06-01 01:36:12 +08:00
|
|
|
MCDI_DECLARE_BUF_OUT_OR_ERR(outbuf, MC_CMD_GET_ASSERTS_OUT_LEN);
|
2012-09-15 00:31:33 +08:00
|
|
|
unsigned int flags, index;
|
2009-11-29 23:15:25 +08:00
|
|
|
const char *reason;
|
|
|
|
size_t outlen;
|
|
|
|
int retry;
|
|
|
|
int rc;
|
|
|
|
|
2010-02-03 17:30:17 +08:00
|
|
|
/* Attempt to read any stored assertion state before we reboot
|
|
|
|
* the mcfw out of the assertion handler. Retry twice, once
|
2009-11-29 23:15:25 +08:00
|
|
|
* because a boot-time assertion might cause this command to fail
|
|
|
|
* with EINTR. And once again because GET_ASSERTS can race with
|
|
|
|
* MC_CMD_REBOOT running on the other port. */
|
|
|
|
retry = 2;
|
|
|
|
do {
|
2010-02-03 17:30:17 +08:00
|
|
|
MCDI_SET_DWORD(inbuf, GET_ASSERTS_IN_CLEAR, 1);
|
2013-06-01 01:36:12 +08:00
|
|
|
rc = efx_mcdi_rpc_quiet(efx, MC_CMD_GET_ASSERTS,
|
|
|
|
inbuf, MC_CMD_GET_ASSERTS_IN_LEN,
|
|
|
|
outbuf, sizeof(outbuf), &outlen);
|
2009-11-29 23:15:25 +08:00
|
|
|
} while ((rc == -EINTR || rc == -EIO) && retry-- > 0);
|
|
|
|
|
2013-06-01 01:36:12 +08:00
|
|
|
if (rc) {
|
|
|
|
efx_mcdi_display_error(efx, MC_CMD_GET_ASSERTS,
|
|
|
|
MC_CMD_GET_ASSERTS_IN_LEN, outbuf,
|
|
|
|
outlen, rc);
|
2009-11-29 23:15:25 +08:00
|
|
|
return rc;
|
2013-06-01 01:36:12 +08:00
|
|
|
}
|
2009-11-29 23:15:25 +08:00
|
|
|
if (outlen < MC_CMD_GET_ASSERTS_OUT_LEN)
|
2010-04-28 17:27:14 +08:00
|
|
|
return -EIO;
|
2009-11-29 23:15:25 +08:00
|
|
|
|
2010-02-03 17:30:17 +08:00
|
|
|
/* Print out any recorded assertion state */
|
|
|
|
flags = MCDI_DWORD(outbuf, GET_ASSERTS_OUT_GLOBAL_FLAGS);
|
2009-11-29 23:15:25 +08:00
|
|
|
if (flags == MC_CMD_GET_ASSERTS_FLAGS_NO_FAILS)
|
|
|
|
return 0;
|
|
|
|
|
|
|
|
reason = (flags == MC_CMD_GET_ASSERTS_FLAGS_SYS_FAIL)
|
|
|
|
? "system-level assertion"
|
|
|
|
: (flags == MC_CMD_GET_ASSERTS_FLAGS_THR_FAIL)
|
|
|
|
? "thread-level assertion"
|
|
|
|
: (flags == MC_CMD_GET_ASSERTS_FLAGS_WDOG_FIRED)
|
|
|
|
? "watchdog reset"
|
|
|
|
: "unknown assertion";
|
2010-06-23 19:30:07 +08:00
|
|
|
netif_err(efx, hw, efx->net_dev,
|
|
|
|
"MCPU %s at PC = 0x%.8x in thread 0x%.8x\n", reason,
|
|
|
|
MCDI_DWORD(outbuf, GET_ASSERTS_OUT_SAVED_PC_OFFS),
|
|
|
|
MCDI_DWORD(outbuf, GET_ASSERTS_OUT_THREAD_OFFS));
|
2009-11-29 23:15:25 +08:00
|
|
|
|
|
|
|
/* Print out the registers */
|
2012-09-15 00:31:33 +08:00
|
|
|
for (index = 0;
|
|
|
|
index < MC_CMD_GET_ASSERTS_OUT_GP_REGS_OFFS_NUM;
|
|
|
|
index++)
|
|
|
|
netif_err(efx, hw, efx->net_dev, "R%.2d (?): 0x%.8x\n",
|
|
|
|
1 + index,
|
|
|
|
MCDI_ARRAY_DWORD(outbuf, GET_ASSERTS_OUT_GP_REGS_OFFS,
|
|
|
|
index));
|
2009-11-29 23:15:25 +08:00
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2010-02-03 17:30:17 +08:00
|
|
|
static void efx_mcdi_exit_assertion(struct efx_nic *efx)
|
|
|
|
{
|
2012-09-15 00:30:10 +08:00
|
|
|
MCDI_DECLARE_BUF(inbuf, MC_CMD_REBOOT_IN_LEN);
|
2010-02-03 17:30:17 +08:00
|
|
|
|
2012-07-03 06:37:40 +08:00
|
|
|
/* If the MC is running debug firmware, it might now be
|
|
|
|
* waiting for a debugger to attach, but we just want it to
|
|
|
|
* reboot. We set a flag that makes the command a no-op if it
|
|
|
|
* has already done so. We don't know what return code to
|
|
|
|
* expect (0 or -EIO), so ignore it.
|
|
|
|
*/
|
2010-02-03 17:30:17 +08:00
|
|
|
BUILD_BUG_ON(MC_CMD_REBOOT_OUT_LEN != 0);
|
|
|
|
MCDI_SET_DWORD(inbuf, REBOOT_IN_FLAGS,
|
|
|
|
MC_CMD_REBOOT_FLAGS_AFTER_ASSERTION);
|
2012-07-03 06:37:40 +08:00
|
|
|
(void) efx_mcdi_rpc(efx, MC_CMD_REBOOT, inbuf, MC_CMD_REBOOT_IN_LEN,
|
|
|
|
NULL, 0, NULL);
|
2010-02-03 17:30:17 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
int efx_mcdi_handle_assertion(struct efx_nic *efx)
|
|
|
|
{
|
|
|
|
int rc;
|
|
|
|
|
|
|
|
rc = efx_mcdi_read_assertion(efx);
|
|
|
|
if (rc)
|
|
|
|
return rc;
|
|
|
|
|
|
|
|
efx_mcdi_exit_assertion(efx);
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2009-11-29 23:15:25 +08:00
|
|
|
void efx_mcdi_set_id_led(struct efx_nic *efx, enum efx_led_mode mode)
|
|
|
|
{
|
2012-09-15 00:30:10 +08:00
|
|
|
MCDI_DECLARE_BUF(inbuf, MC_CMD_SET_ID_LED_IN_LEN);
|
2009-11-29 23:15:25 +08:00
|
|
|
int rc;
|
|
|
|
|
|
|
|
BUILD_BUG_ON(EFX_LED_OFF != MC_CMD_LED_OFF);
|
|
|
|
BUILD_BUG_ON(EFX_LED_ON != MC_CMD_LED_ON);
|
|
|
|
BUILD_BUG_ON(EFX_LED_DEFAULT != MC_CMD_LED_DEFAULT);
|
|
|
|
|
|
|
|
BUILD_BUG_ON(MC_CMD_SET_ID_LED_OUT_LEN != 0);
|
|
|
|
|
|
|
|
MCDI_SET_DWORD(inbuf, SET_ID_LED_IN_STATE, mode);
|
|
|
|
|
|
|
|
rc = efx_mcdi_rpc(efx, MC_CMD_SET_ID_LED, inbuf, sizeof(inbuf),
|
|
|
|
NULL, 0, NULL);
|
|
|
|
}
|
|
|
|
|
2014-01-18 03:48:06 +08:00
|
|
|
static int efx_mcdi_reset_func(struct efx_nic *efx)
|
2009-11-29 23:15:25 +08:00
|
|
|
{
|
2014-01-18 03:48:06 +08:00
|
|
|
MCDI_DECLARE_BUF(inbuf, MC_CMD_ENTITY_RESET_IN_LEN);
|
|
|
|
int rc;
|
|
|
|
|
|
|
|
BUILD_BUG_ON(MC_CMD_ENTITY_RESET_OUT_LEN != 0);
|
|
|
|
MCDI_POPULATE_DWORD_1(inbuf, ENTITY_RESET_IN_FLAG,
|
|
|
|
ENTITY_RESET_IN_FUNCTION_RESOURCE_RESET, 1);
|
|
|
|
rc = efx_mcdi_rpc(efx, MC_CMD_ENTITY_RESET, inbuf, sizeof(inbuf),
|
|
|
|
NULL, 0, NULL);
|
|
|
|
return rc;
|
2009-11-29 23:15:25 +08:00
|
|
|
}
|
|
|
|
|
2012-09-18 09:33:52 +08:00
|
|
|
static int efx_mcdi_reset_mc(struct efx_nic *efx)
|
2009-11-29 23:15:25 +08:00
|
|
|
{
|
2012-09-15 00:30:10 +08:00
|
|
|
MCDI_DECLARE_BUF(inbuf, MC_CMD_REBOOT_IN_LEN);
|
2009-11-29 23:15:25 +08:00
|
|
|
int rc;
|
|
|
|
|
|
|
|
BUILD_BUG_ON(MC_CMD_REBOOT_OUT_LEN != 0);
|
|
|
|
MCDI_SET_DWORD(inbuf, REBOOT_IN_FLAGS, 0);
|
|
|
|
rc = efx_mcdi_rpc(efx, MC_CMD_REBOOT, inbuf, sizeof(inbuf),
|
|
|
|
NULL, 0, NULL);
|
|
|
|
/* White is black, and up is down */
|
|
|
|
if (rc == -EIO)
|
|
|
|
return 0;
|
|
|
|
if (rc == 0)
|
|
|
|
rc = -EIO;
|
|
|
|
return rc;
|
|
|
|
}
|
|
|
|
|
2012-09-18 09:33:52 +08:00
|
|
|
enum reset_type efx_mcdi_map_reset_reason(enum reset_type reason)
|
|
|
|
{
|
|
|
|
return RESET_TYPE_RECOVER_OR_ALL;
|
|
|
|
}
|
|
|
|
|
|
|
|
int efx_mcdi_reset(struct efx_nic *efx, enum reset_type method)
|
|
|
|
{
|
|
|
|
int rc;
|
|
|
|
|
sfc:On MCDI timeout, issue an FLR (and mark MCDI to fail-fast)
When an MCDI command times out (whether or not we find it
completed when we poll), call efx_mcdi_abandon(), which tells
all subsequent MCDI calls to fail-fast, and queues up an FLR.
Because an FLR doesn't lead to receiving any reboot even from
the MC (unlike most other types of reset), we have to call
efx_ef10_reset_mc_allocations.
In efx_start_all(), if a reset (of any kind) is pending, we
bail out.
Without this, attempts to reconfigure (e.g. change mtu) can
cause driver/mc state inconsistency if the first MCDI call
triggers an FLR.
For similar reasons, on EF10, in
efx_reset_down(method=RESET_TYPE_MCDI_TIMEOUT), set the number
of active queues to zero before calling efx_stop_all().
And, on farch, in efx_reset_up(method=RESET_TYPE_MCDI_TIMEOUT),
set active_queues and flushes pending & outstanding to zero.
efx_mcdi_mode_{poll,event}() should not take us out of fail-fast
mode. Instead, this is done by efx_mcdi_reset() after the FLR
completes.
The new FLR reset_type RESET_TYPE_MCDI_TIMEOUT doesn't really
fit into the hierarchy of reset 'scopes' whereby efx_reset()
decides some resets subsume others. Thus, it uses separate logic.
Also, fixed up some inconsistency around RESET_TYPE_MC_BIST,
which was in the wrong place in that hierarchy.
Signed-off-by: Shradha Shah <sshah@solarflare.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2014-04-17 02:27:48 +08:00
|
|
|
/* If MCDI is down, we can't handle_assertion */
|
|
|
|
if (method == RESET_TYPE_MCDI_TIMEOUT) {
|
|
|
|
rc = pci_reset_function(efx->pci_dev);
|
|
|
|
if (rc)
|
|
|
|
return rc;
|
|
|
|
/* Re-enable polled MCDI completion */
|
|
|
|
if (efx->mcdi) {
|
|
|
|
struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
|
|
|
|
mcdi->mode = MCDI_MODE_POLL;
|
|
|
|
}
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2012-09-18 09:33:52 +08:00
|
|
|
/* Recover from a failed assertion pre-reset */
|
|
|
|
rc = efx_mcdi_handle_assertion(efx);
|
|
|
|
if (rc)
|
|
|
|
return rc;
|
|
|
|
|
|
|
|
if (method == RESET_TYPE_WORLD)
|
|
|
|
return efx_mcdi_reset_mc(efx);
|
|
|
|
else
|
2014-01-18 03:48:06 +08:00
|
|
|
return efx_mcdi_reset_func(efx);
|
2012-09-18 09:33:52 +08:00
|
|
|
}
|
|
|
|
|
2010-10-18 13:27:31 +08:00
|
|
|
static int efx_mcdi_wol_filter_set(struct efx_nic *efx, u32 type,
|
|
|
|
const u8 *mac, int *id_out)
|
2009-11-29 23:15:25 +08:00
|
|
|
{
|
2012-09-15 00:30:10 +08:00
|
|
|
MCDI_DECLARE_BUF(inbuf, MC_CMD_WOL_FILTER_SET_IN_LEN);
|
|
|
|
MCDI_DECLARE_BUF(outbuf, MC_CMD_WOL_FILTER_SET_OUT_LEN);
|
2009-11-29 23:15:25 +08:00
|
|
|
size_t outlen;
|
|
|
|
int rc;
|
|
|
|
|
|
|
|
MCDI_SET_DWORD(inbuf, WOL_FILTER_SET_IN_WOL_TYPE, type);
|
|
|
|
MCDI_SET_DWORD(inbuf, WOL_FILTER_SET_IN_FILTER_MODE,
|
|
|
|
MC_CMD_FILTER_MODE_SIMPLE);
|
2014-03-08 02:27:41 +08:00
|
|
|
ether_addr_copy(MCDI_PTR(inbuf, WOL_FILTER_SET_IN_MAGIC_MAC), mac);
|
2009-11-29 23:15:25 +08:00
|
|
|
|
|
|
|
rc = efx_mcdi_rpc(efx, MC_CMD_WOL_FILTER_SET, inbuf, sizeof(inbuf),
|
|
|
|
outbuf, sizeof(outbuf), &outlen);
|
|
|
|
if (rc)
|
|
|
|
goto fail;
|
|
|
|
|
|
|
|
if (outlen < MC_CMD_WOL_FILTER_SET_OUT_LEN) {
|
2010-04-28 17:27:14 +08:00
|
|
|
rc = -EIO;
|
2009-11-29 23:15:25 +08:00
|
|
|
goto fail;
|
|
|
|
}
|
|
|
|
|
|
|
|
*id_out = (int)MCDI_DWORD(outbuf, WOL_FILTER_SET_OUT_FILTER_ID);
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
|
|
|
|
fail:
|
|
|
|
*id_out = -1;
|
2010-06-23 19:30:07 +08:00
|
|
|
netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n", __func__, rc);
|
2009-11-29 23:15:25 +08:00
|
|
|
return rc;
|
|
|
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
int
|
|
|
|
efx_mcdi_wol_filter_set_magic(struct efx_nic *efx, const u8 *mac, int *id_out)
|
|
|
|
{
|
|
|
|
return efx_mcdi_wol_filter_set(efx, MC_CMD_WOL_TYPE_MAGIC, mac, id_out);
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
int efx_mcdi_wol_filter_get_magic(struct efx_nic *efx, int *id_out)
|
|
|
|
{
|
2012-09-15 00:30:10 +08:00
|
|
|
MCDI_DECLARE_BUF(outbuf, MC_CMD_WOL_FILTER_GET_OUT_LEN);
|
2009-11-29 23:15:25 +08:00
|
|
|
size_t outlen;
|
|
|
|
int rc;
|
|
|
|
|
|
|
|
rc = efx_mcdi_rpc(efx, MC_CMD_WOL_FILTER_GET, NULL, 0,
|
|
|
|
outbuf, sizeof(outbuf), &outlen);
|
|
|
|
if (rc)
|
|
|
|
goto fail;
|
|
|
|
|
|
|
|
if (outlen < MC_CMD_WOL_FILTER_GET_OUT_LEN) {
|
2010-04-28 17:27:14 +08:00
|
|
|
rc = -EIO;
|
2009-11-29 23:15:25 +08:00
|
|
|
goto fail;
|
|
|
|
}
|
|
|
|
|
|
|
|
*id_out = (int)MCDI_DWORD(outbuf, WOL_FILTER_GET_OUT_FILTER_ID);
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
|
|
|
|
fail:
|
|
|
|
*id_out = -1;
|
2010-06-23 19:30:07 +08:00
|
|
|
netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n", __func__, rc);
|
2009-11-29 23:15:25 +08:00
|
|
|
return rc;
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
int efx_mcdi_wol_filter_remove(struct efx_nic *efx, int id)
|
|
|
|
{
|
2012-09-15 00:30:10 +08:00
|
|
|
MCDI_DECLARE_BUF(inbuf, MC_CMD_WOL_FILTER_REMOVE_IN_LEN);
|
2009-11-29 23:15:25 +08:00
|
|
|
int rc;
|
|
|
|
|
|
|
|
MCDI_SET_DWORD(inbuf, WOL_FILTER_REMOVE_IN_FILTER_ID, (u32)id);
|
|
|
|
|
|
|
|
rc = efx_mcdi_rpc(efx, MC_CMD_WOL_FILTER_REMOVE, inbuf, sizeof(inbuf),
|
|
|
|
NULL, 0, NULL);
|
|
|
|
return rc;
|
|
|
|
}
|
|
|
|
|
sfc: Add SR-IOV back-end support for SFC9000 family
On the SFC9000 family, each port has 1024 Virtual Interfaces (VIs),
each with an RX queue, a TX queue, an event queue and a mailbox
register. These may be assigned to up to 127 SR-IOV virtual functions
per port, with up to 64 VIs per VF.
We allocate an extra channel (IRQ and event queue only) to receive
requests from VF drivers.
There is a per-port limit of 4 concurrent RX queue flushes, and queue
flushes may be initiated by the MC in response to a Function Level
Reset (FLR) of a VF. Therefore, when SR-IOV is in use, we submit all
flush requests via the MC.
The RSS indirection table is shared with VFs, so the number of RX
queues used in the PF is limited to the number of VIs per VF.
This is almost entirely the work of Steve Hodgson, formerly
shodgson@solarflare.com.
Signed-off-by: Ben Hutchings <bhutchings@solarflare.com>
2012-02-14 08:48:07 +08:00
|
|
|
int efx_mcdi_flush_rxqs(struct efx_nic *efx)
|
|
|
|
{
|
|
|
|
struct efx_channel *channel;
|
|
|
|
struct efx_rx_queue *rx_queue;
|
2012-09-15 00:31:33 +08:00
|
|
|
MCDI_DECLARE_BUF(inbuf,
|
|
|
|
MC_CMD_FLUSH_RX_QUEUES_IN_LEN(EFX_MAX_CHANNELS));
|
sfc: Add SR-IOV back-end support for SFC9000 family
On the SFC9000 family, each port has 1024 Virtual Interfaces (VIs),
each with an RX queue, a TX queue, an event queue and a mailbox
register. These may be assigned to up to 127 SR-IOV virtual functions
per port, with up to 64 VIs per VF.
We allocate an extra channel (IRQ and event queue only) to receive
requests from VF drivers.
There is a per-port limit of 4 concurrent RX queue flushes, and queue
flushes may be initiated by the MC in response to a Function Level
Reset (FLR) of a VF. Therefore, when SR-IOV is in use, we submit all
flush requests via the MC.
The RSS indirection table is shared with VFs, so the number of RX
queues used in the PF is limited to the number of VIs per VF.
This is almost entirely the work of Steve Hodgson, formerly
shodgson@solarflare.com.
Signed-off-by: Ben Hutchings <bhutchings@solarflare.com>
2012-02-14 08:48:07 +08:00
|
|
|
int rc, count;
|
|
|
|
|
2012-09-19 09:53:34 +08:00
|
|
|
BUILD_BUG_ON(EFX_MAX_CHANNELS >
|
|
|
|
MC_CMD_FLUSH_RX_QUEUES_IN_QID_OFST_MAXNUM);
|
|
|
|
|
sfc: Add SR-IOV back-end support for SFC9000 family
On the SFC9000 family, each port has 1024 Virtual Interfaces (VIs),
each with an RX queue, a TX queue, an event queue and a mailbox
register. These may be assigned to up to 127 SR-IOV virtual functions
per port, with up to 64 VIs per VF.
We allocate an extra channel (IRQ and event queue only) to receive
requests from VF drivers.
There is a per-port limit of 4 concurrent RX queue flushes, and queue
flushes may be initiated by the MC in response to a Function Level
Reset (FLR) of a VF. Therefore, when SR-IOV is in use, we submit all
flush requests via the MC.
The RSS indirection table is shared with VFs, so the number of RX
queues used in the PF is limited to the number of VIs per VF.
This is almost entirely the work of Steve Hodgson, formerly
shodgson@solarflare.com.
Signed-off-by: Ben Hutchings <bhutchings@solarflare.com>
2012-02-14 08:48:07 +08:00
|
|
|
count = 0;
|
|
|
|
efx_for_each_channel(channel, efx) {
|
|
|
|
efx_for_each_channel_rx_queue(rx_queue, channel) {
|
|
|
|
if (rx_queue->flush_pending) {
|
|
|
|
rx_queue->flush_pending = false;
|
|
|
|
atomic_dec(&efx->rxq_flush_pending);
|
2012-09-15 00:31:33 +08:00
|
|
|
MCDI_SET_ARRAY_DWORD(
|
|
|
|
inbuf, FLUSH_RX_QUEUES_IN_QID_OFST,
|
|
|
|
count, efx_rx_queue_index(rx_queue));
|
|
|
|
count++;
|
sfc: Add SR-IOV back-end support for SFC9000 family
On the SFC9000 family, each port has 1024 Virtual Interfaces (VIs),
each with an RX queue, a TX queue, an event queue and a mailbox
register. These may be assigned to up to 127 SR-IOV virtual functions
per port, with up to 64 VIs per VF.
We allocate an extra channel (IRQ and event queue only) to receive
requests from VF drivers.
There is a per-port limit of 4 concurrent RX queue flushes, and queue
flushes may be initiated by the MC in response to a Function Level
Reset (FLR) of a VF. Therefore, when SR-IOV is in use, we submit all
flush requests via the MC.
The RSS indirection table is shared with VFs, so the number of RX
queues used in the PF is limited to the number of VIs per VF.
This is almost entirely the work of Steve Hodgson, formerly
shodgson@solarflare.com.
Signed-off-by: Ben Hutchings <bhutchings@solarflare.com>
2012-02-14 08:48:07 +08:00
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2012-09-15 00:31:33 +08:00
|
|
|
rc = efx_mcdi_rpc(efx, MC_CMD_FLUSH_RX_QUEUES, inbuf,
|
|
|
|
MC_CMD_FLUSH_RX_QUEUES_IN_LEN(count), NULL, 0, NULL);
|
2012-09-12 01:25:13 +08:00
|
|
|
WARN_ON(rc < 0);
|
sfc: Add SR-IOV back-end support for SFC9000 family
On the SFC9000 family, each port has 1024 Virtual Interfaces (VIs),
each with an RX queue, a TX queue, an event queue and a mailbox
register. These may be assigned to up to 127 SR-IOV virtual functions
per port, with up to 64 VIs per VF.
We allocate an extra channel (IRQ and event queue only) to receive
requests from VF drivers.
There is a per-port limit of 4 concurrent RX queue flushes, and queue
flushes may be initiated by the MC in response to a Function Level
Reset (FLR) of a VF. Therefore, when SR-IOV is in use, we submit all
flush requests via the MC.
The RSS indirection table is shared with VFs, so the number of RX
queues used in the PF is limited to the number of VIs per VF.
This is almost entirely the work of Steve Hodgson, formerly
shodgson@solarflare.com.
Signed-off-by: Ben Hutchings <bhutchings@solarflare.com>
2012-02-14 08:48:07 +08:00
|
|
|
|
|
|
|
return rc;
|
|
|
|
}
|
2009-11-29 23:15:25 +08:00
|
|
|
|
|
|
|
int efx_mcdi_wol_filter_reset(struct efx_nic *efx)
|
|
|
|
{
|
|
|
|
int rc;
|
|
|
|
|
|
|
|
rc = efx_mcdi_rpc(efx, MC_CMD_WOL_FILTER_RESET, NULL, 0, NULL, 0, NULL);
|
|
|
|
return rc;
|
|
|
|
}
|
|
|
|
|
2013-08-30 02:19:29 +08:00
|
|
|
int efx_mcdi_set_workaround(struct efx_nic *efx, u32 type, bool enabled)
|
|
|
|
{
|
|
|
|
MCDI_DECLARE_BUF(inbuf, MC_CMD_WORKAROUND_IN_LEN);
|
|
|
|
|
|
|
|
BUILD_BUG_ON(MC_CMD_WORKAROUND_OUT_LEN != 0);
|
|
|
|
MCDI_SET_DWORD(inbuf, WORKAROUND_IN_TYPE, type);
|
|
|
|
MCDI_SET_DWORD(inbuf, WORKAROUND_IN_ENABLED, enabled);
|
|
|
|
return efx_mcdi_rpc(efx, MC_CMD_WORKAROUND, inbuf, sizeof(inbuf),
|
|
|
|
NULL, 0, NULL);
|
|
|
|
}
|
|
|
|
|
2012-11-28 12:38:14 +08:00
|
|
|
#ifdef CONFIG_SFC_MTD
|
|
|
|
|
|
|
|
#define EFX_MCDI_NVRAM_LEN_MAX 128
|
|
|
|
|
|
|
|
static int efx_mcdi_nvram_update_start(struct efx_nic *efx, unsigned int type)
|
|
|
|
{
|
|
|
|
MCDI_DECLARE_BUF(inbuf, MC_CMD_NVRAM_UPDATE_START_IN_LEN);
|
|
|
|
int rc;
|
|
|
|
|
|
|
|
MCDI_SET_DWORD(inbuf, NVRAM_UPDATE_START_IN_TYPE, type);
|
|
|
|
|
|
|
|
BUILD_BUG_ON(MC_CMD_NVRAM_UPDATE_START_OUT_LEN != 0);
|
|
|
|
|
|
|
|
rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_UPDATE_START, inbuf, sizeof(inbuf),
|
|
|
|
NULL, 0, NULL);
|
|
|
|
return rc;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int efx_mcdi_nvram_read(struct efx_nic *efx, unsigned int type,
|
|
|
|
loff_t offset, u8 *buffer, size_t length)
|
|
|
|
{
|
|
|
|
MCDI_DECLARE_BUF(inbuf, MC_CMD_NVRAM_READ_IN_LEN);
|
|
|
|
MCDI_DECLARE_BUF(outbuf,
|
|
|
|
MC_CMD_NVRAM_READ_OUT_LEN(EFX_MCDI_NVRAM_LEN_MAX));
|
|
|
|
size_t outlen;
|
|
|
|
int rc;
|
|
|
|
|
|
|
|
MCDI_SET_DWORD(inbuf, NVRAM_READ_IN_TYPE, type);
|
|
|
|
MCDI_SET_DWORD(inbuf, NVRAM_READ_IN_OFFSET, offset);
|
|
|
|
MCDI_SET_DWORD(inbuf, NVRAM_READ_IN_LENGTH, length);
|
|
|
|
|
|
|
|
rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_READ, inbuf, sizeof(inbuf),
|
|
|
|
outbuf, sizeof(outbuf), &outlen);
|
|
|
|
if (rc)
|
2013-06-01 01:36:12 +08:00
|
|
|
return rc;
|
2012-11-28 12:38:14 +08:00
|
|
|
|
|
|
|
memcpy(buffer, MCDI_PTR(outbuf, NVRAM_READ_OUT_READ_BUFFER), length);
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int efx_mcdi_nvram_write(struct efx_nic *efx, unsigned int type,
|
|
|
|
loff_t offset, const u8 *buffer, size_t length)
|
|
|
|
{
|
|
|
|
MCDI_DECLARE_BUF(inbuf,
|
|
|
|
MC_CMD_NVRAM_WRITE_IN_LEN(EFX_MCDI_NVRAM_LEN_MAX));
|
|
|
|
int rc;
|
|
|
|
|
|
|
|
MCDI_SET_DWORD(inbuf, NVRAM_WRITE_IN_TYPE, type);
|
|
|
|
MCDI_SET_DWORD(inbuf, NVRAM_WRITE_IN_OFFSET, offset);
|
|
|
|
MCDI_SET_DWORD(inbuf, NVRAM_WRITE_IN_LENGTH, length);
|
|
|
|
memcpy(MCDI_PTR(inbuf, NVRAM_WRITE_IN_WRITE_BUFFER), buffer, length);
|
|
|
|
|
|
|
|
BUILD_BUG_ON(MC_CMD_NVRAM_WRITE_OUT_LEN != 0);
|
|
|
|
|
|
|
|
rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_WRITE, inbuf,
|
|
|
|
ALIGN(MC_CMD_NVRAM_WRITE_IN_LEN(length), 4),
|
|
|
|
NULL, 0, NULL);
|
|
|
|
return rc;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int efx_mcdi_nvram_erase(struct efx_nic *efx, unsigned int type,
|
|
|
|
loff_t offset, size_t length)
|
|
|
|
{
|
|
|
|
MCDI_DECLARE_BUF(inbuf, MC_CMD_NVRAM_ERASE_IN_LEN);
|
|
|
|
int rc;
|
|
|
|
|
|
|
|
MCDI_SET_DWORD(inbuf, NVRAM_ERASE_IN_TYPE, type);
|
|
|
|
MCDI_SET_DWORD(inbuf, NVRAM_ERASE_IN_OFFSET, offset);
|
|
|
|
MCDI_SET_DWORD(inbuf, NVRAM_ERASE_IN_LENGTH, length);
|
|
|
|
|
|
|
|
BUILD_BUG_ON(MC_CMD_NVRAM_ERASE_OUT_LEN != 0);
|
|
|
|
|
|
|
|
rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_ERASE, inbuf, sizeof(inbuf),
|
|
|
|
NULL, 0, NULL);
|
|
|
|
return rc;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int efx_mcdi_nvram_update_finish(struct efx_nic *efx, unsigned int type)
|
|
|
|
{
|
|
|
|
MCDI_DECLARE_BUF(inbuf, MC_CMD_NVRAM_UPDATE_FINISH_IN_LEN);
|
|
|
|
int rc;
|
|
|
|
|
|
|
|
MCDI_SET_DWORD(inbuf, NVRAM_UPDATE_FINISH_IN_TYPE, type);
|
|
|
|
|
|
|
|
BUILD_BUG_ON(MC_CMD_NVRAM_UPDATE_FINISH_OUT_LEN != 0);
|
|
|
|
|
|
|
|
rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_UPDATE_FINISH, inbuf, sizeof(inbuf),
|
|
|
|
NULL, 0, NULL);
|
|
|
|
return rc;
|
|
|
|
}
|
|
|
|
|
|
|
|
int efx_mcdi_mtd_read(struct mtd_info *mtd, loff_t start,
|
|
|
|
size_t len, size_t *retlen, u8 *buffer)
|
|
|
|
{
|
|
|
|
struct efx_mcdi_mtd_partition *part = to_efx_mcdi_mtd_partition(mtd);
|
|
|
|
struct efx_nic *efx = mtd->priv;
|
|
|
|
loff_t offset = start;
|
|
|
|
loff_t end = min_t(loff_t, start + len, mtd->size);
|
|
|
|
size_t chunk;
|
|
|
|
int rc = 0;
|
|
|
|
|
|
|
|
while (offset < end) {
|
|
|
|
chunk = min_t(size_t, end - offset, EFX_MCDI_NVRAM_LEN_MAX);
|
|
|
|
rc = efx_mcdi_nvram_read(efx, part->nvram_type, offset,
|
|
|
|
buffer, chunk);
|
|
|
|
if (rc)
|
|
|
|
goto out;
|
|
|
|
offset += chunk;
|
|
|
|
buffer += chunk;
|
|
|
|
}
|
|
|
|
out:
|
|
|
|
*retlen = offset - start;
|
|
|
|
return rc;
|
|
|
|
}
|
|
|
|
|
|
|
|
int efx_mcdi_mtd_erase(struct mtd_info *mtd, loff_t start, size_t len)
|
|
|
|
{
|
|
|
|
struct efx_mcdi_mtd_partition *part = to_efx_mcdi_mtd_partition(mtd);
|
|
|
|
struct efx_nic *efx = mtd->priv;
|
|
|
|
loff_t offset = start & ~((loff_t)(mtd->erasesize - 1));
|
|
|
|
loff_t end = min_t(loff_t, start + len, mtd->size);
|
|
|
|
size_t chunk = part->common.mtd.erasesize;
|
|
|
|
int rc = 0;
|
|
|
|
|
|
|
|
if (!part->updating) {
|
|
|
|
rc = efx_mcdi_nvram_update_start(efx, part->nvram_type);
|
|
|
|
if (rc)
|
|
|
|
goto out;
|
|
|
|
part->updating = true;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* The MCDI interface can in fact do multiple erase blocks at once;
|
|
|
|
* but erasing may be slow, so we make multiple calls here to avoid
|
|
|
|
* tripping the MCDI RPC timeout. */
|
|
|
|
while (offset < end) {
|
|
|
|
rc = efx_mcdi_nvram_erase(efx, part->nvram_type, offset,
|
|
|
|
chunk);
|
|
|
|
if (rc)
|
|
|
|
goto out;
|
|
|
|
offset += chunk;
|
|
|
|
}
|
|
|
|
out:
|
|
|
|
return rc;
|
|
|
|
}
|
|
|
|
|
|
|
|
int efx_mcdi_mtd_write(struct mtd_info *mtd, loff_t start,
|
|
|
|
size_t len, size_t *retlen, const u8 *buffer)
|
|
|
|
{
|
|
|
|
struct efx_mcdi_mtd_partition *part = to_efx_mcdi_mtd_partition(mtd);
|
|
|
|
struct efx_nic *efx = mtd->priv;
|
|
|
|
loff_t offset = start;
|
|
|
|
loff_t end = min_t(loff_t, start + len, mtd->size);
|
|
|
|
size_t chunk;
|
|
|
|
int rc = 0;
|
|
|
|
|
|
|
|
if (!part->updating) {
|
|
|
|
rc = efx_mcdi_nvram_update_start(efx, part->nvram_type);
|
|
|
|
if (rc)
|
|
|
|
goto out;
|
|
|
|
part->updating = true;
|
|
|
|
}
|
|
|
|
|
|
|
|
while (offset < end) {
|
|
|
|
chunk = min_t(size_t, end - offset, EFX_MCDI_NVRAM_LEN_MAX);
|
|
|
|
rc = efx_mcdi_nvram_write(efx, part->nvram_type, offset,
|
|
|
|
buffer, chunk);
|
|
|
|
if (rc)
|
|
|
|
goto out;
|
|
|
|
offset += chunk;
|
|
|
|
buffer += chunk;
|
|
|
|
}
|
|
|
|
out:
|
|
|
|
*retlen = offset - start;
|
|
|
|
return rc;
|
|
|
|
}
|
|
|
|
|
|
|
|
int efx_mcdi_mtd_sync(struct mtd_info *mtd)
|
|
|
|
{
|
|
|
|
struct efx_mcdi_mtd_partition *part = to_efx_mcdi_mtd_partition(mtd);
|
|
|
|
struct efx_nic *efx = mtd->priv;
|
|
|
|
int rc = 0;
|
|
|
|
|
|
|
|
if (part->updating) {
|
|
|
|
part->updating = false;
|
|
|
|
rc = efx_mcdi_nvram_update_finish(efx, part->nvram_type);
|
|
|
|
}
|
|
|
|
|
|
|
|
return rc;
|
|
|
|
}
|
|
|
|
|
|
|
|
void efx_mcdi_mtd_rename(struct efx_mtd_partition *part)
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{
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struct efx_mcdi_mtd_partition *mcdi_part =
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container_of(part, struct efx_mcdi_mtd_partition, common);
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struct efx_nic *efx = part->mtd.priv;
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snprintf(part->name, sizeof(part->name), "%s %s:%02x",
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efx->name, part->type_name, mcdi_part->fw_subtype);
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}
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#endif /* CONFIG_SFC_MTD */
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