2012-07-02 16:26:39 +08:00
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/*
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* Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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/dts-v1/;
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2013-12-07 06:20:17 +08:00
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#include "am3517.dtsi"
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2018-05-06 09:26:08 +08:00
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#include "am3517-som.dtsi"
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2012-07-02 16:26:39 +08:00
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/ {
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2013-12-07 06:20:17 +08:00
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model = "TI AM3517 EVM (AM3517/05 TMDSEVM3517)";
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compatible = "ti,am3517-evm", "ti,am3517", "ti,omap3";
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2012-07-02 16:26:39 +08:00
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2016-08-31 18:35:31 +08:00
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memory@80000000 {
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2012-07-02 16:26:39 +08:00
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device_type = "memory";
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reg = <0x80000000 0x10000000>; /* 256 MB */
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};
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2013-12-07 02:53:04 +08:00
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vmmc_fixed: vmmc {
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compatible = "regulator-fixed";
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regulator-name = "vmmc_fixed";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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};
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};
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&davinci_emac {
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status = "okay";
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};
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&davinci_mdio {
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status = "okay";
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2012-07-02 16:26:39 +08:00
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};
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&i2c2 {
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clock-frequency = <400000>;
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};
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&i2c3 {
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clock-frequency = <400000>;
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};
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2013-12-07 02:53:04 +08:00
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&mmc1 {
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2018-05-06 09:26:07 +08:00
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status = "okay";
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pinctrl-names = "default";
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pinctrl-0 = <&mmc1_pins>;
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2013-12-07 02:53:04 +08:00
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vmmc-supply = <&vmmc_fixed>;
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bus-width = <4>;
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2018-05-06 09:26:07 +08:00
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wp-gpios = <&gpio4 30 GPIO_ACTIVE_HIGH>; /* gpio_126 */
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cd-gpios = <&gpio4 31 GPIO_ACTIVE_HIGH>; /* gpio_127 */
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2013-12-07 02:53:04 +08:00
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};
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&mmc2 {
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status = "disabled";
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};
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&mmc3 {
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status = "disabled";
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};
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2018-05-06 09:26:07 +08:00
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&omap3_pmx_core {
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mmc1_pins: pinmux_mmc1_pins {
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pinctrl-single,pins = <
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OMAP3_CORE1_IOPAD(0x2144, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_clk.sdmmc1_clk */
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OMAP3_CORE1_IOPAD(0x2146, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_cmd.sdmmc1_cmd */
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OMAP3_CORE1_IOPAD(0x2148, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat0.sdmmc1_dat0 */
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OMAP3_CORE1_IOPAD(0x214a, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat1.sdmmc1_dat1 */
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OMAP3_CORE1_IOPAD(0x214c, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat2.sdmmc1_dat2 */
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OMAP3_CORE1_IOPAD(0x214e, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat3.sdmmc1_dat3 */
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OMAP3_CORE1_IOPAD(0x2150, PIN_INPUT_PULLUP | MUX_MODE4) /* sdmmc1_dat4.gpio_126 */
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OMAP3_CORE1_IOPAD(0x2152, PIN_INPUT_PULLUP | MUX_MODE4) /* sdmmc1_dat5.gpio_127 */
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>;
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};
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};
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