2012-07-31 22:16:24 +08:00
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/*
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* Copyright (C) 2012 Red Hat, Inc. All rights reserved.
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* Author: Alex Williamson <alex.williamson@redhat.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* Derived from original vfio:
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* Copyright 2010 Cisco Systems, Inc. All rights reserved.
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* Author: Tom Lyon, pugs@cisco.com
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*/
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#include <linux/mutex.h>
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#include <linux/pci.h>
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2015-09-18 22:29:50 +08:00
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#include <linux/irqbypass.h>
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2016-02-23 07:02:39 +08:00
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#include <linux/types.h>
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2012-07-31 22:16:24 +08:00
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#ifndef VFIO_PCI_PRIVATE_H
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#define VFIO_PCI_PRIVATE_H
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#define VFIO_PCI_OFFSET_SHIFT 40
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#define VFIO_PCI_OFFSET_TO_INDEX(off) (off >> VFIO_PCI_OFFSET_SHIFT)
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#define VFIO_PCI_INDEX_TO_OFFSET(index) ((u64)(index) << VFIO_PCI_OFFSET_SHIFT)
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#define VFIO_PCI_OFFSET_MASK (((u64)(1) << VFIO_PCI_OFFSET_SHIFT) - 1)
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2016-02-23 07:02:41 +08:00
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/* Special capability IDs predefined access */
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#define PCI_CAP_ID_INVALID 0xFF /* default raw access */
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#define PCI_CAP_ID_INVALID_VIRT 0xFE /* default virt access */
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2012-07-31 22:16:24 +08:00
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struct vfio_pci_irq_ctx {
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struct eventfd_ctx *trigger;
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struct virqfd *unmask;
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struct virqfd *mask;
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char *name;
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bool masked;
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struct irq_bypass_producer producer;
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2012-07-31 22:16:24 +08:00
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};
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2016-02-23 07:02:39 +08:00
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struct vfio_pci_device;
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struct vfio_pci_region;
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struct vfio_pci_regops {
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size_t (*rw)(struct vfio_pci_device *vdev, char __user *buf,
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size_t count, loff_t *ppos, bool iswrite);
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void (*release)(struct vfio_pci_device *vdev,
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struct vfio_pci_region *region);
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};
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struct vfio_pci_region {
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u32 type;
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u32 subtype;
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const struct vfio_pci_regops *ops;
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void *data;
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size_t size;
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u32 flags;
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};
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2016-06-30 15:21:24 +08:00
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struct vfio_pci_dummy_resource {
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struct resource resource;
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int index;
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struct list_head res_next;
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};
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2012-07-31 22:16:24 +08:00
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struct vfio_pci_device {
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struct pci_dev *pdev;
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void __iomem *barmap[PCI_STD_RESOURCE_END + 1];
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2016-06-30 15:21:24 +08:00
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bool bar_mmap_supported[PCI_STD_RESOURCE_END + 1];
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2012-07-31 22:16:24 +08:00
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u8 *pci_config_map;
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u8 *vconfig;
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struct perm_bits *msi_perm;
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spinlock_t irqlock;
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struct mutex igate;
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struct vfio_pci_irq_ctx *ctx;
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int num_ctx;
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int irq_type;
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2016-02-23 07:02:39 +08:00
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int num_regions;
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struct vfio_pci_region *region;
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2012-07-31 22:16:24 +08:00
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u8 msi_qmax;
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u8 msix_bar;
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u16 msix_size;
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u32 msix_offset;
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u32 rbar[7];
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bool pci_2_3;
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bool virq_disabled;
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bool reset_works;
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bool extended_caps;
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bool bardirty;
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2013-02-19 01:11:13 +08:00
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bool has_vga;
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2014-08-08 01:12:07 +08:00
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bool needs_reset;
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vfio/pci: Hide broken INTx support from user
INTx masking has two components, the first is that we need the ability
to prevent the device from continuing to assert INTx. This is
provided via the DisINTx bit in the command register and is the only
thing we can really probe for when testing if INTx masking is
supported. The second component is that the device needs to indicate
if INTx is asserted via the interrupt status bit in the device status
register. With these two features we can generically determine if one
of the devices we own is asserting INTx, signal the user, and mask the
interrupt while the user services the device.
Generally if one or both of these components is broken we resort to
APIC level interrupt masking, which requires an exclusive interrupt
since we have no way to determine the source of the interrupt in a
shared configuration. This often makes it difficult or impossible to
configure the system for userspace use of the device, for an interrupt
mode that the user may not need.
One possible configuration of broken INTx masking is that the DisINTx
support is fully functional, but the interrupt status bit never
signals interrupt assertion. In this case we do have the ability to
prevent the device from asserting INTx, but lack the ability to
identify the interrupt source. For this case we can simply pretend
that the device lacks INTx support entirely, keeping DisINTx set on
the physical device, virtualizing this bit for the user, and
virtualizing the interrupt pin register to indicate no INTx support.
We already support virtualization of the DisINTx bit and already
virtualize the interrupt pin for platforms without INTx support. By
tying these components together, setting DisINTx on open and reset,
and identifying devices broken in this particular way, we can provide
support for them w/o the handicap of APIC level INTx masking.
Intel i40e (XL710/X710) 10/20/40GbE NICs have been identified as being
broken in this specific way. We leave the vfio-pci.nointxmask option
as a mechanism to bypass this support, enabling INTx on the device
with all the requirements of APIC level masking.
Signed-off-by: Alex Williamson <alex.williamson@redhat.com>
Cc: John Ronciak <john.ronciak@intel.com>
Cc: Jesse Brandeburg <jesse.brandeburg@intel.com>
2016-03-25 03:05:18 +08:00
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bool nointx;
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2012-07-31 22:16:24 +08:00
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struct pci_saved_state *pci_saved_state;
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2014-08-08 01:12:04 +08:00
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int refcnt;
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2013-03-11 23:31:22 +08:00
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struct eventfd_ctx *err_trigger;
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2015-02-07 06:05:08 +08:00
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struct eventfd_ctx *req_trigger;
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2016-06-30 15:21:24 +08:00
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struct list_head dummy_resources_list;
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2012-07-31 22:16:24 +08:00
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};
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#define is_intx(vdev) (vdev->irq_type == VFIO_PCI_INTX_IRQ_INDEX)
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#define is_msi(vdev) (vdev->irq_type == VFIO_PCI_MSI_IRQ_INDEX)
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#define is_msix(vdev) (vdev->irq_type == VFIO_PCI_MSIX_IRQ_INDEX)
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#define is_irq_none(vdev) (!(is_intx(vdev) || is_msi(vdev) || is_msix(vdev)))
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#define irq_is(vdev, type) (vdev->irq_type == type)
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extern void vfio_pci_intx_mask(struct vfio_pci_device *vdev);
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extern void vfio_pci_intx_unmask(struct vfio_pci_device *vdev);
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extern int vfio_pci_set_irqs_ioctl(struct vfio_pci_device *vdev,
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uint32_t flags, unsigned index,
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unsigned start, unsigned count, void *data);
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2013-02-15 05:02:12 +08:00
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extern ssize_t vfio_pci_config_rw(struct vfio_pci_device *vdev,
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char __user *buf, size_t count,
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loff_t *ppos, bool iswrite);
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extern ssize_t vfio_pci_bar_rw(struct vfio_pci_device *vdev, char __user *buf,
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size_t count, loff_t *ppos, bool iswrite);
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2012-07-31 22:16:24 +08:00
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2013-02-19 01:11:13 +08:00
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extern ssize_t vfio_pci_vga_rw(struct vfio_pci_device *vdev, char __user *buf,
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size_t count, loff_t *ppos, bool iswrite);
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2012-07-31 22:16:24 +08:00
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extern int vfio_pci_init_perm_bits(void);
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extern void vfio_pci_uninit_perm_bits(void);
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extern int vfio_config_init(struct vfio_pci_device *vdev);
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extern void vfio_config_free(struct vfio_pci_device *vdev);
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2016-02-23 07:02:39 +08:00
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extern int vfio_pci_register_dev_region(struct vfio_pci_device *vdev,
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unsigned int type, unsigned int subtype,
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const struct vfio_pci_regops *ops,
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size_t size, u32 flags, void *data);
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2016-02-23 07:02:43 +08:00
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#ifdef CONFIG_VFIO_PCI_IGD
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2016-02-23 07:02:45 +08:00
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extern int vfio_pci_igd_init(struct vfio_pci_device *vdev);
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2016-02-23 07:02:43 +08:00
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#else
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static inline int vfio_pci_igd_init(struct vfio_pci_device *vdev)
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{
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return -ENODEV;
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}
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#endif
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2012-07-31 22:16:24 +08:00
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#endif /* VFIO_PCI_PRIVATE_H */
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