2005-04-17 06:20:36 +08:00
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#ifndef __irq_h
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#define __irq_h
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/*
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* Please do not include this file in generic code. There is currently
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* no requirement for any architecture to implement anything held
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* within this file.
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*
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* Thanks. --rmk
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*/
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2005-12-21 09:27:50 +08:00
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#include <linux/smp.h>
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2005-04-17 06:20:36 +08:00
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2006-01-06 16:19:28 +08:00
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#if !defined(CONFIG_S390)
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2005-04-17 06:20:36 +08:00
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#include <linux/linkage.h>
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#include <linux/cache.h>
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#include <linux/spinlock.h>
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#include <linux/cpumask.h>
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2006-06-23 17:06:00 +08:00
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#include <linux/irqreturn.h>
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2005-04-17 06:20:36 +08:00
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#include <asm/irq.h>
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#include <asm/ptrace.h>
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/*
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* IRQ line status.
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*/
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#define IRQ_INPROGRESS 1 /* IRQ handler active - do not enter! */
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#define IRQ_DISABLED 2 /* IRQ disabled - do not enter! */
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#define IRQ_PENDING 4 /* IRQ pending - replay on enable */
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#define IRQ_REPLAY 8 /* IRQ has been replayed but not acked yet */
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#define IRQ_AUTODETECT 16 /* IRQ is being autodetected */
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#define IRQ_WAITING 32 /* IRQ not yet seen - for autodetection */
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#define IRQ_LEVEL 64 /* IRQ level triggered */
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#define IRQ_MASKED 128 /* IRQ masked - shouldn't be seen again */
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2005-09-07 06:17:25 +08:00
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#if defined(ARCH_HAS_IRQ_PER_CPU)
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# define IRQ_PER_CPU 256 /* IRQ is per CPU */
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# define CHECK_IRQ_PER_CPU(var) ((var) & IRQ_PER_CPU)
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#else
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# define CHECK_IRQ_PER_CPU(var) 0
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#endif
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2005-04-17 06:20:36 +08:00
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/*
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* Interrupt controller descriptor. This is all we need
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* to describe about the low-level hardware.
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*/
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struct hw_interrupt_type {
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const char * typename;
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unsigned int (*startup)(unsigned int irq);
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void (*shutdown)(unsigned int irq);
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void (*enable)(unsigned int irq);
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void (*disable)(unsigned int irq);
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void (*ack)(unsigned int irq);
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void (*end)(unsigned int irq);
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void (*set_affinity)(unsigned int irq, cpumask_t dest);
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2005-06-22 08:16:24 +08:00
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/* Currently used only by UML, might disappear one day.*/
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#ifdef CONFIG_IRQ_RELEASE_METHOD
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[PATCH] uml: add and use generic hw_controller_type->release
With Chris Wedgwood <cw@f00f.org>
Currently UML must explicitly call the UML-specific
free_irq_by_irq_and_dev() for each free_irq call it's done.
This is needed because ->shutdown and/or ->disable are only called when the
last "action" for that irq is removed.
Instead, for UML shared IRQs (UML IRQs are very often, if not always,
shared), for each dev_id some setup is done, which must be cleared on the
release of that fd. For instance, for each open console a new instance
(i.e. new dev_id) of the same IRQ is requested().
Exactly, a fd is stored in an array (pollfds), which is after read by a
host thread and passed to poll(). Each event registered by poll() triggers
an interrupt. So, for each free_irq() we must remove the corresponding
host fd from the table, which we do via this -release() method.
In this patch we add an appropriate hook for this, and remove all uses of
it by pointing the hook to the said procedure; this is safe to do since the
said procedure.
Also some cosmetic improvements are included.
This is heavily based on some work by Chris Wedgwood, which however didn't
get the patch merged for something I'd call a "misunderstanding" (the need
for this patch wasn't cleanly explained, thus adding the generic hook was
felt as undesirable).
Signed-off-by: Paolo 'Blaisorblade' Giarrusso <blaisorblade@yahoo.it>
CC: Ingo Molnar <mingo@redhat.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2005-06-22 08:16:19 +08:00
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void (*release)(unsigned int irq, void *dev_id);
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2005-06-22 08:16:24 +08:00
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#endif
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2005-04-17 06:20:36 +08:00
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};
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typedef struct hw_interrupt_type hw_irq_controller;
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/*
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* This is the "IRQ descriptor", which contains various information
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* about the irq, including what kind of hardware handling it has,
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* whether it is disabled etc etc.
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*
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* Pad this out to 32 bytes for cache and indexing reasons.
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*/
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typedef struct irq_desc {
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[PATCH] genirq: rename desc->handler to desc->chip
This patch-queue improves the generic IRQ layer to be truly generic, by adding
various abstractions and features to it, without impacting existing
functionality.
While the queue can be best described as "fix and improve everything in the
generic IRQ layer that we could think of", and thus it consists of many
smaller features and lots of cleanups, the one feature that stands out most is
the new 'irq chip' abstraction.
The irq-chip abstraction is about describing and coding and IRQ controller
driver by mapping its raw hardware capabilities [and quirks, if needed] in a
straightforward way, without having to think about "IRQ flow"
(level/edge/etc.) type of details.
This stands in contrast with the current 'irq-type' model of genirq
architectures, which 'mixes' raw hardware capabilities with 'flow' details.
The patchset supports both types of irq controller designs at once, and
converts i386 and x86_64 to the new irq-chip design.
As a bonus side-effect of the irq-chip approach, chained interrupt controllers
(master/slave PIC constructs, etc.) are now supported by design as well.
The end result of this patchset intends to be simpler architecture-level code
and more consolidation between architectures.
We reused many bits of code and many concepts from Russell King's ARM IRQ
layer, the merging of which was one of the motivations for this patchset.
This patch:
rename desc->handler to desc->chip.
Originally i did not want to do this, because it's a big patch. But having
both "desc->handler", "desc->handle_irq" and "action->handler" caused a
large degree of confusion and made the code appear alot less clean than it
truly is.
I have also attempted a dual approach as well by introducing a
desc->chip alias - but that just wasnt robust enough and broke
frequently.
So lets get over with this quickly. The conversion was done automatically
via scripts and converts all the code in the kernel.
This renaming patch is the first one amongst the patches, so that the
remaining patches can stay flexible and can be merged and split up
without having some big monolithic patch act as a merge barrier.
[akpm@osdl.org: build fix]
[akpm@osdl.org: another build fix]
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-06-29 17:24:36 +08:00
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hw_irq_controller *chip;
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void *chip_data;
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2005-04-17 06:20:36 +08:00
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struct irqaction *action; /* IRQ action list */
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unsigned int status; /* IRQ status */
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unsigned int depth; /* nested irq disables */
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unsigned int irq_count; /* For detecting broken interrupts */
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unsigned int irqs_unhandled;
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spinlock_t lock;
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2006-06-29 17:24:38 +08:00
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#ifdef CONFIG_SMP
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cpumask_t affinity;
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#endif
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[PATCH] x86/x86_64: deferred handling of writes to /proc/irqxx/smp_affinity
When handling writes to /proc/irq, current code is re-programming rte
entries directly. This is not recommended and could potentially cause
chipset's to lockup, or cause missing interrupts.
CONFIG_IRQ_BALANCE does this correctly, where it re-programs only when the
interrupt is pending. The same needs to be done for /proc/irq handling as well.
Otherwise user space irq balancers are really not doing the right thing.
- Changed pending_irq_balance_cpumask to pending_irq_migrate_cpumask for
lack of a generic name.
- added move_irq out of IRQ_BALANCE, and added this same to X86_64
- Added new proc handler for write, so we can do deferred write at irq
handling time.
- Display of /proc/irq/XX/smp_affinity used to display CPU_MASKALL, instead
it now shows only active cpu masks, or exactly what was set.
- Provided a common move_irq implementation, instead of duplicating
when using generic irq framework.
Tested on i386/x86_64 and ia64 with CONFIG_PCI_MSI turned on and off.
Tested UP builds as well.
MSI testing: tbd: I have cards, need to look for a x-over cable, although I
did test an earlier version of this patch. Will test in a couple days.
Signed-off-by: Ashok Raj <ashok.raj@intel.com>
Acked-by: Zwane Mwaikambo <zwane@holomorphy.com>
Grudgingly-acked-by: Andi Kleen <ak@muc.de>
Signed-off-by: Coywolf Qi Hunt <coywolf@lovecn.org>
Signed-off-by: Ashok Raj <ashok.raj@intel.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2005-09-07 06:16:15 +08:00
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#if defined (CONFIG_GENERIC_PENDING_IRQ) || defined (CONFIG_IRQBALANCE)
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unsigned int move_irq; /* Flag need to re-target intr dest*/
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#endif
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2005-04-17 06:20:36 +08:00
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} ____cacheline_aligned irq_desc_t;
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extern irq_desc_t irq_desc [NR_IRQS];
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#include <asm/hw_irq.h> /* the arch dependent stuff */
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extern int setup_irq(unsigned int irq, struct irqaction * new);
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#ifdef CONFIG_GENERIC_HARDIRQS
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[PATCH] x86/x86_64: deferred handling of writes to /proc/irqxx/smp_affinity
When handling writes to /proc/irq, current code is re-programming rte
entries directly. This is not recommended and could potentially cause
chipset's to lockup, or cause missing interrupts.
CONFIG_IRQ_BALANCE does this correctly, where it re-programs only when the
interrupt is pending. The same needs to be done for /proc/irq handling as well.
Otherwise user space irq balancers are really not doing the right thing.
- Changed pending_irq_balance_cpumask to pending_irq_migrate_cpumask for
lack of a generic name.
- added move_irq out of IRQ_BALANCE, and added this same to X86_64
- Added new proc handler for write, so we can do deferred write at irq
handling time.
- Display of /proc/irq/XX/smp_affinity used to display CPU_MASKALL, instead
it now shows only active cpu masks, or exactly what was set.
- Provided a common move_irq implementation, instead of duplicating
when using generic irq framework.
Tested on i386/x86_64 and ia64 with CONFIG_PCI_MSI turned on and off.
Tested UP builds as well.
MSI testing: tbd: I have cards, need to look for a x-over cable, although I
did test an earlier version of this patch. Will test in a couple days.
Signed-off-by: Ashok Raj <ashok.raj@intel.com>
Acked-by: Zwane Mwaikambo <zwane@holomorphy.com>
Grudgingly-acked-by: Andi Kleen <ak@muc.de>
Signed-off-by: Coywolf Qi Hunt <coywolf@lovecn.org>
Signed-off-by: Ashok Raj <ashok.raj@intel.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2005-09-07 06:16:15 +08:00
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#ifdef CONFIG_SMP
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static inline void set_native_irq_info(int irq, cpumask_t mask)
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{
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2006-06-29 17:24:38 +08:00
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irq_desc[irq].affinity = mask;
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[PATCH] x86/x86_64: deferred handling of writes to /proc/irqxx/smp_affinity
When handling writes to /proc/irq, current code is re-programming rte
entries directly. This is not recommended and could potentially cause
chipset's to lockup, or cause missing interrupts.
CONFIG_IRQ_BALANCE does this correctly, where it re-programs only when the
interrupt is pending. The same needs to be done for /proc/irq handling as well.
Otherwise user space irq balancers are really not doing the right thing.
- Changed pending_irq_balance_cpumask to pending_irq_migrate_cpumask for
lack of a generic name.
- added move_irq out of IRQ_BALANCE, and added this same to X86_64
- Added new proc handler for write, so we can do deferred write at irq
handling time.
- Display of /proc/irq/XX/smp_affinity used to display CPU_MASKALL, instead
it now shows only active cpu masks, or exactly what was set.
- Provided a common move_irq implementation, instead of duplicating
when using generic irq framework.
Tested on i386/x86_64 and ia64 with CONFIG_PCI_MSI turned on and off.
Tested UP builds as well.
MSI testing: tbd: I have cards, need to look for a x-over cable, although I
did test an earlier version of this patch. Will test in a couple days.
Signed-off-by: Ashok Raj <ashok.raj@intel.com>
Acked-by: Zwane Mwaikambo <zwane@holomorphy.com>
Grudgingly-acked-by: Andi Kleen <ak@muc.de>
Signed-off-by: Coywolf Qi Hunt <coywolf@lovecn.org>
Signed-off-by: Ashok Raj <ashok.raj@intel.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2005-09-07 06:16:15 +08:00
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}
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#else
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static inline void set_native_irq_info(int irq, cpumask_t mask)
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{
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}
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#endif
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#ifdef CONFIG_SMP
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#if defined (CONFIG_GENERIC_PENDING_IRQ) || defined (CONFIG_IRQBALANCE)
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extern cpumask_t pending_irq_cpumask[NR_IRQS];
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2006-03-25 19:07:36 +08:00
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void set_pending_irq(unsigned int irq, cpumask_t mask);
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void move_native_irq(int irq);
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[PATCH] x86/x86_64: deferred handling of writes to /proc/irqxx/smp_affinity
When handling writes to /proc/irq, current code is re-programming rte
entries directly. This is not recommended and could potentially cause
chipset's to lockup, or cause missing interrupts.
CONFIG_IRQ_BALANCE does this correctly, where it re-programs only when the
interrupt is pending. The same needs to be done for /proc/irq handling as well.
Otherwise user space irq balancers are really not doing the right thing.
- Changed pending_irq_balance_cpumask to pending_irq_migrate_cpumask for
lack of a generic name.
- added move_irq out of IRQ_BALANCE, and added this same to X86_64
- Added new proc handler for write, so we can do deferred write at irq
handling time.
- Display of /proc/irq/XX/smp_affinity used to display CPU_MASKALL, instead
it now shows only active cpu masks, or exactly what was set.
- Provided a common move_irq implementation, instead of duplicating
when using generic irq framework.
Tested on i386/x86_64 and ia64 with CONFIG_PCI_MSI turned on and off.
Tested UP builds as well.
MSI testing: tbd: I have cards, need to look for a x-over cable, although I
did test an earlier version of this patch. Will test in a couple days.
Signed-off-by: Ashok Raj <ashok.raj@intel.com>
Acked-by: Zwane Mwaikambo <zwane@holomorphy.com>
Grudgingly-acked-by: Andi Kleen <ak@muc.de>
Signed-off-by: Coywolf Qi Hunt <coywolf@lovecn.org>
Signed-off-by: Ashok Raj <ashok.raj@intel.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2005-09-07 06:16:15 +08:00
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#ifdef CONFIG_PCI_MSI
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/*
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* Wonder why these are dummies?
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* For e.g the set_ioapic_affinity_vector() calls the set_ioapic_affinity_irq()
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* counter part after translating the vector to irq info. We need to perform
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* this operation on the real irq, when we dont use vector, i.e when
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* pci_use_vector() is false.
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*/
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static inline void move_irq(int irq)
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{
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}
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static inline void set_irq_info(int irq, cpumask_t mask)
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{
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}
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#else // CONFIG_PCI_MSI
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static inline void move_irq(int irq)
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{
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move_native_irq(irq);
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}
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static inline void set_irq_info(int irq, cpumask_t mask)
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{
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set_native_irq_info(irq, mask);
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}
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#endif // CONFIG_PCI_MSI
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#else // CONFIG_GENERIC_PENDING_IRQ || CONFIG_IRQBALANCE
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#define move_irq(x)
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#define move_native_irq(x)
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#define set_pending_irq(x,y)
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static inline void set_irq_info(int irq, cpumask_t mask)
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{
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set_native_irq_info(irq, mask);
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}
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#endif // CONFIG_GENERIC_PENDING_IRQ
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#else // CONFIG_SMP
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#define move_irq(x)
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#define move_native_irq(x)
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#endif // CONFIG_SMP
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2006-06-23 17:04:22 +08:00
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#ifdef CONFIG_IRQBALANCE
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extern void set_balance_irq_affinity(unsigned int irq, cpumask_t mask);
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#else
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static inline void set_balance_irq_affinity(unsigned int irq, cpumask_t mask)
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{
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}
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#endif
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2005-04-17 06:20:36 +08:00
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extern int no_irq_affinity;
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extern int noirqdebug_setup(char *str);
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2006-06-23 17:06:00 +08:00
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extern fastcall irqreturn_t handle_IRQ_event(unsigned int irq, struct pt_regs *regs,
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2005-06-29 11:45:18 +08:00
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struct irqaction *action);
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2005-04-17 06:20:36 +08:00
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extern fastcall unsigned int __do_IRQ(unsigned int irq, struct pt_regs *regs);
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2005-06-29 11:45:18 +08:00
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extern void note_interrupt(unsigned int irq, irq_desc_t *desc,
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int action_ret, struct pt_regs *regs);
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2005-04-17 06:20:36 +08:00
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extern int can_request_irq(unsigned int irq, unsigned long irqflags);
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extern void init_irq_proc(void);
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2006-01-06 16:12:21 +08:00
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#ifdef CONFIG_AUTO_IRQ_AFFINITY
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extern int select_smp_affinity(unsigned int irq);
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#else
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static inline int
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select_smp_affinity(unsigned int irq)
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{
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return 1;
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}
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#endif
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2005-04-17 06:20:36 +08:00
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#endif
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extern hw_irq_controller no_irq_type; /* needed in every arch ? */
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#endif
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#endif /* __irq_h */
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