2007-06-13 10:11:42 +08:00
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/*
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* Definitions for RTL818x hardware
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*
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* Copyright 2007 Michael Wu <flamingice@sourmilk.net>
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* Copyright 2007 Andrea Merello <andreamrl@tiscali.it>
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*
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* Based on the r8187 driver, which is:
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* Copyright 2005 Andrea Merello <andreamrl@tiscali.it>, et al.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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2007-05-14 13:41:02 +08:00
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#ifndef RTL818X_H
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#define RTL818X_H
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struct rtl818x_csr {
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u8 MAC[6];
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u8 reserved_0[2];
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__le32 MAR[2];
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u8 RX_FIFO_COUNT;
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u8 reserved_1;
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u8 TX_FIFO_COUNT;
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u8 BQREQ;
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u8 reserved_2[4];
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__le32 TSFT[2];
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__le32 TLPDA;
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__le32 TNPDA;
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__le32 THPDA;
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__le16 BRSR;
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u8 BSSID[6];
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u8 RESP_RATE;
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u8 EIFS;
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u8 reserved_3[1];
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u8 CMD;
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#define RTL818X_CMD_TX_ENABLE (1 << 2)
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#define RTL818X_CMD_RX_ENABLE (1 << 3)
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#define RTL818X_CMD_RESET (1 << 4)
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u8 reserved_4[4];
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__le16 INT_MASK;
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__le16 INT_STATUS;
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#define RTL818X_INT_RX_OK (1 << 0)
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#define RTL818X_INT_RX_ERR (1 << 1)
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#define RTL818X_INT_TXL_OK (1 << 2)
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#define RTL818X_INT_TXL_ERR (1 << 3)
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#define RTL818X_INT_RX_DU (1 << 4)
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#define RTL818X_INT_RX_FO (1 << 5)
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#define RTL818X_INT_TXN_OK (1 << 6)
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#define RTL818X_INT_TXN_ERR (1 << 7)
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#define RTL818X_INT_TXH_OK (1 << 8)
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#define RTL818X_INT_TXH_ERR (1 << 9)
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#define RTL818X_INT_TXB_OK (1 << 10)
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#define RTL818X_INT_TXB_ERR (1 << 11)
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#define RTL818X_INT_ATIM (1 << 12)
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#define RTL818X_INT_BEACON (1 << 13)
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#define RTL818X_INT_TIME_OUT (1 << 14)
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#define RTL818X_INT_TX_FO (1 << 15)
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__le32 TX_CONF;
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#define RTL818X_TX_CONF_LOOPBACK_MAC (1 << 17)
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2007-10-15 02:43:16 +08:00
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#define RTL818X_TX_CONF_LOOPBACK_CONT (3 << 17)
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2007-05-14 13:41:02 +08:00
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#define RTL818X_TX_CONF_NO_ICV (1 << 19)
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#define RTL818X_TX_CONF_DISCW (1 << 20)
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2007-10-15 02:43:16 +08:00
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#define RTL818X_TX_CONF_SAT_HWPLCP (1 << 24)
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2007-05-14 13:41:02 +08:00
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#define RTL818X_TX_CONF_R8180_ABCD (2 << 25)
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#define RTL818X_TX_CONF_R8180_F (3 << 25)
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#define RTL818X_TX_CONF_R8185_ABC (4 << 25)
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#define RTL818X_TX_CONF_R8185_D (5 << 25)
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2008-07-08 22:43:43 +08:00
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#define RTL818X_TX_CONF_R8187vD (5 << 25)
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#define RTL818X_TX_CONF_R8187vD_B (6 << 25)
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2007-05-14 13:41:02 +08:00
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#define RTL818X_TX_CONF_HWVER_MASK (7 << 25)
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2008-07-08 19:30:02 +08:00
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#define RTL818X_TX_CONF_DISREQQSIZE (1 << 28)
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2007-10-15 02:43:16 +08:00
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#define RTL818X_TX_CONF_PROBE_DTS (1 << 29)
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#define RTL818X_TX_CONF_HW_SEQNUM (1 << 30)
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2007-05-14 13:41:02 +08:00
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#define RTL818X_TX_CONF_CW_MIN (1 << 31)
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__le32 RX_CONF;
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#define RTL818X_RX_CONF_MONITOR (1 << 0)
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#define RTL818X_RX_CONF_NICMAC (1 << 1)
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#define RTL818X_RX_CONF_MULTICAST (1 << 2)
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#define RTL818X_RX_CONF_BROADCAST (1 << 3)
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[PATCH] mac80211: revamp interface and filter configuration
Drivers are currently supposed to keep track of monitor
interfaces if they allow so-called "hard" monitor, and
they are also supposed to keep track of multicast etc.
This patch changes that, replaces the set_multicast_list()
callback with a new configure_filter() callback that takes
filter flags (FIF_*) instead of interface flags (IFF_*).
For a driver, this means it should open the filter as much
as necessary to get all frames requested by the filter flags.
Accordingly, the filter flags are named "positively", e.g.
FIF_ALLMULTI.
Multicast filtering is a bit special in that drivers that
have no multicast address filters need to allow multicast
frames through when either the FIF_ALLMULTI flag is set or
when the mc_count value is positive.
At the same time, drivers are no longer notified about
monitor interfaces at all, this means they now need to
implement the start() and stop() callbacks and the new
change_filter_flags() callback. Also, the start()/stop()
ordering changed, start() is now called *before* any
add_interface() as it really should be, and stop() after
any remove_interface().
The patch also changes the behaviour of setting the bssid
to multicast for scanning when IEEE80211_HW_NO_PROBE_FILTERING
is set; the IEEE80211_HW_NO_PROBE_FILTERING flag is removed
and the filter flag FIF_BCN_PRBRESP_PROMISC introduced.
This is a lot more efficient for hardware like b43 that
supports it and other hardware can still set the BSSID
to all-ones.
Driver modifications by Johannes Berg (b43 & iwlwifi), Michael Wu
(rtl8187, adm8211, and p54), Larry Finger (b43legacy), and
Ivo van Doorn (rt2x00).
Signed-off-by: Johannes Berg <johannes@sipsolutions.net>
Signed-off-by: Michael Wu <flamingice@sourmilk.net>
Signed-off-by: Larry Finger <Larry.Finger@lwfinger.net>
Signed-off-by: Ivo van Doorn <IvDoorn@gmail.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
2007-09-17 13:29:23 +08:00
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#define RTL818X_RX_CONF_FCS (1 << 5)
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2007-05-14 13:41:02 +08:00
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#define RTL818X_RX_CONF_DATA (1 << 18)
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#define RTL818X_RX_CONF_CTRL (1 << 19)
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#define RTL818X_RX_CONF_MGMT (1 << 20)
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2007-10-15 02:43:16 +08:00
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#define RTL818X_RX_CONF_ADDR3 (1 << 21)
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#define RTL818X_RX_CONF_PM (1 << 22)
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2007-05-14 13:41:02 +08:00
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#define RTL818X_RX_CONF_BSSID (1 << 23)
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#define RTL818X_RX_CONF_RX_AUTORESETPHY (1 << 28)
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2007-10-15 02:43:16 +08:00
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#define RTL818X_RX_CONF_CSDM1 (1 << 29)
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#define RTL818X_RX_CONF_CSDM2 (1 << 30)
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2007-05-14 13:41:02 +08:00
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#define RTL818X_RX_CONF_ONLYERLPKT (1 << 31)
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__le32 INT_TIMEOUT;
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__le32 TBDA;
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u8 EEPROM_CMD;
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#define RTL818X_EEPROM_CMD_READ (1 << 0)
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#define RTL818X_EEPROM_CMD_WRITE (1 << 1)
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#define RTL818X_EEPROM_CMD_CK (1 << 2)
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#define RTL818X_EEPROM_CMD_CS (1 << 3)
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#define RTL818X_EEPROM_CMD_NORMAL (0 << 6)
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#define RTL818X_EEPROM_CMD_LOAD (1 << 6)
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#define RTL818X_EEPROM_CMD_PROGRAM (2 << 6)
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#define RTL818X_EEPROM_CMD_CONFIG (3 << 6)
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u8 CONFIG0;
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u8 CONFIG1;
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u8 CONFIG2;
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2007-10-15 02:43:16 +08:00
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#define RTL818X_CONFIG2_ANTENNA_DIV (1 << 6)
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2007-05-14 13:41:02 +08:00
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__le32 ANAPARAM;
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u8 MSR;
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#define RTL818X_MSR_NO_LINK (0 << 2)
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#define RTL818X_MSR_ADHOC (1 << 2)
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#define RTL818X_MSR_INFRA (2 << 2)
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2008-07-08 19:30:02 +08:00
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#define RTL818X_MSR_MASTER (3 << 2)
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#define RTL818X_MSR_ENEDCA (4 << 2)
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2007-05-14 13:41:02 +08:00
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u8 CONFIG3;
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#define RTL818X_CONFIG3_ANAPARAM_WRITE (1 << 6)
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2008-07-08 19:30:02 +08:00
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#define RTL818X_CONFIG3_GNT_SELECT (1 << 7)
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2007-05-14 13:41:02 +08:00
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u8 CONFIG4;
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#define RTL818X_CONFIG4_POWEROFF (1 << 6)
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#define RTL818X_CONFIG4_VCOOFF (1 << 7)
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u8 TESTR;
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u8 reserved_9[2];
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2007-10-15 02:43:16 +08:00
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u8 PGSELECT;
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u8 SECURITY;
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2007-05-14 13:41:02 +08:00
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__le32 ANAPARAM2;
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u8 reserved_10[12];
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__le16 BEACON_INTERVAL;
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__le16 ATIM_WND;
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__le16 BEACON_INTERVAL_TIME;
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__le16 ATIMTR_INTERVAL;
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2007-10-15 02:43:16 +08:00
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u8 PHY_DELAY;
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u8 CARRIER_SENSE_COUNTER;
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u8 reserved_11[2];
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2007-05-14 13:41:02 +08:00
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u8 PHY[4];
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__le16 RFPinsOutput;
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__le16 RFPinsEnable;
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__le16 RFPinsSelect;
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__le16 RFPinsInput;
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__le32 RF_PARA;
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__le32 RF_TIMING;
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u8 GP_ENABLE;
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u8 GPIO;
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2008-07-08 19:30:02 +08:00
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u8 reserved_12[2];
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__le32 HSSI_PARA;
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u8 reserved_13[4];
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2007-05-14 13:41:02 +08:00
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u8 TX_AGC_CTL;
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#define RTL818X_TX_AGC_CTL_PERPACKET_GAIN_SHIFT (1 << 0)
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#define RTL818X_TX_AGC_CTL_PERPACKET_ANTSEL_SHIFT (1 << 1)
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#define RTL818X_TX_AGC_CTL_FEEDBACK_ANT (1 << 2)
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u8 TX_GAIN_CCK;
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u8 TX_GAIN_OFDM;
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u8 TX_ANTENNA;
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2008-07-08 19:30:02 +08:00
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u8 reserved_14[16];
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2007-05-14 13:41:02 +08:00
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u8 WPA_CONF;
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2008-07-08 19:30:02 +08:00
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u8 reserved_15[3];
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2007-05-14 13:41:02 +08:00
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u8 SIFS;
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u8 DIFS;
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u8 SLOT;
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2008-07-08 19:30:02 +08:00
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u8 reserved_16[5];
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2007-05-14 13:41:02 +08:00
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u8 CW_CONF;
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#define RTL818X_CW_CONF_PERPACKET_CW_SHIFT (1 << 0)
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#define RTL818X_CW_CONF_PERPACKET_RETRY_SHIFT (1 << 1)
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u8 CW_VAL;
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u8 RATE_FALLBACK;
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2008-07-08 19:30:02 +08:00
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#define RTL818X_RATE_FALLBACK_ENABLE (1 << 7)
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u8 ACM_CONTROL;
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u8 reserved_17[24];
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2007-05-14 13:41:02 +08:00
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u8 CONFIG5;
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u8 TX_DMA_POLLING;
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2008-07-08 19:30:02 +08:00
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u8 reserved_18[2];
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2007-05-14 13:41:02 +08:00
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__le16 CWR;
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u8 RETRY_CTR;
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2008-07-08 19:30:02 +08:00
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u8 reserved_19[3];
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__le16 INT_MIG;
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/* RTL818X_R8187B_*: magic numbers from ioregisters */
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#define RTL818X_R8187B_B 0
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#define RTL818X_R8187B_D 1
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#define RTL818X_R8187B_E 2
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2007-05-14 13:41:02 +08:00
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__le32 RDSAR;
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2008-07-08 19:30:02 +08:00
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__le16 TID_AC_MAP;
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2007-10-15 02:43:16 +08:00
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u8 reserved_20[4];
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2008-07-08 19:30:02 +08:00
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u8 ANAPARAM3;
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u8 reserved_21[5];
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__le16 FEMR;
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u8 reserved_22[4];
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2007-10-15 02:43:16 +08:00
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__le16 TALLY_CNT;
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2007-05-14 13:41:02 +08:00
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u8 TALLY_SEL;
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} __attribute__((packed));
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2007-10-15 02:43:16 +08:00
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struct rtl818x_rf_ops {
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char *name;
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void (*init)(struct ieee80211_hw *);
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void (*stop)(struct ieee80211_hw *);
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void (*set_chan)(struct ieee80211_hw *, struct ieee80211_conf *);
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2008-11-13 03:37:11 +08:00
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void (*conf_erp)(struct ieee80211_hw *, struct ieee80211_bss_conf *);
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2007-10-15 02:43:16 +08:00
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};
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2008-07-16 22:44:18 +08:00
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/* Tx/Rx flags are common between RTL818X chips */
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enum rtl818x_tx_desc_flags {
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RTL818X_TX_DESC_FLAG_NO_ENC = (1 << 15),
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RTL818X_TX_DESC_FLAG_TX_OK = (1 << 15),
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RTL818X_TX_DESC_FLAG_SPLCP = (1 << 16),
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RTL818X_TX_DESC_FLAG_RX_UNDER = (1 << 16),
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RTL818X_TX_DESC_FLAG_MOREFRAG = (1 << 17),
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RTL818X_TX_DESC_FLAG_CTS = (1 << 18),
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RTL818X_TX_DESC_FLAG_RTS = (1 << 23),
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RTL818X_TX_DESC_FLAG_LS = (1 << 28),
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RTL818X_TX_DESC_FLAG_FS = (1 << 29),
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RTL818X_TX_DESC_FLAG_DMA = (1 << 30),
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RTL818X_TX_DESC_FLAG_OWN = (1 << 31)
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};
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enum rtl818x_rx_desc_flags {
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RTL818X_RX_DESC_FLAG_ICV_ERR = (1 << 12),
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RTL818X_RX_DESC_FLAG_CRC32_ERR = (1 << 13),
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RTL818X_RX_DESC_FLAG_PM = (1 << 14),
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RTL818X_RX_DESC_FLAG_RX_ERR = (1 << 15),
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RTL818X_RX_DESC_FLAG_BCAST = (1 << 16),
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RTL818X_RX_DESC_FLAG_PAM = (1 << 17),
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RTL818X_RX_DESC_FLAG_MCAST = (1 << 18),
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RTL818X_RX_DESC_FLAG_QOS = (1 << 19), /* RTL8187(B) only */
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RTL818X_RX_DESC_FLAG_TRSW = (1 << 24), /* RTL8187(B) only */
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RTL818X_RX_DESC_FLAG_SPLCP = (1 << 25),
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RTL818X_RX_DESC_FLAG_FOF = (1 << 26),
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RTL818X_RX_DESC_FLAG_DMA_FAIL = (1 << 27),
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RTL818X_RX_DESC_FLAG_LS = (1 << 28),
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RTL818X_RX_DESC_FLAG_FS = (1 << 29),
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RTL818X_RX_DESC_FLAG_EOR = (1 << 30),
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RTL818X_RX_DESC_FLAG_OWN = (1 << 31)
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};
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2007-05-14 13:41:02 +08:00
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#endif /* RTL818X_H */
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