2015-09-20 17:25:38 +08:00
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/*
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* USB 10M/100M ethernet adapter
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*
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* This file is licensed under the terms of the GNU General Public License
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* version 2. This program is licensed "as is" without any warranty of any
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* kind, whether express or implied
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*
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*/
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/sched.h>
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#include <linux/stddef.h>
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#include <linux/init.h>
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#include <linux/netdevice.h>
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#include <linux/etherdevice.h>
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#include <linux/ethtool.h>
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#include <linux/mii.h>
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#include <linux/usb.h>
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#include <linux/crc32.h>
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#include <linux/usb/usbnet.h>
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#include <linux/slab.h>
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#define CH9200_VID 0x1A86
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#define CH9200_PID_E092 0xE092
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#define CTRL_TIMEOUT_MS 1000
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#define CONTROL_TIMEOUT_MS 1000
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#define REQUEST_READ 0x0E
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#define REQUEST_WRITE 0x0F
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/* Address space:
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* 00-63 : MII
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* 64-128: MAC
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*
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* Note: all accesses must be 16-bit
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*/
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#define MAC_REG_CTRL 64
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#define MAC_REG_STATUS 66
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#define MAC_REG_INTERRUPT_MASK 68
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#define MAC_REG_PHY_COMMAND 70
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#define MAC_REG_PHY_DATA 72
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#define MAC_REG_STATION_L 74
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#define MAC_REG_STATION_M 76
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#define MAC_REG_STATION_H 78
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#define MAC_REG_HASH_L 80
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#define MAC_REG_HASH_M1 82
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#define MAC_REG_HASH_M2 84
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#define MAC_REG_HASH_H 86
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#define MAC_REG_THRESHOLD 88
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#define MAC_REG_FIFO_DEPTH 90
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#define MAC_REG_PAUSE 92
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#define MAC_REG_FLOW_CONTROL 94
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/* Control register bits
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*
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* Note: bits 13 and 15 are reserved
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*/
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#define LOOPBACK (0x01 << 14)
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#define BASE100X (0x01 << 12)
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#define MBPS_10 (0x01 << 11)
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#define DUPLEX_MODE (0x01 << 10)
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#define PAUSE_FRAME (0x01 << 9)
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#define PROMISCUOUS (0x01 << 8)
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#define MULTICAST (0x01 << 7)
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#define BROADCAST (0x01 << 6)
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#define HASH (0x01 << 5)
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#define APPEND_PAD (0x01 << 4)
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#define APPEND_CRC (0x01 << 3)
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#define TRANSMITTER_ACTION (0x01 << 2)
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#define RECEIVER_ACTION (0x01 << 1)
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#define DMA_ACTION (0x01 << 0)
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/* Status register bits
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*
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* Note: bits 7-15 are reserved
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*/
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#define ALIGNMENT (0x01 << 6)
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#define FIFO_OVER_RUN (0x01 << 5)
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#define FIFO_UNDER_RUN (0x01 << 4)
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#define RX_ERROR (0x01 << 3)
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#define RX_COMPLETE (0x01 << 2)
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#define TX_ERROR (0x01 << 1)
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#define TX_COMPLETE (0x01 << 0)
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/* FIFO depth register bits
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*
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* Note: bits 6 and 14 are reserved
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*/
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#define ETH_TXBD (0x01 << 15)
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#define ETN_TX_FIFO_DEPTH (0x01 << 8)
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#define ETH_RXBD (0x01 << 7)
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#define ETH_RX_FIFO_DEPTH (0x01 << 0)
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static int control_read(struct usbnet *dev,
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unsigned char request, unsigned short value,
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unsigned short index, void *data, unsigned short size,
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int timeout)
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{
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unsigned char *buf = NULL;
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unsigned char request_type;
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int err = 0;
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if (request == REQUEST_READ)
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request_type = (USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_OTHER);
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else
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request_type = (USB_DIR_IN | USB_TYPE_VENDOR |
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USB_RECIP_DEVICE);
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netdev_dbg(dev->net, "Control_read() index=0x%02x size=%d\n",
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index, size);
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buf = kmalloc(size, GFP_KERNEL);
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if (!buf) {
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err = -ENOMEM;
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goto err_out;
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}
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err = usb_control_msg(dev->udev,
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usb_rcvctrlpipe(dev->udev, 0),
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request, request_type, value, index, buf, size,
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timeout);
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if (err == size)
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memcpy(data, buf, size);
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else if (err >= 0)
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err = -EINVAL;
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kfree(buf);
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return err;
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err_out:
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return err;
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}
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static int control_write(struct usbnet *dev, unsigned char request,
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unsigned short value, unsigned short index,
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void *data, unsigned short size, int timeout)
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{
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unsigned char *buf = NULL;
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unsigned char request_type;
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int err = 0;
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if (request == REQUEST_WRITE)
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request_type = (USB_DIR_OUT | USB_TYPE_VENDOR |
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USB_RECIP_OTHER);
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else
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request_type = (USB_DIR_OUT | USB_TYPE_VENDOR |
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USB_RECIP_DEVICE);
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netdev_dbg(dev->net, "Control_write() index=0x%02x size=%d\n",
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index, size);
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if (data) {
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2016-05-19 21:56:50 +08:00
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buf = kmemdup(data, size, GFP_KERNEL);
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2015-09-20 17:25:38 +08:00
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if (!buf) {
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err = -ENOMEM;
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goto err_out;
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}
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}
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err = usb_control_msg(dev->udev,
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usb_sndctrlpipe(dev->udev, 0),
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request, request_type, value, index, buf, size,
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timeout);
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if (err >= 0 && err < size)
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err = -EINVAL;
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kfree(buf);
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return 0;
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err_out:
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return err;
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}
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static int ch9200_mdio_read(struct net_device *netdev, int phy_id, int loc)
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{
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struct usbnet *dev = netdev_priv(netdev);
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unsigned char buff[2];
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netdev_dbg(netdev, "ch9200_mdio_read phy_id:%02x loc:%02x\n",
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phy_id, loc);
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if (phy_id != 0)
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return -ENODEV;
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control_read(dev, REQUEST_READ, 0, loc * 2, buff, 0x02,
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CONTROL_TIMEOUT_MS);
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return (buff[0] | buff[1] << 8);
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}
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static void ch9200_mdio_write(struct net_device *netdev,
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int phy_id, int loc, int val)
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{
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struct usbnet *dev = netdev_priv(netdev);
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unsigned char buff[2];
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netdev_dbg(netdev, "ch9200_mdio_write() phy_id=%02x loc:%02x\n",
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phy_id, loc);
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if (phy_id != 0)
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return;
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buff[0] = (unsigned char)val;
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buff[1] = (unsigned char)(val >> 8);
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control_write(dev, REQUEST_WRITE, 0, loc * 2, buff, 0x02,
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CONTROL_TIMEOUT_MS);
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}
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static int ch9200_link_reset(struct usbnet *dev)
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{
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struct ethtool_cmd ecmd;
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mii_check_media(&dev->mii, 1, 1);
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mii_ethtool_gset(&dev->mii, &ecmd);
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netdev_dbg(dev->net, "link_reset() speed:%d duplex:%d\n",
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ecmd.speed, ecmd.duplex);
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return 0;
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}
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static void ch9200_status(struct usbnet *dev, struct urb *urb)
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{
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int link;
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unsigned char *buf;
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if (urb->actual_length < 16)
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return;
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buf = urb->transfer_buffer;
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link = !!(buf[0] & 0x01);
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if (link) {
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netif_carrier_on(dev->net);
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usbnet_defer_kevent(dev, EVENT_LINK_RESET);
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} else {
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netif_carrier_off(dev->net);
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}
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}
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static struct sk_buff *ch9200_tx_fixup(struct usbnet *dev, struct sk_buff *skb,
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gfp_t flags)
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{
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int i = 0;
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int len = 0;
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int tx_overhead = 0;
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tx_overhead = 0x40;
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len = skb->len;
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2017-04-20 00:59:25 +08:00
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if (skb_cow_head(skb, tx_overhead)) {
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2015-09-20 17:25:38 +08:00
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dev_kfree_skb_any(skb);
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2017-04-20 00:59:25 +08:00
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return NULL;
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2015-09-20 17:25:38 +08:00
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}
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__skb_push(skb, tx_overhead);
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/* usbnet adds padding if length is a multiple of packet size
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* if so, adjust length value in header
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*/
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if ((skb->len % dev->maxpacket) == 0)
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len++;
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skb->data[0] = len;
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skb->data[1] = len >> 8;
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skb->data[2] = 0x00;
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skb->data[3] = 0x80;
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for (i = 4; i < 48; i++)
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skb->data[i] = 0x00;
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skb->data[48] = len;
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skb->data[49] = len >> 8;
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skb->data[50] = 0x00;
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skb->data[51] = 0x80;
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for (i = 52; i < 64; i++)
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skb->data[i] = 0x00;
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return skb;
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}
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static int ch9200_rx_fixup(struct usbnet *dev, struct sk_buff *skb)
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{
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int len = 0;
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int rx_overhead = 0;
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rx_overhead = 64;
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if (unlikely(skb->len < rx_overhead)) {
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dev_err(&dev->udev->dev, "unexpected tiny rx frame\n");
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return 0;
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}
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len = (skb->data[skb->len - 16] | skb->data[skb->len - 15] << 8);
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skb_trim(skb, len);
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return 1;
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}
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static int get_mac_address(struct usbnet *dev, unsigned char *data)
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{
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int err = 0;
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unsigned char mac_addr[0x06];
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int rd_mac_len = 0;
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netdev_dbg(dev->net, "get_mac_address:\n\tusbnet VID:%0x PID:%0x\n",
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2017-05-12 18:13:26 +08:00
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le16_to_cpu(dev->udev->descriptor.idVendor),
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le16_to_cpu(dev->udev->descriptor.idProduct));
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2015-09-20 17:25:38 +08:00
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memset(mac_addr, 0, sizeof(mac_addr));
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rd_mac_len = control_read(dev, REQUEST_READ, 0,
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MAC_REG_STATION_L, mac_addr, 0x02,
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CONTROL_TIMEOUT_MS);
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rd_mac_len += control_read(dev, REQUEST_READ, 0, MAC_REG_STATION_M,
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mac_addr + 2, 0x02, CONTROL_TIMEOUT_MS);
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rd_mac_len += control_read(dev, REQUEST_READ, 0, MAC_REG_STATION_H,
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mac_addr + 4, 0x02, CONTROL_TIMEOUT_MS);
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if (rd_mac_len != ETH_ALEN)
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err = -EINVAL;
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data[0] = mac_addr[5];
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data[1] = mac_addr[4];
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data[2] = mac_addr[3];
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data[3] = mac_addr[2];
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data[4] = mac_addr[1];
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data[5] = mac_addr[0];
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return err;
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}
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static int ch9200_bind(struct usbnet *dev, struct usb_interface *intf)
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{
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int retval = 0;
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unsigned char data[2];
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retval = usbnet_get_endpoints(dev, intf);
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if (retval)
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return retval;
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dev->mii.dev = dev->net;
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dev->mii.mdio_read = ch9200_mdio_read;
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dev->mii.mdio_write = ch9200_mdio_write;
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dev->mii.reg_num_mask = 0x1f;
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dev->mii.phy_id_mask = 0x1f;
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dev->hard_mtu = dev->net->mtu + dev->net->hard_header_len;
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dev->rx_urb_size = 24 * 64 + 16;
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mii_nway_restart(&dev->mii);
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data[0] = 0x01;
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data[1] = 0x0F;
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retval = control_write(dev, REQUEST_WRITE, 0, MAC_REG_THRESHOLD, data,
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0x02, CONTROL_TIMEOUT_MS);
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data[0] = 0xA0;
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data[1] = 0x90;
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retval = control_write(dev, REQUEST_WRITE, 0, MAC_REG_FIFO_DEPTH, data,
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0x02, CONTROL_TIMEOUT_MS);
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data[0] = 0x30;
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data[1] = 0x00;
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retval = control_write(dev, REQUEST_WRITE, 0, MAC_REG_PAUSE, data,
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0x02, CONTROL_TIMEOUT_MS);
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data[0] = 0x17;
|
|
|
|
data[1] = 0xD8;
|
|
|
|
retval = control_write(dev, REQUEST_WRITE, 0, MAC_REG_FLOW_CONTROL,
|
|
|
|
data, 0x02, CONTROL_TIMEOUT_MS);
|
|
|
|
|
|
|
|
/* Undocumented register */
|
|
|
|
data[0] = 0x01;
|
|
|
|
data[1] = 0x00;
|
|
|
|
retval = control_write(dev, REQUEST_WRITE, 0, 254, data, 0x02,
|
|
|
|
CONTROL_TIMEOUT_MS);
|
|
|
|
|
|
|
|
data[0] = 0x5F;
|
|
|
|
data[1] = 0x0D;
|
|
|
|
retval = control_write(dev, REQUEST_WRITE, 0, MAC_REG_CTRL, data, 0x02,
|
|
|
|
CONTROL_TIMEOUT_MS);
|
|
|
|
|
|
|
|
retval = get_mac_address(dev, dev->net->dev_addr);
|
|
|
|
|
|
|
|
return retval;
|
|
|
|
}
|
|
|
|
|
|
|
|
static const struct driver_info ch9200_info = {
|
|
|
|
.description = "CH9200 USB to Network Adaptor",
|
|
|
|
.flags = FLAG_ETHER,
|
|
|
|
.bind = ch9200_bind,
|
|
|
|
.rx_fixup = ch9200_rx_fixup,
|
|
|
|
.tx_fixup = ch9200_tx_fixup,
|
|
|
|
.status = ch9200_status,
|
|
|
|
.link_reset = ch9200_link_reset,
|
|
|
|
.reset = ch9200_link_reset,
|
|
|
|
};
|
|
|
|
|
|
|
|
static const struct usb_device_id ch9200_products[] = {
|
|
|
|
{
|
|
|
|
USB_DEVICE(0x1A86, 0xE092),
|
|
|
|
.driver_info = (unsigned long)&ch9200_info,
|
|
|
|
},
|
|
|
|
{},
|
|
|
|
};
|
|
|
|
|
|
|
|
MODULE_DEVICE_TABLE(usb, ch9200_products);
|
|
|
|
|
|
|
|
static struct usb_driver ch9200_driver = {
|
|
|
|
.name = "ch9200",
|
|
|
|
.id_table = ch9200_products,
|
|
|
|
.probe = usbnet_probe,
|
|
|
|
.disconnect = usbnet_disconnect,
|
|
|
|
.suspend = usbnet_suspend,
|
|
|
|
.resume = usbnet_resume,
|
|
|
|
};
|
|
|
|
|
2015-09-22 15:29:49 +08:00
|
|
|
module_usb_driver(ch9200_driver);
|
2015-09-20 17:25:38 +08:00
|
|
|
|
|
|
|
MODULE_DESCRIPTION("QinHeng CH9200 USB Network device");
|
|
|
|
MODULE_LICENSE("GPL");
|