2008-01-18 06:32:05 +08:00
|
|
|
/*
|
|
|
|
* Embedded Planet EP8248E support
|
|
|
|
*
|
|
|
|
* Copyright 2007 Freescale Semiconductor, Inc.
|
|
|
|
* Author: Scott Wood <scottwood@freescale.com>
|
|
|
|
*
|
|
|
|
* This program is free software; you can redistribute it and/or modify it
|
|
|
|
* under the terms of the GNU General Public License as published by the
|
|
|
|
* Free Software Foundation; either version 2 of the License, or (at your
|
|
|
|
* option) any later version.
|
|
|
|
*/
|
|
|
|
|
|
|
|
#include <linux/init.h>
|
|
|
|
#include <linux/interrupt.h>
|
|
|
|
#include <linux/fsl_devices.h>
|
|
|
|
#include <linux/mdio-bitbang.h>
|
2009-04-25 20:53:28 +08:00
|
|
|
#include <linux/of_mdio.h>
|
include cleanup: Update gfp.h and slab.h includes to prepare for breaking implicit slab.h inclusion from percpu.h
percpu.h is included by sched.h and module.h and thus ends up being
included when building most .c files. percpu.h includes slab.h which
in turn includes gfp.h making everything defined by the two files
universally available and complicating inclusion dependencies.
percpu.h -> slab.h dependency is about to be removed. Prepare for
this change by updating users of gfp and slab facilities include those
headers directly instead of assuming availability. As this conversion
needs to touch large number of source files, the following script is
used as the basis of conversion.
http://userweb.kernel.org/~tj/misc/slabh-sweep.py
The script does the followings.
* Scan files for gfp and slab usages and update includes such that
only the necessary includes are there. ie. if only gfp is used,
gfp.h, if slab is used, slab.h.
* When the script inserts a new include, it looks at the include
blocks and try to put the new include such that its order conforms
to its surrounding. It's put in the include block which contains
core kernel includes, in the same order that the rest are ordered -
alphabetical, Christmas tree, rev-Xmas-tree or at the end if there
doesn't seem to be any matching order.
* If the script can't find a place to put a new include (mostly
because the file doesn't have fitting include block), it prints out
an error message indicating which .h file needs to be added to the
file.
The conversion was done in the following steps.
1. The initial automatic conversion of all .c files updated slightly
over 4000 files, deleting around 700 includes and adding ~480 gfp.h
and ~3000 slab.h inclusions. The script emitted errors for ~400
files.
2. Each error was manually checked. Some didn't need the inclusion,
some needed manual addition while adding it to implementation .h or
embedding .c file was more appropriate for others. This step added
inclusions to around 150 files.
3. The script was run again and the output was compared to the edits
from #2 to make sure no file was left behind.
4. Several build tests were done and a couple of problems were fixed.
e.g. lib/decompress_*.c used malloc/free() wrappers around slab
APIs requiring slab.h to be added manually.
5. The script was run on all .h files but without automatically
editing them as sprinkling gfp.h and slab.h inclusions around .h
files could easily lead to inclusion dependency hell. Most gfp.h
inclusion directives were ignored as stuff from gfp.h was usually
wildly available and often used in preprocessor macros. Each
slab.h inclusion directive was examined and added manually as
necessary.
6. percpu.h was updated not to include slab.h.
7. Build test were done on the following configurations and failures
were fixed. CONFIG_GCOV_KERNEL was turned off for all tests (as my
distributed build env didn't work with gcov compiles) and a few
more options had to be turned off depending on archs to make things
build (like ipr on powerpc/64 which failed due to missing writeq).
* x86 and x86_64 UP and SMP allmodconfig and a custom test config.
* powerpc and powerpc64 SMP allmodconfig
* sparc and sparc64 SMP allmodconfig
* ia64 SMP allmodconfig
* s390 SMP allmodconfig
* alpha SMP allmodconfig
* um on x86_64 SMP allmodconfig
8. percpu.h modifications were reverted so that it could be applied as
a separate patch and serve as bisection point.
Given the fact that I had only a couple of failures from tests on step
6, I'm fairly confident about the coverage of this conversion patch.
If there is a breakage, it's likely to be something in one of the arch
headers which should be easily discoverable easily on most builds of
the specific arch.
Signed-off-by: Tejun Heo <tj@kernel.org>
Guess-its-ok-by: Christoph Lameter <cl@linux-foundation.org>
Cc: Ingo Molnar <mingo@redhat.com>
Cc: Lee Schermerhorn <Lee.Schermerhorn@hp.com>
2010-03-24 16:04:11 +08:00
|
|
|
#include <linux/slab.h>
|
2008-01-18 06:32:05 +08:00
|
|
|
#include <linux/of_platform.h>
|
|
|
|
|
|
|
|
#include <asm/io.h>
|
|
|
|
#include <asm/cpm2.h>
|
|
|
|
#include <asm/udbg.h>
|
|
|
|
#include <asm/machdep.h>
|
|
|
|
#include <asm/time.h>
|
|
|
|
#include <asm/mpc8260.h>
|
|
|
|
#include <asm/prom.h>
|
|
|
|
|
|
|
|
#include <sysdev/fsl_soc.h>
|
|
|
|
#include <sysdev/cpm2_pic.h>
|
|
|
|
|
|
|
|
#include "pq2.h"
|
|
|
|
|
|
|
|
static u8 __iomem *ep8248e_bcsr;
|
|
|
|
static struct device_node *ep8248e_bcsr_node;
|
|
|
|
|
|
|
|
#define BCSR7_SCC2_ENABLE 0x10
|
|
|
|
|
|
|
|
#define BCSR8_PHY1_ENABLE 0x80
|
|
|
|
#define BCSR8_PHY1_POWER 0x40
|
|
|
|
#define BCSR8_PHY2_ENABLE 0x20
|
|
|
|
#define BCSR8_PHY2_POWER 0x10
|
|
|
|
#define BCSR8_MDIO_READ 0x04
|
|
|
|
#define BCSR8_MDIO_CLOCK 0x02
|
|
|
|
#define BCSR8_MDIO_DATA 0x01
|
|
|
|
|
|
|
|
#define BCSR9_USB_ENABLE 0x80
|
|
|
|
#define BCSR9_USB_POWER 0x40
|
|
|
|
#define BCSR9_USB_HOST 0x20
|
|
|
|
#define BCSR9_USB_FULL_SPEED_TARGET 0x10
|
|
|
|
|
|
|
|
static void __init ep8248e_pic_init(void)
|
|
|
|
{
|
|
|
|
struct device_node *np = of_find_compatible_node(NULL, NULL, "fsl,pq2-pic");
|
|
|
|
if (!np) {
|
|
|
|
printk(KERN_ERR "PIC init: can not find cpm-pic node\n");
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
cpm2_pic_init(np);
|
|
|
|
of_node_put(np);
|
|
|
|
}
|
|
|
|
|
|
|
|
static void ep8248e_set_mdc(struct mdiobb_ctrl *ctrl, int level)
|
|
|
|
{
|
|
|
|
if (level)
|
|
|
|
setbits8(&ep8248e_bcsr[8], BCSR8_MDIO_CLOCK);
|
|
|
|
else
|
|
|
|
clrbits8(&ep8248e_bcsr[8], BCSR8_MDIO_CLOCK);
|
|
|
|
|
|
|
|
/* Read back to flush the write. */
|
|
|
|
in_8(&ep8248e_bcsr[8]);
|
|
|
|
}
|
|
|
|
|
|
|
|
static void ep8248e_set_mdio_dir(struct mdiobb_ctrl *ctrl, int output)
|
|
|
|
{
|
|
|
|
if (output)
|
|
|
|
clrbits8(&ep8248e_bcsr[8], BCSR8_MDIO_READ);
|
|
|
|
else
|
|
|
|
setbits8(&ep8248e_bcsr[8], BCSR8_MDIO_READ);
|
|
|
|
|
|
|
|
/* Read back to flush the write. */
|
|
|
|
in_8(&ep8248e_bcsr[8]);
|
|
|
|
}
|
|
|
|
|
|
|
|
static void ep8248e_set_mdio_data(struct mdiobb_ctrl *ctrl, int data)
|
|
|
|
{
|
|
|
|
if (data)
|
|
|
|
setbits8(&ep8248e_bcsr[8], BCSR8_MDIO_DATA);
|
|
|
|
else
|
|
|
|
clrbits8(&ep8248e_bcsr[8], BCSR8_MDIO_DATA);
|
|
|
|
|
|
|
|
/* Read back to flush the write. */
|
|
|
|
in_8(&ep8248e_bcsr[8]);
|
|
|
|
}
|
|
|
|
|
|
|
|
static int ep8248e_get_mdio_data(struct mdiobb_ctrl *ctrl)
|
|
|
|
{
|
|
|
|
return in_8(&ep8248e_bcsr[8]) & BCSR8_MDIO_DATA;
|
|
|
|
}
|
|
|
|
|
|
|
|
static const struct mdiobb_ops ep8248e_mdio_ops = {
|
|
|
|
.set_mdc = ep8248e_set_mdc,
|
|
|
|
.set_mdio_dir = ep8248e_set_mdio_dir,
|
|
|
|
.set_mdio_data = ep8248e_set_mdio_data,
|
|
|
|
.get_mdio_data = ep8248e_get_mdio_data,
|
|
|
|
.owner = THIS_MODULE,
|
|
|
|
};
|
|
|
|
|
|
|
|
static struct mdiobb_ctrl ep8248e_mdio_ctrl = {
|
|
|
|
.ops = &ep8248e_mdio_ops,
|
|
|
|
};
|
|
|
|
|
2010-07-23 05:52:34 +08:00
|
|
|
static int __devinit ep8248e_mdio_probe(struct platform_device *ofdev,
|
2008-01-18 06:32:05 +08:00
|
|
|
const struct of_device_id *match)
|
|
|
|
{
|
|
|
|
struct mii_bus *bus;
|
|
|
|
struct resource res;
|
|
|
|
struct device_node *node;
|
2009-04-25 20:53:28 +08:00
|
|
|
int ret;
|
2008-01-18 06:32:05 +08:00
|
|
|
|
2010-04-14 07:12:29 +08:00
|
|
|
node = of_get_parent(ofdev->dev.of_node);
|
2008-01-18 06:32:05 +08:00
|
|
|
of_node_put(node);
|
|
|
|
if (node != ep8248e_bcsr_node)
|
|
|
|
return -ENODEV;
|
|
|
|
|
2010-04-14 07:12:29 +08:00
|
|
|
ret = of_address_to_resource(ofdev->dev.of_node, 0, &res);
|
2008-01-18 06:32:05 +08:00
|
|
|
if (ret)
|
|
|
|
return ret;
|
|
|
|
|
|
|
|
bus = alloc_mdio_bitbang(&ep8248e_mdio_ctrl);
|
|
|
|
if (!bus)
|
|
|
|
return -ENOMEM;
|
|
|
|
|
|
|
|
bus->irq = kmalloc(sizeof(int) * PHY_MAX_ADDR, GFP_KERNEL);
|
2009-09-09 22:49:57 +08:00
|
|
|
if (bus->irq == NULL) {
|
|
|
|
ret = -ENOMEM;
|
|
|
|
goto err_free_bus;
|
|
|
|
}
|
2008-01-18 06:32:05 +08:00
|
|
|
|
|
|
|
bus->name = "ep8248e-mdio-bitbang";
|
2008-10-01 23:41:33 +08:00
|
|
|
bus->parent = &ofdev->dev;
|
2008-04-10 08:38:13 +08:00
|
|
|
snprintf(bus->id, MII_BUS_ID_SIZE, "%x", res.start);
|
2008-01-18 06:32:05 +08:00
|
|
|
|
2010-04-14 07:12:29 +08:00
|
|
|
ret = of_mdiobus_register(bus, ofdev->dev.of_node);
|
2009-09-09 22:49:57 +08:00
|
|
|
if (ret)
|
|
|
|
goto err_free_irq;
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
err_free_irq:
|
|
|
|
kfree(bus->irq);
|
|
|
|
err_free_bus:
|
|
|
|
free_mdio_bitbang(bus);
|
|
|
|
return ret;
|
2008-01-18 06:32:05 +08:00
|
|
|
}
|
|
|
|
|
2010-07-23 05:52:34 +08:00
|
|
|
static int ep8248e_mdio_remove(struct platform_device *ofdev)
|
2008-01-18 06:32:05 +08:00
|
|
|
{
|
|
|
|
BUG();
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static const struct of_device_id ep8248e_mdio_match[] = {
|
|
|
|
{
|
|
|
|
.compatible = "fsl,ep8248e-mdio-bitbang",
|
|
|
|
},
|
|
|
|
{},
|
|
|
|
};
|
|
|
|
|
|
|
|
static struct of_platform_driver ep8248e_mdio_driver = {
|
|
|
|
.driver = {
|
|
|
|
.name = "ep8248e-mdio-bitbang",
|
2010-04-14 07:13:02 +08:00
|
|
|
.owner = THIS_MODULE,
|
|
|
|
.of_match_table = ep8248e_mdio_match,
|
2008-01-18 06:32:05 +08:00
|
|
|
},
|
|
|
|
.probe = ep8248e_mdio_probe,
|
|
|
|
.remove = ep8248e_mdio_remove,
|
|
|
|
};
|
|
|
|
|
|
|
|
struct cpm_pin {
|
|
|
|
int port, pin, flags;
|
|
|
|
};
|
|
|
|
|
|
|
|
static __initdata struct cpm_pin ep8248e_pins[] = {
|
|
|
|
/* SMC1 */
|
|
|
|
{2, 4, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
|
|
|
|
{2, 5, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
|
|
|
|
|
|
|
|
/* SCC1 */
|
|
|
|
{2, 14, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
|
|
|
|
{2, 15, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
|
|
|
|
{3, 29, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
|
|
|
|
{3, 30, CPM_PIN_OUTPUT | CPM_PIN_SECONDARY},
|
|
|
|
{3, 31, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
|
|
|
|
|
|
|
|
/* FCC1 */
|
|
|
|
{0, 14, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
|
|
|
|
{0, 15, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
|
|
|
|
{0, 16, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
|
|
|
|
{0, 17, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
|
|
|
|
{0, 18, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
|
|
|
|
{0, 19, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
|
|
|
|
{0, 20, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
|
|
|
|
{0, 21, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
|
|
|
|
{0, 26, CPM_PIN_INPUT | CPM_PIN_SECONDARY},
|
|
|
|
{0, 27, CPM_PIN_INPUT | CPM_PIN_SECONDARY},
|
|
|
|
{0, 28, CPM_PIN_OUTPUT | CPM_PIN_SECONDARY},
|
|
|
|
{0, 29, CPM_PIN_OUTPUT | CPM_PIN_SECONDARY},
|
|
|
|
{0, 30, CPM_PIN_INPUT | CPM_PIN_SECONDARY},
|
|
|
|
{0, 31, CPM_PIN_INPUT | CPM_PIN_SECONDARY},
|
|
|
|
{2, 21, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
|
|
|
|
{2, 22, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
|
|
|
|
|
|
|
|
/* FCC2 */
|
|
|
|
{1, 18, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
|
|
|
|
{1, 19, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
|
|
|
|
{1, 20, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
|
|
|
|
{1, 21, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
|
|
|
|
{1, 22, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
|
|
|
|
{1, 23, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
|
|
|
|
{1, 24, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
|
|
|
|
{1, 25, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
|
|
|
|
{1, 26, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
|
|
|
|
{1, 27, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
|
|
|
|
{1, 28, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
|
|
|
|
{1, 29, CPM_PIN_OUTPUT | CPM_PIN_SECONDARY},
|
|
|
|
{1, 30, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
|
|
|
|
{1, 31, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
|
|
|
|
{2, 18, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
|
|
|
|
{2, 19, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
|
|
|
|
|
|
|
|
/* I2C */
|
|
|
|
{4, 14, CPM_PIN_INPUT | CPM_PIN_SECONDARY},
|
|
|
|
{4, 15, CPM_PIN_INPUT | CPM_PIN_SECONDARY},
|
|
|
|
|
|
|
|
/* USB */
|
|
|
|
{2, 10, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
|
|
|
|
{2, 11, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
|
|
|
|
{2, 20, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
|
|
|
|
{2, 24, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
|
|
|
|
{3, 23, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
|
|
|
|
{3, 24, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
|
|
|
|
{3, 25, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
|
|
|
|
};
|
|
|
|
|
|
|
|
static void __init init_ioports(void)
|
|
|
|
{
|
|
|
|
int i;
|
|
|
|
|
|
|
|
for (i = 0; i < ARRAY_SIZE(ep8248e_pins); i++) {
|
|
|
|
const struct cpm_pin *pin = &ep8248e_pins[i];
|
|
|
|
cpm2_set_pin(pin->port, pin->pin, pin->flags);
|
|
|
|
}
|
|
|
|
|
|
|
|
cpm2_smc_clk_setup(CPM_CLK_SMC1, CPM_BRG7);
|
|
|
|
cpm2_clk_setup(CPM_CLK_SCC1, CPM_BRG1, CPM_CLK_RX);
|
|
|
|
cpm2_clk_setup(CPM_CLK_SCC1, CPM_BRG1, CPM_CLK_TX);
|
|
|
|
cpm2_clk_setup(CPM_CLK_SCC3, CPM_CLK8, CPM_CLK_TX); /* USB */
|
|
|
|
cpm2_clk_setup(CPM_CLK_FCC1, CPM_CLK11, CPM_CLK_RX);
|
|
|
|
cpm2_clk_setup(CPM_CLK_FCC1, CPM_CLK10, CPM_CLK_TX);
|
|
|
|
cpm2_clk_setup(CPM_CLK_FCC2, CPM_CLK13, CPM_CLK_RX);
|
|
|
|
cpm2_clk_setup(CPM_CLK_FCC2, CPM_CLK14, CPM_CLK_TX);
|
|
|
|
}
|
|
|
|
|
|
|
|
static void __init ep8248e_setup_arch(void)
|
|
|
|
{
|
|
|
|
if (ppc_md.progress)
|
|
|
|
ppc_md.progress("ep8248e_setup_arch()", 0);
|
|
|
|
|
|
|
|
cpm2_reset();
|
|
|
|
|
|
|
|
/* When this is set, snooping CPM DMA from RAM causes
|
|
|
|
* machine checks. See erratum SIU18.
|
|
|
|
*/
|
|
|
|
clrbits32(&cpm2_immr->im_siu_conf.siu_82xx.sc_bcr, MPC82XX_BCR_PLDP);
|
|
|
|
|
|
|
|
ep8248e_bcsr_node =
|
|
|
|
of_find_compatible_node(NULL, NULL, "fsl,ep8248e-bcsr");
|
|
|
|
if (!ep8248e_bcsr_node) {
|
|
|
|
printk(KERN_ERR "No bcsr in device tree\n");
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
ep8248e_bcsr = of_iomap(ep8248e_bcsr_node, 0);
|
|
|
|
if (!ep8248e_bcsr) {
|
|
|
|
printk(KERN_ERR "Cannot map BCSR registers\n");
|
|
|
|
of_node_put(ep8248e_bcsr_node);
|
|
|
|
ep8248e_bcsr_node = NULL;
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
setbits8(&ep8248e_bcsr[7], BCSR7_SCC2_ENABLE);
|
|
|
|
setbits8(&ep8248e_bcsr[8], BCSR8_PHY1_ENABLE | BCSR8_PHY1_POWER |
|
|
|
|
BCSR8_PHY2_ENABLE | BCSR8_PHY2_POWER);
|
|
|
|
|
|
|
|
init_ioports();
|
|
|
|
|
|
|
|
if (ppc_md.progress)
|
|
|
|
ppc_md.progress("ep8248e_setup_arch(), finish", 0);
|
|
|
|
}
|
|
|
|
|
|
|
|
static __initdata struct of_device_id of_bus_ids[] = {
|
|
|
|
{ .compatible = "simple-bus", },
|
|
|
|
{ .compatible = "fsl,ep8248e-bcsr", },
|
|
|
|
{},
|
|
|
|
};
|
|
|
|
|
|
|
|
static int __init declare_of_platform_devices(void)
|
|
|
|
{
|
|
|
|
of_platform_bus_probe(NULL, of_bus_ids, NULL);
|
|
|
|
of_register_platform_driver(&ep8248e_mdio_driver);
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
machine_device_initcall(ep8248e, declare_of_platform_devices);
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Called very early, device-tree isn't unflattened
|
|
|
|
*/
|
|
|
|
static int __init ep8248e_probe(void)
|
|
|
|
{
|
|
|
|
unsigned long root = of_get_flat_dt_root();
|
|
|
|
return of_flat_dt_is_compatible(root, "fsl,ep8248e");
|
|
|
|
}
|
|
|
|
|
|
|
|
define_machine(ep8248e)
|
|
|
|
{
|
|
|
|
.name = "Embedded Planet EP8248E",
|
|
|
|
.probe = ep8248e_probe,
|
|
|
|
.setup_arch = ep8248e_setup_arch,
|
|
|
|
.init_IRQ = ep8248e_pic_init,
|
|
|
|
.get_irq = cpm2_get_irq,
|
|
|
|
.calibrate_decr = generic_calibrate_decr,
|
|
|
|
.restart = pq2_restart,
|
|
|
|
.progress = udbg_progress,
|
|
|
|
};
|