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linux_old1/arch/mips/include/asm/mach-malta/cpu-feature-overrides.h

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Linux-2.6.12-rc2 Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
2005-04-17 06:20:36 +08:00
/*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*
* Copyright (C) 2003, 2004 Chris Dearman
* Copyright (C) 2005 Ralf Baechle (ralf@linux-mips.org)
*/
#ifndef __ASM_MACH_MIPS_CPU_FEATURE_OVERRIDES_H
#define __ASM_MACH_MIPS_CPU_FEATURE_OVERRIDES_H
/*
* CPU feature overrides for MIPS boards
*/
Fixup a few lose ends in explicit support for MIPS R1/R2. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-10-07 23:58:15 +08:00
#ifdef CONFIG_CPU_MIPS32
Linux-2.6.12-rc2 Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
2005-04-17 06:20:36 +08:00
#define cpu_has_tlb 1
#define cpu_has_4kex 1
[MIPS] Fix R4K cache macro names Several machines have the R4K cache macro name spelled incorrectly. Namely, they have cpu_has_4kcache defined instead of cpu_has_4k_cache. Signed-off-by: Joshua Kinard <kumba@gentoo.org> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-06-18 14:17:01 +08:00
#define cpu_has_4k_cache 1
Linux-2.6.12-rc2 Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
2005-04-17 06:20:36 +08:00
/* #define cpu_has_fpu ? */
/* #define cpu_has_32fpr ? */
#define cpu_has_counter 1
/* #define cpu_has_watch ? */
#define cpu_has_divec 1
#define cpu_has_vce 0
/* #define cpu_has_cache_cdex_p ? */
/* #define cpu_has_cache_cdex_s ? */
/* #define cpu_has_prefetch ? */
#define cpu_has_mcheck 1
/* #define cpu_has_ejtag ? */
#define cpu_has_llsc 1
/* #define cpu_has_vtag_icache ? */
/* #define cpu_has_dc_aliases ? */
/* #define cpu_has_ic_fills_f_dc ? */
MIPS: Enable cpu_has_clo_clz for MIPS Technologies' platforms Enable cpu_has_clo_clz only when CONFIG_CPU_MIPS32 or CONFIG_CPU_MIPS64 is selected. This will optimize fls() and __fls() to use CLZ insn, and eventually ffs() and __ffs() as well. Malta and MIPSSim are development platforms, and need to take care of various processor configurations, release rivisions and so on, even across different MIPS ISAs. For such platforms we have to be careful, for instance, with turning on cpu_has_mips{32,64}r[12] features. As for CLZ, all MIPS32/64 processors support it, regardless of release revisions. Signed-off-by: Shinya Kuribayashi <skuribay@pobox.com> To: David VomLehn <dvomlehn@cisco.com> To: macro@linux-mips.org Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/1453/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-07-12 23:41:51 +08:00
#define cpu_has_clo_clz 1
Linux-2.6.12-rc2 Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
2005-04-17 06:20:36 +08:00
#define cpu_has_nofpuex 0
/* #define cpu_has_64bits ? */
/* #define cpu_has_64bit_zero_reg ? */
[MIPS] Use the proper technical term for naming some of the cache macros. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-07-06 20:04:01 +08:00
/* #define cpu_has_inclusive_pcaches ? */
Define cpu_icache_snoops_remote_store. This is slight abuse of something which originally was meant for SMP cache managment but it can be argued to apply on the 34K as well. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-08-17 01:54:41 +08:00
#define cpu_icache_snoops_remote_store 1
Linux-2.6.12-rc2 Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
2005-04-17 06:20:36 +08:00
#endif
Fixup a few lose ends in explicit support for MIPS R1/R2. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-10-07 23:58:15 +08:00
#ifdef CONFIG_CPU_MIPS64
Linux-2.6.12-rc2 Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
2005-04-17 06:20:36 +08:00
#define cpu_has_tlb 1
#define cpu_has_4kex 1
[MIPS] Fix R4K cache macro names Several machines have the R4K cache macro name spelled incorrectly. Namely, they have cpu_has_4kcache defined instead of cpu_has_4k_cache. Signed-off-by: Joshua Kinard <kumba@gentoo.org> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-06-18 14:17:01 +08:00
#define cpu_has_4k_cache 1
Linux-2.6.12-rc2 Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
2005-04-17 06:20:36 +08:00
/* #define cpu_has_fpu ? */
/* #define cpu_has_32fpr ? */
#define cpu_has_counter 1
/* #define cpu_has_watch ? */
#define cpu_has_divec 1
#define cpu_has_vce 0
/* #define cpu_has_cache_cdex_p ? */
/* #define cpu_has_cache_cdex_s ? */
/* #define cpu_has_prefetch ? */
#define cpu_has_mcheck 1
/* #define cpu_has_ejtag ? */
#define cpu_has_llsc 1
/* #define cpu_has_vtag_icache ? */
/* #define cpu_has_dc_aliases ? */
/* #define cpu_has_ic_fills_f_dc ? */
MIPS: Enable cpu_has_clo_clz for MIPS Technologies' platforms Enable cpu_has_clo_clz only when CONFIG_CPU_MIPS32 or CONFIG_CPU_MIPS64 is selected. This will optimize fls() and __fls() to use CLZ insn, and eventually ffs() and __ffs() as well. Malta and MIPSSim are development platforms, and need to take care of various processor configurations, release rivisions and so on, even across different MIPS ISAs. For such platforms we have to be careful, for instance, with turning on cpu_has_mips{32,64}r[12] features. As for CLZ, all MIPS32/64 processors support it, regardless of release revisions. Signed-off-by: Shinya Kuribayashi <skuribay@pobox.com> To: David VomLehn <dvomlehn@cisco.com> To: macro@linux-mips.org Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/1453/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-07-12 23:41:51 +08:00
#define cpu_has_clo_clz 1
Linux-2.6.12-rc2 Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
2005-04-17 06:20:36 +08:00
#define cpu_has_nofpuex 0
/* #define cpu_has_64bits ? */
/* #define cpu_has_64bit_zero_reg ? */
[MIPS] Use the proper technical term for naming some of the cache macros. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-07-06 20:04:01 +08:00
/* #define cpu_has_inclusive_pcaches ? */
Define cpu_icache_snoops_remote_store. This is slight abuse of something which originally was meant for SMP cache managment but it can be argued to apply on the 34K as well. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-08-17 01:54:41 +08:00
#define cpu_icache_snoops_remote_store 1
Linux-2.6.12-rc2 Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
2005-04-17 06:20:36 +08:00
#endif
#endif /* __ASM_MACH_MIPS_CPU_FEATURE_OVERRIDES_H */