2006-10-04 05:01:26 +08:00
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/* include/asm-generic/tlb.h
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2005-04-17 06:20:36 +08:00
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*
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* Generic TLB shootdown code
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*
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* Copyright 2001 Red Hat, Inc.
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* Based on code from mm/memory.c Copyright Linus Torvalds and others.
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*
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2011-05-25 08:11:45 +08:00
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* Copyright 2011 Red Hat, Inc., Peter Zijlstra <pzijlstr@redhat.com>
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*
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2005-04-17 06:20:36 +08:00
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version
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* 2 of the License, or (at your option) any later version.
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*/
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#ifndef _ASM_GENERIC__TLB_H
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#define _ASM_GENERIC__TLB_H
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#include <linux/swap.h>
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2008-02-01 05:05:48 +08:00
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#include <asm/pgalloc.h>
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2005-04-17 06:20:36 +08:00
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#include <asm/tlbflush.h>
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2011-05-25 08:12:00 +08:00
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#ifdef CONFIG_HAVE_RCU_TABLE_FREE
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/*
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* Semi RCU freeing of the page directories.
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*
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* This is needed by some architectures to implement software pagetable walkers.
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*
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* gup_fast() and other software pagetable walkers do a lockless page-table
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* walk and therefore needs some synchronization with the freeing of the page
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* directories. The chosen means to accomplish that is by disabling IRQs over
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* the walk.
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*
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* Architectures that use IPIs to flush TLBs will then automagically DTRT,
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* since we unlink the page, flush TLBs, free the page. Since the disabling of
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* IRQs delays the completion of the TLB flush we can never observe an already
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* freed page.
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*
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* Architectures that do not have this (PPC) need to delay the freeing by some
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* other means, this is that means.
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*
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* What we do is batch the freed directory pages (tables) and RCU free them.
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* We use the sched RCU variant, as that guarantees that IRQ/preempt disabling
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* holds off grace periods.
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*
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* However, in order to batch these pages we need to allocate storage, this
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* allocation is deep inside the MM code and can thus easily fail on memory
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* pressure. To guarantee progress we fall back to single table freeing, see
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* the implementation of tlb_remove_table_one().
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*
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*/
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struct mmu_table_batch {
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struct rcu_head rcu;
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unsigned int nr;
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void *tables[0];
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};
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#define MAX_TABLE_BATCH \
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((PAGE_SIZE - sizeof(struct mmu_table_batch)) / sizeof(void *))
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extern void tlb_table_flush(struct mmu_gather *tlb);
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extern void tlb_remove_table(struct mmu_gather *tlb, void *table);
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#endif
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2011-05-25 08:11:45 +08:00
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/*
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* If we can't allocate a page to make a big batch of page pointers
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* to work on, then just handle a few from the on-stack structure.
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*/
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#define MMU_GATHER_BUNDLE 8
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2011-05-25 08:12:01 +08:00
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struct mmu_gather_batch {
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struct mmu_gather_batch *next;
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unsigned int nr;
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unsigned int max;
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struct page *pages[0];
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};
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#define MAX_GATHER_BATCH \
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((PAGE_SIZE - sizeof(struct mmu_gather_batch)) / sizeof(void *))
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2013-01-05 07:35:12 +08:00
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/*
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* Limit the maximum number of mmu_gather batches to reduce a risk of soft
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* lockups for non-preemptible kernels on huge machines when a lot of memory
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* is zapped during unmapping.
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* 10K pages freed at once should be safe even without a preemption point.
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*/
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#define MAX_GATHER_BATCH_COUNT (10000UL/MAX_GATHER_BATCH)
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2005-04-17 06:20:36 +08:00
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/* struct mmu_gather is an opaque type used by the mm code for passing around
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2005-10-30 09:16:01 +08:00
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* any data needed by arch specific code for tlb_remove_page.
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2005-04-17 06:20:36 +08:00
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*/
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struct mmu_gather {
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struct mm_struct *mm;
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2011-05-25 08:12:00 +08:00
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#ifdef CONFIG_HAVE_RCU_TABLE_FREE
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struct mmu_table_batch *batch;
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#endif
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2012-06-28 09:02:21 +08:00
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unsigned long start;
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unsigned long end;
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2013-04-13 07:23:54 +08:00
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/* we are in the middle of an operation to clear
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* a full mm and can make some optimizations */
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2014-10-29 18:03:09 +08:00
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unsigned int fullmm : 1,
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2013-04-13 07:23:54 +08:00
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/* we have performed an operation which
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* requires a complete flush of the tlb */
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need_flush_all : 1;
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2011-05-25 08:12:01 +08:00
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struct mmu_gather_batch *active;
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struct mmu_gather_batch local;
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struct page *__pages[MMU_GATHER_BUNDLE];
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2013-01-05 07:35:12 +08:00
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unsigned int batch_count;
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2005-04-17 06:20:36 +08:00
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};
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2011-05-25 08:12:14 +08:00
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#define HAVE_GENERIC_MMU_GATHER
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2011-05-25 08:12:01 +08:00
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Fix TLB gather virtual address range invalidation corner cases
Ben Tebulin reported:
"Since v3.7.2 on two independent machines a very specific Git
repository fails in 9/10 cases on git-fsck due to an SHA1/memory
failures. This only occurs on a very specific repository and can be
reproduced stably on two independent laptops. Git mailing list ran
out of ideas and for me this looks like some very exotic kernel issue"
and bisected the failure to the backport of commit 53a59fc67f97 ("mm:
limit mmu_gather batching to fix soft lockups on !CONFIG_PREEMPT").
That commit itself is not actually buggy, but what it does is to make it
much more likely to hit the partial TLB invalidation case, since it
introduces a new case in tlb_next_batch() that previously only ever
happened when running out of memory.
The real bug is that the TLB gather virtual memory range setup is subtly
buggered. It was introduced in commit 597e1c3580b7 ("mm/mmu_gather:
enable tlb flush range in generic mmu_gather"), and the range handling
was already fixed at least once in commit e6c495a96ce0 ("mm: fix the TLB
range flushed when __tlb_remove_page() runs out of slots"), but that fix
was not complete.
The problem with the TLB gather virtual address range is that it isn't
set up by the initial tlb_gather_mmu() initialization (which didn't get
the TLB range information), but it is set up ad-hoc later by the
functions that actually flush the TLB. And so any such case that forgot
to update the TLB range entries would potentially miss TLB invalidates.
Rather than try to figure out exactly which particular ad-hoc range
setup was missing (I personally suspect it's the hugetlb case in
zap_huge_pmd(), which didn't have the same logic as zap_pte_range()
did), this patch just gets rid of the problem at the source: make the
TLB range information available to tlb_gather_mmu(), and initialize it
when initializing all the other tlb gather fields.
This makes the patch larger, but conceptually much simpler. And the end
result is much more understandable; even if you want to play games with
partial ranges when invalidating the TLB contents in chunks, now the
range information is always there, and anybody who doesn't want to
bother with it won't introduce subtle bugs.
Ben verified that this fixes his problem.
Reported-bisected-and-tested-by: Ben Tebulin <tebulin@googlemail.com>
Build-testing-by: Stephen Rothwell <sfr@canb.auug.org.au>
Build-testing-by: Richard Weinberger <richard.weinberger@gmail.com>
Reviewed-by: Michal Hocko <mhocko@suse.cz>
Acked-by: Peter Zijlstra <peterz@infradead.org>
Cc: stable@vger.kernel.org
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2013-08-16 02:42:25 +08:00
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void tlb_gather_mmu(struct mmu_gather *tlb, struct mm_struct *mm, unsigned long start, unsigned long end);
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2011-05-25 08:12:14 +08:00
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void tlb_flush_mmu(struct mmu_gather *tlb);
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2012-06-28 09:02:19 +08:00
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void tlb_finish_mmu(struct mmu_gather *tlb, unsigned long start,
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unsigned long end);
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2011-05-25 08:12:14 +08:00
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int __tlb_remove_page(struct mmu_gather *tlb, struct page *page);
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2011-05-25 08:11:45 +08:00
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/* tlb_remove_page
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* Similar to __tlb_remove_page but will call tlb_flush_mmu() itself when
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* required.
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*/
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static inline void tlb_remove_page(struct mmu_gather *tlb, struct page *page)
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{
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if (!__tlb_remove_page(tlb, page))
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tlb_flush_mmu(tlb);
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2005-04-17 06:20:36 +08:00
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}
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2014-10-29 18:03:09 +08:00
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static inline void __tlb_adjust_range(struct mmu_gather *tlb,
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unsigned long address)
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{
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tlb->start = min(tlb->start, address);
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tlb->end = max(tlb->end, address + PAGE_SIZE);
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}
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static inline void __tlb_reset_range(struct mmu_gather *tlb)
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{
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2015-01-13 03:10:55 +08:00
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if (tlb->fullmm) {
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tlb->start = tlb->end = ~0;
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} else {
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tlb->start = TASK_SIZE;
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tlb->end = 0;
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}
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2014-10-29 18:03:09 +08:00
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}
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/*
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* In the case of tlb vma handling, we can optimise these away in the
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* case where we're doing a full MM flush. When we're doing a munmap,
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* the vmas are adjusted to only cover the region to be torn down.
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*/
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#ifndef tlb_start_vma
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#define tlb_start_vma(tlb, vma) do { } while (0)
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#endif
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#define __tlb_end_vma(tlb, vma) \
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do { \
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if (!tlb->fullmm && tlb->end) { \
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tlb_flush(tlb); \
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__tlb_reset_range(tlb); \
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} \
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} while (0)
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#ifndef tlb_end_vma
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#define tlb_end_vma __tlb_end_vma
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#endif
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#ifndef __tlb_remove_tlb_entry
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#define __tlb_remove_tlb_entry(tlb, ptep, address) do { } while (0)
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#endif
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2005-04-17 06:20:36 +08:00
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/**
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* tlb_remove_tlb_entry - remember a pte unmapping for later tlb invalidation.
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*
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2014-10-29 18:03:09 +08:00
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* Record the fact that pte's were really unmapped by updating the range,
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* so we can later optimise away the tlb invalidate. This helps when
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* userspace is unmapping already-unmapped pages, which happens quite a lot.
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2005-04-17 06:20:36 +08:00
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*/
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#define tlb_remove_tlb_entry(tlb, ptep, address) \
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do { \
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2014-10-29 18:03:09 +08:00
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__tlb_adjust_range(tlb, address); \
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2005-04-17 06:20:36 +08:00
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__tlb_remove_tlb_entry(tlb, ptep, address); \
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} while (0)
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2012-01-13 09:19:16 +08:00
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/**
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* tlb_remove_pmd_tlb_entry - remember a pmd mapping for later tlb invalidation
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* This is a nop so far, because only x86 needs it.
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*/
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#ifndef __tlb_remove_pmd_tlb_entry
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#define __tlb_remove_pmd_tlb_entry(tlb, pmdp, address) do {} while (0)
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#endif
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#define tlb_remove_pmd_tlb_entry(tlb, pmdp, address) \
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do { \
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2014-10-29 18:03:09 +08:00
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__tlb_adjust_range(tlb, address); \
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2012-01-13 09:19:16 +08:00
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__tlb_remove_pmd_tlb_entry(tlb, pmdp, address); \
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} while (0)
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mm: Pass virtual address to [__]p{te,ud,md}_free_tlb()
mm: Pass virtual address to [__]p{te,ud,md}_free_tlb()
Upcoming paches to support the new 64-bit "BookE" powerpc architecture
will need to have the virtual address corresponding to PTE page when
freeing it, due to the way the HW table walker works.
Basically, the TLB can be loaded with "large" pages that cover the whole
virtual space (well, sort-of, half of it actually) represented by a PTE
page, and which contain an "indirect" bit indicating that this TLB entry
RPN points to an array of PTEs from which the TLB can then create direct
entries. Thus, in order to invalidate those when PTE pages are deleted,
we need the virtual address to pass to tlbilx or tlbivax instructions.
The old trick of sticking it somewhere in the PTE page struct page sucks
too much, the address is almost readily available in all call sites and
almost everybody implemets these as macros, so we may as well add the
argument everywhere. I added it to the pmd and pud variants for consistency.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Acked-by: David Howells <dhowells@redhat.com> [MN10300 & FRV]
Acked-by: Nick Piggin <npiggin@suse.de>
Acked-by: Martin Schwidefsky <schwidefsky@de.ibm.com> [s390]
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2009-07-22 13:44:28 +08:00
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#define pte_free_tlb(tlb, ptep, address) \
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2005-04-17 06:20:36 +08:00
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do { \
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2014-10-29 18:03:09 +08:00
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__tlb_adjust_range(tlb, address); \
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mm: Pass virtual address to [__]p{te,ud,md}_free_tlb()
mm: Pass virtual address to [__]p{te,ud,md}_free_tlb()
Upcoming paches to support the new 64-bit "BookE" powerpc architecture
will need to have the virtual address corresponding to PTE page when
freeing it, due to the way the HW table walker works.
Basically, the TLB can be loaded with "large" pages that cover the whole
virtual space (well, sort-of, half of it actually) represented by a PTE
page, and which contain an "indirect" bit indicating that this TLB entry
RPN points to an array of PTEs from which the TLB can then create direct
entries. Thus, in order to invalidate those when PTE pages are deleted,
we need the virtual address to pass to tlbilx or tlbivax instructions.
The old trick of sticking it somewhere in the PTE page struct page sucks
too much, the address is almost readily available in all call sites and
almost everybody implemets these as macros, so we may as well add the
argument everywhere. I added it to the pmd and pud variants for consistency.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Acked-by: David Howells <dhowells@redhat.com> [MN10300 & FRV]
Acked-by: Nick Piggin <npiggin@suse.de>
Acked-by: Martin Schwidefsky <schwidefsky@de.ibm.com> [s390]
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2009-07-22 13:44:28 +08:00
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__pte_free_tlb(tlb, ptep, address); \
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2005-04-17 06:20:36 +08:00
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} while (0)
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#ifndef __ARCH_HAS_4LEVEL_HACK
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mm: Pass virtual address to [__]p{te,ud,md}_free_tlb()
mm: Pass virtual address to [__]p{te,ud,md}_free_tlb()
Upcoming paches to support the new 64-bit "BookE" powerpc architecture
will need to have the virtual address corresponding to PTE page when
freeing it, due to the way the HW table walker works.
Basically, the TLB can be loaded with "large" pages that cover the whole
virtual space (well, sort-of, half of it actually) represented by a PTE
page, and which contain an "indirect" bit indicating that this TLB entry
RPN points to an array of PTEs from which the TLB can then create direct
entries. Thus, in order to invalidate those when PTE pages are deleted,
we need the virtual address to pass to tlbilx or tlbivax instructions.
The old trick of sticking it somewhere in the PTE page struct page sucks
too much, the address is almost readily available in all call sites and
almost everybody implemets these as macros, so we may as well add the
argument everywhere. I added it to the pmd and pud variants for consistency.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Acked-by: David Howells <dhowells@redhat.com> [MN10300 & FRV]
Acked-by: Nick Piggin <npiggin@suse.de>
Acked-by: Martin Schwidefsky <schwidefsky@de.ibm.com> [s390]
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2009-07-22 13:44:28 +08:00
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#define pud_free_tlb(tlb, pudp, address) \
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2005-04-17 06:20:36 +08:00
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do { \
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2014-10-29 18:03:09 +08:00
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__tlb_adjust_range(tlb, address); \
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mm: Pass virtual address to [__]p{te,ud,md}_free_tlb()
mm: Pass virtual address to [__]p{te,ud,md}_free_tlb()
Upcoming paches to support the new 64-bit "BookE" powerpc architecture
will need to have the virtual address corresponding to PTE page when
freeing it, due to the way the HW table walker works.
Basically, the TLB can be loaded with "large" pages that cover the whole
virtual space (well, sort-of, half of it actually) represented by a PTE
page, and which contain an "indirect" bit indicating that this TLB entry
RPN points to an array of PTEs from which the TLB can then create direct
entries. Thus, in order to invalidate those when PTE pages are deleted,
we need the virtual address to pass to tlbilx or tlbivax instructions.
The old trick of sticking it somewhere in the PTE page struct page sucks
too much, the address is almost readily available in all call sites and
almost everybody implemets these as macros, so we may as well add the
argument everywhere. I added it to the pmd and pud variants for consistency.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Acked-by: David Howells <dhowells@redhat.com> [MN10300 & FRV]
Acked-by: Nick Piggin <npiggin@suse.de>
Acked-by: Martin Schwidefsky <schwidefsky@de.ibm.com> [s390]
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2009-07-22 13:44:28 +08:00
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__pud_free_tlb(tlb, pudp, address); \
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2005-04-17 06:20:36 +08:00
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} while (0)
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#endif
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mm: Pass virtual address to [__]p{te,ud,md}_free_tlb()
mm: Pass virtual address to [__]p{te,ud,md}_free_tlb()
Upcoming paches to support the new 64-bit "BookE" powerpc architecture
will need to have the virtual address corresponding to PTE page when
freeing it, due to the way the HW table walker works.
Basically, the TLB can be loaded with "large" pages that cover the whole
virtual space (well, sort-of, half of it actually) represented by a PTE
page, and which contain an "indirect" bit indicating that this TLB entry
RPN points to an array of PTEs from which the TLB can then create direct
entries. Thus, in order to invalidate those when PTE pages are deleted,
we need the virtual address to pass to tlbilx or tlbivax instructions.
The old trick of sticking it somewhere in the PTE page struct page sucks
too much, the address is almost readily available in all call sites and
almost everybody implemets these as macros, so we may as well add the
argument everywhere. I added it to the pmd and pud variants for consistency.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Acked-by: David Howells <dhowells@redhat.com> [MN10300 & FRV]
Acked-by: Nick Piggin <npiggin@suse.de>
Acked-by: Martin Schwidefsky <schwidefsky@de.ibm.com> [s390]
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2009-07-22 13:44:28 +08:00
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#define pmd_free_tlb(tlb, pmdp, address) \
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2005-04-17 06:20:36 +08:00
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do { \
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2014-10-29 18:03:09 +08:00
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__tlb_adjust_range(tlb, address); \
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mm: Pass virtual address to [__]p{te,ud,md}_free_tlb()
mm: Pass virtual address to [__]p{te,ud,md}_free_tlb()
Upcoming paches to support the new 64-bit "BookE" powerpc architecture
will need to have the virtual address corresponding to PTE page when
freeing it, due to the way the HW table walker works.
Basically, the TLB can be loaded with "large" pages that cover the whole
virtual space (well, sort-of, half of it actually) represented by a PTE
page, and which contain an "indirect" bit indicating that this TLB entry
RPN points to an array of PTEs from which the TLB can then create direct
entries. Thus, in order to invalidate those when PTE pages are deleted,
we need the virtual address to pass to tlbilx or tlbivax instructions.
The old trick of sticking it somewhere in the PTE page struct page sucks
too much, the address is almost readily available in all call sites and
almost everybody implemets these as macros, so we may as well add the
argument everywhere. I added it to the pmd and pud variants for consistency.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Acked-by: David Howells <dhowells@redhat.com> [MN10300 & FRV]
Acked-by: Nick Piggin <npiggin@suse.de>
Acked-by: Martin Schwidefsky <schwidefsky@de.ibm.com> [s390]
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2009-07-22 13:44:28 +08:00
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__pmd_free_tlb(tlb, pmdp, address); \
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2005-04-17 06:20:36 +08:00
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} while (0)
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#define tlb_migrate_finish(mm) do {} while (0)
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#endif /* _ASM_GENERIC__TLB_H */
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