2012-05-15 15:49:02 +08:00
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/*
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* imx53 pinctrl driver based on imx pinmux core
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*
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* Copyright (C) 2012 Freescale Semiconductor, Inc.
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* Copyright (C) 2012 Linaro, Inc.
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*
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* Author: Dong Aisheng <dong.aisheng@linaro.org>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*/
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#include <linux/err.h>
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#include <linux/init.h>
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#include <linux/io.h>
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#include <linux/module.h>
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#include <linux/of.h>
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#include <linux/of_device.h>
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#include <linux/pinctrl/pinctrl.h>
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#include "pinctrl-imx.h"
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enum imx53_pads {
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2013-02-20 10:32:52 +08:00
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MX53_PAD_RESERVE0 = 0,
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MX53_PAD_RESERVE1 = 1,
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MX53_PAD_RESERVE2 = 2,
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MX53_PAD_RESERVE3 = 3,
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MX53_PAD_RESERVE4 = 4,
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MX53_PAD_RESERVE5 = 5,
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MX53_PAD_RESERVE6 = 6,
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MX53_PAD_RESERVE7 = 7,
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MX53_PAD_GPIO_19 = 8,
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MX53_PAD_KEY_COL0 = 9,
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MX53_PAD_KEY_ROW0 = 10,
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MX53_PAD_KEY_COL1 = 11,
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MX53_PAD_KEY_ROW1 = 12,
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MX53_PAD_KEY_COL2 = 13,
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MX53_PAD_KEY_ROW2 = 14,
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MX53_PAD_KEY_COL3 = 15,
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MX53_PAD_KEY_ROW3 = 16,
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MX53_PAD_KEY_COL4 = 17,
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MX53_PAD_KEY_ROW4 = 18,
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MX53_PAD_DI0_DISP_CLK = 19,
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MX53_PAD_DI0_PIN15 = 20,
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MX53_PAD_DI0_PIN2 = 21,
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MX53_PAD_DI0_PIN3 = 22,
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MX53_PAD_DI0_PIN4 = 23,
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MX53_PAD_DISP0_DAT0 = 24,
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MX53_PAD_DISP0_DAT1 = 25,
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MX53_PAD_DISP0_DAT2 = 26,
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MX53_PAD_DISP0_DAT3 = 27,
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MX53_PAD_DISP0_DAT4 = 28,
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MX53_PAD_DISP0_DAT5 = 29,
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MX53_PAD_DISP0_DAT6 = 30,
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MX53_PAD_DISP0_DAT7 = 31,
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MX53_PAD_DISP0_DAT8 = 32,
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MX53_PAD_DISP0_DAT9 = 33,
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MX53_PAD_DISP0_DAT10 = 34,
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MX53_PAD_DISP0_DAT11 = 35,
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MX53_PAD_DISP0_DAT12 = 36,
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MX53_PAD_DISP0_DAT13 = 37,
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MX53_PAD_DISP0_DAT14 = 38,
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MX53_PAD_DISP0_DAT15 = 39,
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MX53_PAD_DISP0_DAT16 = 40,
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MX53_PAD_DISP0_DAT17 = 41,
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MX53_PAD_DISP0_DAT18 = 42,
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MX53_PAD_DISP0_DAT19 = 43,
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MX53_PAD_DISP0_DAT20 = 44,
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MX53_PAD_DISP0_DAT21 = 45,
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MX53_PAD_DISP0_DAT22 = 46,
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MX53_PAD_DISP0_DAT23 = 47,
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MX53_PAD_CSI0_PIXCLK = 48,
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MX53_PAD_CSI0_MCLK = 49,
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MX53_PAD_CSI0_DATA_EN = 50,
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MX53_PAD_CSI0_VSYNC = 51,
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MX53_PAD_CSI0_DAT4 = 52,
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MX53_PAD_CSI0_DAT5 = 53,
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MX53_PAD_CSI0_DAT6 = 54,
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MX53_PAD_CSI0_DAT7 = 55,
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MX53_PAD_CSI0_DAT8 = 56,
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MX53_PAD_CSI0_DAT9 = 57,
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MX53_PAD_CSI0_DAT10 = 58,
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MX53_PAD_CSI0_DAT11 = 59,
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MX53_PAD_CSI0_DAT12 = 60,
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MX53_PAD_CSI0_DAT13 = 61,
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MX53_PAD_CSI0_DAT14 = 62,
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MX53_PAD_CSI0_DAT15 = 63,
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MX53_PAD_CSI0_DAT16 = 64,
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MX53_PAD_CSI0_DAT17 = 65,
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MX53_PAD_CSI0_DAT18 = 66,
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MX53_PAD_CSI0_DAT19 = 67,
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MX53_PAD_EIM_A25 = 68,
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MX53_PAD_EIM_EB2 = 69,
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MX53_PAD_EIM_D16 = 70,
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MX53_PAD_EIM_D17 = 71,
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MX53_PAD_EIM_D18 = 72,
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MX53_PAD_EIM_D19 = 73,
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MX53_PAD_EIM_D20 = 74,
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MX53_PAD_EIM_D21 = 75,
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MX53_PAD_EIM_D22 = 76,
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MX53_PAD_EIM_D23 = 77,
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MX53_PAD_EIM_EB3 = 78,
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MX53_PAD_EIM_D24 = 79,
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MX53_PAD_EIM_D25 = 80,
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MX53_PAD_EIM_D26 = 81,
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MX53_PAD_EIM_D27 = 82,
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MX53_PAD_EIM_D28 = 83,
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MX53_PAD_EIM_D29 = 84,
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MX53_PAD_EIM_D30 = 85,
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MX53_PAD_EIM_D31 = 86,
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MX53_PAD_EIM_A24 = 87,
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MX53_PAD_EIM_A23 = 88,
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MX53_PAD_EIM_A22 = 89,
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MX53_PAD_EIM_A21 = 90,
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MX53_PAD_EIM_A20 = 91,
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MX53_PAD_EIM_A19 = 92,
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MX53_PAD_EIM_A18 = 93,
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MX53_PAD_EIM_A17 = 94,
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MX53_PAD_EIM_A16 = 95,
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MX53_PAD_EIM_CS0 = 96,
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MX53_PAD_EIM_CS1 = 97,
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MX53_PAD_EIM_OE = 98,
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MX53_PAD_EIM_RW = 99,
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MX53_PAD_EIM_LBA = 100,
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MX53_PAD_EIM_EB0 = 101,
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MX53_PAD_EIM_EB1 = 102,
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MX53_PAD_EIM_DA0 = 103,
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MX53_PAD_EIM_DA1 = 104,
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MX53_PAD_EIM_DA2 = 105,
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MX53_PAD_EIM_DA3 = 106,
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MX53_PAD_EIM_DA4 = 107,
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MX53_PAD_EIM_DA5 = 108,
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MX53_PAD_EIM_DA6 = 109,
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MX53_PAD_EIM_DA7 = 110,
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MX53_PAD_EIM_DA8 = 111,
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MX53_PAD_EIM_DA9 = 112,
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MX53_PAD_EIM_DA10 = 113,
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MX53_PAD_EIM_DA11 = 114,
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MX53_PAD_EIM_DA12 = 115,
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MX53_PAD_EIM_DA13 = 116,
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MX53_PAD_EIM_DA14 = 117,
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MX53_PAD_EIM_DA15 = 118,
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MX53_PAD_NANDF_WE_B = 119,
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MX53_PAD_NANDF_RE_B = 120,
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MX53_PAD_EIM_WAIT = 121,
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MX53_PAD_RESERVE8 = 122,
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MX53_PAD_LVDS1_TX3_P = 123,
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MX53_PAD_LVDS1_TX2_P = 124,
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MX53_PAD_LVDS1_CLK_P = 125,
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MX53_PAD_LVDS1_TX1_P = 126,
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MX53_PAD_LVDS1_TX0_P = 127,
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MX53_PAD_LVDS0_TX3_P = 128,
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MX53_PAD_LVDS0_CLK_P = 129,
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MX53_PAD_LVDS0_TX2_P = 130,
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MX53_PAD_LVDS0_TX1_P = 131,
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MX53_PAD_LVDS0_TX0_P = 132,
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MX53_PAD_GPIO_10 = 133,
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MX53_PAD_GPIO_11 = 134,
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MX53_PAD_GPIO_12 = 135,
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MX53_PAD_GPIO_13 = 136,
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MX53_PAD_GPIO_14 = 137,
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MX53_PAD_NANDF_CLE = 138,
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MX53_PAD_NANDF_ALE = 139,
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MX53_PAD_NANDF_WP_B = 140,
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MX53_PAD_NANDF_RB0 = 141,
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MX53_PAD_NANDF_CS0 = 142,
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MX53_PAD_NANDF_CS1 = 143,
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MX53_PAD_NANDF_CS2 = 144,
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MX53_PAD_NANDF_CS3 = 145,
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MX53_PAD_FEC_MDIO = 146,
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MX53_PAD_FEC_REF_CLK = 147,
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MX53_PAD_FEC_RX_ER = 148,
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MX53_PAD_FEC_CRS_DV = 149,
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MX53_PAD_FEC_RXD1 = 150,
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MX53_PAD_FEC_RXD0 = 151,
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MX53_PAD_FEC_TX_EN = 152,
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MX53_PAD_FEC_TXD1 = 153,
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MX53_PAD_FEC_TXD0 = 154,
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MX53_PAD_FEC_MDC = 155,
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MX53_PAD_PATA_DIOW = 156,
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MX53_PAD_PATA_DMACK = 157,
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MX53_PAD_PATA_DMARQ = 158,
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MX53_PAD_PATA_BUFFER_EN = 159,
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MX53_PAD_PATA_INTRQ = 160,
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MX53_PAD_PATA_DIOR = 161,
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MX53_PAD_PATA_RESET_B = 162,
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MX53_PAD_PATA_IORDY = 163,
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MX53_PAD_PATA_DA_0 = 164,
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MX53_PAD_PATA_DA_1 = 165,
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MX53_PAD_PATA_DA_2 = 166,
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MX53_PAD_PATA_CS_0 = 167,
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MX53_PAD_PATA_CS_1 = 168,
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MX53_PAD_PATA_DATA0 = 169,
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MX53_PAD_PATA_DATA1 = 170,
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MX53_PAD_PATA_DATA2 = 171,
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MX53_PAD_PATA_DATA3 = 172,
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MX53_PAD_PATA_DATA4 = 173,
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MX53_PAD_PATA_DATA5 = 174,
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MX53_PAD_PATA_DATA6 = 175,
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MX53_PAD_PATA_DATA7 = 176,
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MX53_PAD_PATA_DATA8 = 177,
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MX53_PAD_PATA_DATA9 = 178,
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MX53_PAD_PATA_DATA10 = 179,
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MX53_PAD_PATA_DATA11 = 180,
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MX53_PAD_PATA_DATA12 = 181,
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MX53_PAD_PATA_DATA13 = 182,
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MX53_PAD_PATA_DATA14 = 183,
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MX53_PAD_PATA_DATA15 = 184,
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MX53_PAD_SD1_DATA0 = 185,
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MX53_PAD_SD1_DATA1 = 186,
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MX53_PAD_SD1_CMD = 187,
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MX53_PAD_SD1_DATA2 = 188,
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MX53_PAD_SD1_CLK = 189,
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MX53_PAD_SD1_DATA3 = 190,
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MX53_PAD_SD2_CLK = 191,
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MX53_PAD_SD2_CMD = 192,
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MX53_PAD_SD2_DATA3 = 193,
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MX53_PAD_SD2_DATA2 = 194,
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MX53_PAD_SD2_DATA1 = 195,
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MX53_PAD_SD2_DATA0 = 196,
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MX53_PAD_GPIO_0 = 197,
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MX53_PAD_GPIO_1 = 198,
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MX53_PAD_GPIO_9 = 199,
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MX53_PAD_GPIO_3 = 200,
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MX53_PAD_GPIO_6 = 201,
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MX53_PAD_GPIO_2 = 202,
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MX53_PAD_GPIO_4 = 203,
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MX53_PAD_GPIO_5 = 204,
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MX53_PAD_GPIO_7 = 205,
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MX53_PAD_GPIO_8 = 206,
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MX53_PAD_GPIO_16 = 207,
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MX53_PAD_GPIO_17 = 208,
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MX53_PAD_GPIO_18 = 209,
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2012-05-15 15:49:02 +08:00
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};
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/* Pad names for the pinmux subsystem */
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static const struct pinctrl_pin_desc imx53_pinctrl_pads[] = {
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2013-02-20 10:32:52 +08:00
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IMX_PINCTRL_PIN(MX53_PAD_RESERVE0),
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IMX_PINCTRL_PIN(MX53_PAD_RESERVE1),
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IMX_PINCTRL_PIN(MX53_PAD_RESERVE2),
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IMX_PINCTRL_PIN(MX53_PAD_RESERVE3),
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IMX_PINCTRL_PIN(MX53_PAD_RESERVE4),
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IMX_PINCTRL_PIN(MX53_PAD_RESERVE5),
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IMX_PINCTRL_PIN(MX53_PAD_RESERVE6),
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IMX_PINCTRL_PIN(MX53_PAD_RESERVE7),
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2012-05-15 15:49:02 +08:00
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IMX_PINCTRL_PIN(MX53_PAD_GPIO_19),
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IMX_PINCTRL_PIN(MX53_PAD_KEY_COL0),
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IMX_PINCTRL_PIN(MX53_PAD_KEY_ROW0),
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IMX_PINCTRL_PIN(MX53_PAD_KEY_COL1),
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IMX_PINCTRL_PIN(MX53_PAD_KEY_ROW1),
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IMX_PINCTRL_PIN(MX53_PAD_KEY_COL2),
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IMX_PINCTRL_PIN(MX53_PAD_KEY_ROW2),
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IMX_PINCTRL_PIN(MX53_PAD_KEY_COL3),
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IMX_PINCTRL_PIN(MX53_PAD_KEY_ROW3),
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IMX_PINCTRL_PIN(MX53_PAD_KEY_COL4),
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IMX_PINCTRL_PIN(MX53_PAD_KEY_ROW4),
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IMX_PINCTRL_PIN(MX53_PAD_DI0_DISP_CLK),
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IMX_PINCTRL_PIN(MX53_PAD_DI0_PIN15),
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IMX_PINCTRL_PIN(MX53_PAD_DI0_PIN2),
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IMX_PINCTRL_PIN(MX53_PAD_DI0_PIN3),
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IMX_PINCTRL_PIN(MX53_PAD_DI0_PIN4),
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IMX_PINCTRL_PIN(MX53_PAD_DISP0_DAT0),
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IMX_PINCTRL_PIN(MX53_PAD_DISP0_DAT1),
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IMX_PINCTRL_PIN(MX53_PAD_DISP0_DAT2),
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IMX_PINCTRL_PIN(MX53_PAD_DISP0_DAT3),
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IMX_PINCTRL_PIN(MX53_PAD_DISP0_DAT4),
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IMX_PINCTRL_PIN(MX53_PAD_DISP0_DAT5),
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|
IMX_PINCTRL_PIN(MX53_PAD_DISP0_DAT6),
|
|
|
|
|
IMX_PINCTRL_PIN(MX53_PAD_DISP0_DAT7),
|
|
|
|
|
IMX_PINCTRL_PIN(MX53_PAD_DISP0_DAT8),
|
|
|
|
|
IMX_PINCTRL_PIN(MX53_PAD_DISP0_DAT9),
|
|
|
|
|
IMX_PINCTRL_PIN(MX53_PAD_DISP0_DAT10),
|
|
|
|
|
IMX_PINCTRL_PIN(MX53_PAD_DISP0_DAT11),
|
|
|
|
|
IMX_PINCTRL_PIN(MX53_PAD_DISP0_DAT12),
|
|
|
|
|
IMX_PINCTRL_PIN(MX53_PAD_DISP0_DAT13),
|
|
|
|
|
IMX_PINCTRL_PIN(MX53_PAD_DISP0_DAT14),
|
|
|
|
|
IMX_PINCTRL_PIN(MX53_PAD_DISP0_DAT15),
|
|
|
|
|
IMX_PINCTRL_PIN(MX53_PAD_DISP0_DAT16),
|
|
|
|
|
IMX_PINCTRL_PIN(MX53_PAD_DISP0_DAT17),
|
|
|
|
|
IMX_PINCTRL_PIN(MX53_PAD_DISP0_DAT18),
|
|
|
|
|
IMX_PINCTRL_PIN(MX53_PAD_DISP0_DAT19),
|
|
|
|
|
IMX_PINCTRL_PIN(MX53_PAD_DISP0_DAT20),
|
|
|
|
|
IMX_PINCTRL_PIN(MX53_PAD_DISP0_DAT21),
|
|
|
|
|
IMX_PINCTRL_PIN(MX53_PAD_DISP0_DAT22),
|
|
|
|
|
IMX_PINCTRL_PIN(MX53_PAD_DISP0_DAT23),
|
|
|
|
|
IMX_PINCTRL_PIN(MX53_PAD_CSI0_PIXCLK),
|
|
|
|
|
IMX_PINCTRL_PIN(MX53_PAD_CSI0_MCLK),
|
|
|
|
|
IMX_PINCTRL_PIN(MX53_PAD_CSI0_DATA_EN),
|
|
|
|
|
IMX_PINCTRL_PIN(MX53_PAD_CSI0_VSYNC),
|
|
|
|
|
IMX_PINCTRL_PIN(MX53_PAD_CSI0_DAT4),
|
|
|
|
|
IMX_PINCTRL_PIN(MX53_PAD_CSI0_DAT5),
|
|
|
|
|
IMX_PINCTRL_PIN(MX53_PAD_CSI0_DAT6),
|
|
|
|
|
IMX_PINCTRL_PIN(MX53_PAD_CSI0_DAT7),
|
|
|
|
|
IMX_PINCTRL_PIN(MX53_PAD_CSI0_DAT8),
|
|
|
|
|
IMX_PINCTRL_PIN(MX53_PAD_CSI0_DAT9),
|
|
|
|
|
IMX_PINCTRL_PIN(MX53_PAD_CSI0_DAT10),
|
|
|
|
|
IMX_PINCTRL_PIN(MX53_PAD_CSI0_DAT11),
|
|
|
|
|
IMX_PINCTRL_PIN(MX53_PAD_CSI0_DAT12),
|
|
|
|
|
IMX_PINCTRL_PIN(MX53_PAD_CSI0_DAT13),
|
|
|
|
|
IMX_PINCTRL_PIN(MX53_PAD_CSI0_DAT14),
|
|
|
|
|
IMX_PINCTRL_PIN(MX53_PAD_CSI0_DAT15),
|
|
|
|
|
IMX_PINCTRL_PIN(MX53_PAD_CSI0_DAT16),
|
|
|
|
|
IMX_PINCTRL_PIN(MX53_PAD_CSI0_DAT17),
|
|
|
|
|
IMX_PINCTRL_PIN(MX53_PAD_CSI0_DAT18),
|
|
|
|
|
IMX_PINCTRL_PIN(MX53_PAD_CSI0_DAT19),
|
|
|
|
|
IMX_PINCTRL_PIN(MX53_PAD_EIM_A25),
|
|
|
|
|
IMX_PINCTRL_PIN(MX53_PAD_EIM_EB2),
|
|
|
|
|
IMX_PINCTRL_PIN(MX53_PAD_EIM_D16),
|
|
|
|
|
IMX_PINCTRL_PIN(MX53_PAD_EIM_D17),
|
|
|
|
|
IMX_PINCTRL_PIN(MX53_PAD_EIM_D18),
|
|
|
|
|
IMX_PINCTRL_PIN(MX53_PAD_EIM_D19),
|
|
|
|
|
IMX_PINCTRL_PIN(MX53_PAD_EIM_D20),
|
|
|
|
|
IMX_PINCTRL_PIN(MX53_PAD_EIM_D21),
|
|
|
|
|
IMX_PINCTRL_PIN(MX53_PAD_EIM_D22),
|
|
|
|
|
IMX_PINCTRL_PIN(MX53_PAD_EIM_D23),
|
|
|
|
|
IMX_PINCTRL_PIN(MX53_PAD_EIM_EB3),
|
|
|
|
|
IMX_PINCTRL_PIN(MX53_PAD_EIM_D24),
|
|
|
|
|
IMX_PINCTRL_PIN(MX53_PAD_EIM_D25),
|
|
|
|
|
IMX_PINCTRL_PIN(MX53_PAD_EIM_D26),
|
|
|
|
|
IMX_PINCTRL_PIN(MX53_PAD_EIM_D27),
|
|
|
|
|
IMX_PINCTRL_PIN(MX53_PAD_EIM_D28),
|
|
|
|
|
IMX_PINCTRL_PIN(MX53_PAD_EIM_D29),
|
|
|
|
|
IMX_PINCTRL_PIN(MX53_PAD_EIM_D30),
|
|
|
|
|
IMX_PINCTRL_PIN(MX53_PAD_EIM_D31),
|
|
|
|
|
IMX_PINCTRL_PIN(MX53_PAD_EIM_A24),
|
|
|
|
|
IMX_PINCTRL_PIN(MX53_PAD_EIM_A23),
|
|
|
|
|
IMX_PINCTRL_PIN(MX53_PAD_EIM_A22),
|
|
|
|
|
IMX_PINCTRL_PIN(MX53_PAD_EIM_A21),
|
|
|
|
|
IMX_PINCTRL_PIN(MX53_PAD_EIM_A20),
|
|
|
|
|
IMX_PINCTRL_PIN(MX53_PAD_EIM_A19),
|
|
|
|
|
IMX_PINCTRL_PIN(MX53_PAD_EIM_A18),
|
|
|
|
|
IMX_PINCTRL_PIN(MX53_PAD_EIM_A17),
|
|
|
|
|
IMX_PINCTRL_PIN(MX53_PAD_EIM_A16),
|
|
|
|
|
IMX_PINCTRL_PIN(MX53_PAD_EIM_CS0),
|
|
|
|
|
IMX_PINCTRL_PIN(MX53_PAD_EIM_CS1),
|
|
|
|
|
IMX_PINCTRL_PIN(MX53_PAD_EIM_OE),
|
|
|
|
|
IMX_PINCTRL_PIN(MX53_PAD_EIM_RW),
|
|
|
|
|
IMX_PINCTRL_PIN(MX53_PAD_EIM_LBA),
|
|
|
|
|
IMX_PINCTRL_PIN(MX53_PAD_EIM_EB0),
|
|
|
|
|
IMX_PINCTRL_PIN(MX53_PAD_EIM_EB1),
|
|
|
|
|
IMX_PINCTRL_PIN(MX53_PAD_EIM_DA0),
|
|
|
|
|
IMX_PINCTRL_PIN(MX53_PAD_EIM_DA1),
|
|
|
|
|
IMX_PINCTRL_PIN(MX53_PAD_EIM_DA2),
|
|
|
|
|
IMX_PINCTRL_PIN(MX53_PAD_EIM_DA3),
|
|
|
|
|
IMX_PINCTRL_PIN(MX53_PAD_EIM_DA4),
|
|
|
|
|
IMX_PINCTRL_PIN(MX53_PAD_EIM_DA5),
|
|
|
|
|
IMX_PINCTRL_PIN(MX53_PAD_EIM_DA6),
|
|
|
|
|
IMX_PINCTRL_PIN(MX53_PAD_EIM_DA7),
|
|
|
|
|
IMX_PINCTRL_PIN(MX53_PAD_EIM_DA8),
|
|
|
|
|
IMX_PINCTRL_PIN(MX53_PAD_EIM_DA9),
|
|
|
|
|
IMX_PINCTRL_PIN(MX53_PAD_EIM_DA10),
|
|
|
|
|
IMX_PINCTRL_PIN(MX53_PAD_EIM_DA11),
|
|
|
|
|
IMX_PINCTRL_PIN(MX53_PAD_EIM_DA12),
|
|
|
|
|
IMX_PINCTRL_PIN(MX53_PAD_EIM_DA13),
|
|
|
|
|
IMX_PINCTRL_PIN(MX53_PAD_EIM_DA14),
|
|
|
|
|
IMX_PINCTRL_PIN(MX53_PAD_EIM_DA15),
|
|
|
|
|
IMX_PINCTRL_PIN(MX53_PAD_NANDF_WE_B),
|
|
|
|
|
IMX_PINCTRL_PIN(MX53_PAD_NANDF_RE_B),
|
|
|
|
|
IMX_PINCTRL_PIN(MX53_PAD_EIM_WAIT),
|
2013-02-20 10:32:52 +08:00
|
|
|
IMX_PINCTRL_PIN(MX53_PAD_RESERVE8),
|
2012-05-15 15:49:02 +08:00
|
|
|
IMX_PINCTRL_PIN(MX53_PAD_LVDS1_TX3_P),
|
|
|
|
|
IMX_PINCTRL_PIN(MX53_PAD_LVDS1_TX2_P),
|
|
|
|
|
IMX_PINCTRL_PIN(MX53_PAD_LVDS1_CLK_P),
|
|
|
|
|
IMX_PINCTRL_PIN(MX53_PAD_LVDS1_TX1_P),
|
|
|
|
|
IMX_PINCTRL_PIN(MX53_PAD_LVDS1_TX0_P),
|
|
|
|
|
IMX_PINCTRL_PIN(MX53_PAD_LVDS0_TX3_P),
|
|
|
|
|
IMX_PINCTRL_PIN(MX53_PAD_LVDS0_CLK_P),
|
|
|
|
|
IMX_PINCTRL_PIN(MX53_PAD_LVDS0_TX2_P),
|
|
|
|
|
IMX_PINCTRL_PIN(MX53_PAD_LVDS0_TX1_P),
|
|
|
|
|
IMX_PINCTRL_PIN(MX53_PAD_LVDS0_TX0_P),
|
|
|
|
|
IMX_PINCTRL_PIN(MX53_PAD_GPIO_10),
|
|
|
|
|
IMX_PINCTRL_PIN(MX53_PAD_GPIO_11),
|
|
|
|
|
IMX_PINCTRL_PIN(MX53_PAD_GPIO_12),
|
|
|
|
|
IMX_PINCTRL_PIN(MX53_PAD_GPIO_13),
|
|
|
|
|
IMX_PINCTRL_PIN(MX53_PAD_GPIO_14),
|
|
|
|
|
IMX_PINCTRL_PIN(MX53_PAD_NANDF_CLE),
|
|
|
|
|
IMX_PINCTRL_PIN(MX53_PAD_NANDF_ALE),
|
|
|
|
|
IMX_PINCTRL_PIN(MX53_PAD_NANDF_WP_B),
|
|
|
|
|
IMX_PINCTRL_PIN(MX53_PAD_NANDF_RB0),
|
|
|
|
|
IMX_PINCTRL_PIN(MX53_PAD_NANDF_CS0),
|
|
|
|
|
IMX_PINCTRL_PIN(MX53_PAD_NANDF_CS1),
|
|
|
|
|
IMX_PINCTRL_PIN(MX53_PAD_NANDF_CS2),
|
|
|
|
|
IMX_PINCTRL_PIN(MX53_PAD_NANDF_CS3),
|
|
|
|
|
IMX_PINCTRL_PIN(MX53_PAD_FEC_MDIO),
|
|
|
|
|
IMX_PINCTRL_PIN(MX53_PAD_FEC_REF_CLK),
|
|
|
|
|
IMX_PINCTRL_PIN(MX53_PAD_FEC_RX_ER),
|
|
|
|
|
IMX_PINCTRL_PIN(MX53_PAD_FEC_CRS_DV),
|
|
|
|
|
IMX_PINCTRL_PIN(MX53_PAD_FEC_RXD1),
|
|
|
|
|
IMX_PINCTRL_PIN(MX53_PAD_FEC_RXD0),
|
|
|
|
|
IMX_PINCTRL_PIN(MX53_PAD_FEC_TX_EN),
|
|
|
|
|
IMX_PINCTRL_PIN(MX53_PAD_FEC_TXD1),
|
|
|
|
|
IMX_PINCTRL_PIN(MX53_PAD_FEC_TXD0),
|
|
|
|
|
IMX_PINCTRL_PIN(MX53_PAD_FEC_MDC),
|
|
|
|
|
IMX_PINCTRL_PIN(MX53_PAD_PATA_DIOW),
|
|
|
|
|
IMX_PINCTRL_PIN(MX53_PAD_PATA_DMACK),
|
|
|
|
|
IMX_PINCTRL_PIN(MX53_PAD_PATA_DMARQ),
|
|
|
|
|
IMX_PINCTRL_PIN(MX53_PAD_PATA_BUFFER_EN),
|
|
|
|
|
IMX_PINCTRL_PIN(MX53_PAD_PATA_INTRQ),
|
|
|
|
|
IMX_PINCTRL_PIN(MX53_PAD_PATA_DIOR),
|
|
|
|
|
IMX_PINCTRL_PIN(MX53_PAD_PATA_RESET_B),
|
|
|
|
|
IMX_PINCTRL_PIN(MX53_PAD_PATA_IORDY),
|
|
|
|
|
IMX_PINCTRL_PIN(MX53_PAD_PATA_DA_0),
|
|
|
|
|
IMX_PINCTRL_PIN(MX53_PAD_PATA_DA_1),
|
|
|
|
|
IMX_PINCTRL_PIN(MX53_PAD_PATA_DA_2),
|
|
|
|
|
IMX_PINCTRL_PIN(MX53_PAD_PATA_CS_0),
|
|
|
|
|
IMX_PINCTRL_PIN(MX53_PAD_PATA_CS_1),
|
|
|
|
|
IMX_PINCTRL_PIN(MX53_PAD_PATA_DATA0),
|
|
|
|
|
IMX_PINCTRL_PIN(MX53_PAD_PATA_DATA1),
|
|
|
|
|
IMX_PINCTRL_PIN(MX53_PAD_PATA_DATA2),
|
|
|
|
|
IMX_PINCTRL_PIN(MX53_PAD_PATA_DATA3),
|
|
|
|
|
IMX_PINCTRL_PIN(MX53_PAD_PATA_DATA4),
|
|
|
|
|
IMX_PINCTRL_PIN(MX53_PAD_PATA_DATA5),
|
|
|
|
|
IMX_PINCTRL_PIN(MX53_PAD_PATA_DATA6),
|
|
|
|
|
IMX_PINCTRL_PIN(MX53_PAD_PATA_DATA7),
|
|
|
|
|
IMX_PINCTRL_PIN(MX53_PAD_PATA_DATA8),
|
|
|
|
|
IMX_PINCTRL_PIN(MX53_PAD_PATA_DATA9),
|
|
|
|
|
IMX_PINCTRL_PIN(MX53_PAD_PATA_DATA10),
|
|
|
|
|
IMX_PINCTRL_PIN(MX53_PAD_PATA_DATA11),
|
|
|
|
|
IMX_PINCTRL_PIN(MX53_PAD_PATA_DATA12),
|
|
|
|
|
IMX_PINCTRL_PIN(MX53_PAD_PATA_DATA13),
|
|
|
|
|
IMX_PINCTRL_PIN(MX53_PAD_PATA_DATA14),
|
|
|
|
|
IMX_PINCTRL_PIN(MX53_PAD_PATA_DATA15),
|
|
|
|
|
IMX_PINCTRL_PIN(MX53_PAD_SD1_DATA0),
|
|
|
|
|
IMX_PINCTRL_PIN(MX53_PAD_SD1_DATA1),
|
|
|
|
|
IMX_PINCTRL_PIN(MX53_PAD_SD1_CMD),
|
|
|
|
|
IMX_PINCTRL_PIN(MX53_PAD_SD1_DATA2),
|
|
|
|
|
IMX_PINCTRL_PIN(MX53_PAD_SD1_CLK),
|
|
|
|
|
IMX_PINCTRL_PIN(MX53_PAD_SD1_DATA3),
|
|
|
|
|
IMX_PINCTRL_PIN(MX53_PAD_SD2_CLK),
|
|
|
|
|
IMX_PINCTRL_PIN(MX53_PAD_SD2_CMD),
|
|
|
|
|
IMX_PINCTRL_PIN(MX53_PAD_SD2_DATA3),
|
|
|
|
|
IMX_PINCTRL_PIN(MX53_PAD_SD2_DATA2),
|
|
|
|
|
IMX_PINCTRL_PIN(MX53_PAD_SD2_DATA1),
|
|
|
|
|
IMX_PINCTRL_PIN(MX53_PAD_SD2_DATA0),
|
|
|
|
|
IMX_PINCTRL_PIN(MX53_PAD_GPIO_0),
|
|
|
|
|
IMX_PINCTRL_PIN(MX53_PAD_GPIO_1),
|
|
|
|
|
IMX_PINCTRL_PIN(MX53_PAD_GPIO_9),
|
|
|
|
|
IMX_PINCTRL_PIN(MX53_PAD_GPIO_3),
|
|
|
|
|
IMX_PINCTRL_PIN(MX53_PAD_GPIO_6),
|
|
|
|
|
IMX_PINCTRL_PIN(MX53_PAD_GPIO_2),
|
|
|
|
|
IMX_PINCTRL_PIN(MX53_PAD_GPIO_4),
|
|
|
|
|
IMX_PINCTRL_PIN(MX53_PAD_GPIO_5),
|
|
|
|
|
IMX_PINCTRL_PIN(MX53_PAD_GPIO_7),
|
|
|
|
|
IMX_PINCTRL_PIN(MX53_PAD_GPIO_8),
|
|
|
|
|
IMX_PINCTRL_PIN(MX53_PAD_GPIO_16),
|
|
|
|
|
IMX_PINCTRL_PIN(MX53_PAD_GPIO_17),
|
|
|
|
|
IMX_PINCTRL_PIN(MX53_PAD_GPIO_18),
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
static struct imx_pinctrl_soc_info imx53_pinctrl_info = {
|
|
|
|
|
.pins = imx53_pinctrl_pads,
|
|
|
|
|
.npins = ARRAY_SIZE(imx53_pinctrl_pads),
|
|
|
|
|
};
|
|
|
|
|
|
2012-11-20 02:24:27 +08:00
|
|
|
static struct of_device_id imx53_pinctrl_of_match[] = {
|
2012-05-15 15:49:02 +08:00
|
|
|
{ .compatible = "fsl,imx53-iomuxc", },
|
|
|
|
|
{ /* sentinel */ }
|
|
|
|
|
};
|
|
|
|
|
|
2012-12-22 05:10:23 +08:00
|
|
|
static int imx53_pinctrl_probe(struct platform_device *pdev)
|
2012-05-15 15:49:02 +08:00
|
|
|
{
|
|
|
|
|
return imx_pinctrl_probe(pdev, &imx53_pinctrl_info);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static struct platform_driver imx53_pinctrl_driver = {
|
|
|
|
|
.driver = {
|
|
|
|
|
.name = "imx53-pinctrl",
|
|
|
|
|
.owner = THIS_MODULE,
|
2013-09-28 20:08:48 +08:00
|
|
|
.of_match_table = imx53_pinctrl_of_match,
|
2012-05-15 15:49:02 +08:00
|
|
|
},
|
|
|
|
|
.probe = imx53_pinctrl_probe,
|
2012-11-20 02:21:27 +08:00
|
|
|
.remove = imx_pinctrl_remove,
|
2012-05-15 15:49:02 +08:00
|
|
|
};
|
|
|
|
|
|
|
|
|
|
static int __init imx53_pinctrl_init(void)
|
|
|
|
|
{
|
|
|
|
|
return platform_driver_register(&imx53_pinctrl_driver);
|
|
|
|
|
}
|
|
|
|
|
arch_initcall(imx53_pinctrl_init);
|
|
|
|
|
|
|
|
|
|
static void __exit imx53_pinctrl_exit(void)
|
|
|
|
|
{
|
|
|
|
|
platform_driver_unregister(&imx53_pinctrl_driver);
|
|
|
|
|
}
|
|
|
|
|
module_exit(imx53_pinctrl_exit);
|
|
|
|
|
MODULE_AUTHOR("Dong Aisheng <dong.aisheng@linaro.org>");
|
|
|
|
|
MODULE_DESCRIPTION("Freescale IMX53 pinctrl driver");
|
|
|
|
|
MODULE_LICENSE("GPL v2");
|
