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media: adv7511: fix incorrect clear of CEC receive interrupt 

If a CEC message was received and the RX interrupt was set, but
not yet processed, and a new transmit was issues, then the
transmit code would inadvertently clear the RX interrupt and
after that no new messages would ever be received.

Instead it should only clear TX interrupts since register 0x97
is a clear-on-write register.

Signed-off-by: Hans Verkuil <hans.verkuil@cisco.com>
Signed-off-by: Mauro Carvalho Chehab <mchehab+samsung@kernel.org>
This commit is contained in:
Hans Verkuil 2018-05-22 07:33:14 -04:00 committed by Mauro Carvalho Chehab
parent 7367815849
commit 00f6f92dbb
1 changed files with 2 additions and 2 deletions
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4
drivers/media/i2c/adv7511.c
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@ -831,8 +831,8 @@ static int adv7511_cec_adap_transmit(struct cec_adapter *adap, u8 attempts,
*/
adv7511_cec_write_and_or(sd, 0x12, ~0x70, max(1, attempts - 1) << 4);
/* blocking, clear cec tx irq status */
adv7511_wr_and_or(sd, 0x97, 0xc7, 0x38);
/* clear cec tx irq status */
adv7511_wr(sd, 0x97, 0x38);
/* write data */
for (i = 0; i < len; i++)