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IB/mlx5: Fix MR cache initialization 

Schedule MR cache work only after bucket was initialized.

Cc: <stable@vger.kernel.org> # 4.10
Fixes: 49780d42df ("IB/mlx5: Expose MR cache for mlx5_ib")
Signed-off-by: Artemy Kovalyov <artemyko@mellanox.com>
Reviewed-by: Majd Dibbiny <majd@mellanox.com>
Signed-off-by: Leon Romanovsky <leonro@mellanox.com>
Signed-off-by: Jason Gunthorpe <jgg@mellanox.com>
This commit is contained in:
Artemy Kovalyov 2018-10-15 14:13:35 +03:00 committed by Jason Gunthorpe
parent e54b6a3bcd
commit 013c2403bf
1 changed files with 1 additions and 1 deletions
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2
drivers/infiniband/hw/mlx5/mr.c
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@ -691,7 +691,6 @@ int mlx5_mr_cache_init(struct mlx5_ib_dev *dev)
init_completion(&ent->compl); init_completion(&ent->compl);
INIT_WORK(&ent->work, cache_work_func); INIT_WORK(&ent->work, cache_work_func);
INIT_DELAYED_WORK(&ent->dwork, delayed_cache_work_func); INIT_DELAYED_WORK(&ent->dwork, delayed_cache_work_func);
queue_work(cache->wq, &ent->work);
if (i > MR_CACHE_LAST_STD_ENTRY) { if (i > MR_CACHE_LAST_STD_ENTRY) {
mlx5_odp_init_mr_cache_entry(ent); mlx5_odp_init_mr_cache_entry(ent);
@ -711,6 +710,7 @@ int mlx5_mr_cache_init(struct mlx5_ib_dev *dev)
ent->limit = dev->mdev->profile->mr_cache[i].limit; ent->limit = dev->mdev->profile->mr_cache[i].limit;
else else
ent->limit = 0; ent->limit = 0;
queue_work(cache->wq, &ent->work);
} }
err = mlx5_mr_cache_debugfs_init(dev); err = mlx5_mr_cache_debugfs_init(dev);