Linux 5.4-rc5

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Merge tag 'v5.4-rc5' into rdma.git for-next

Linux 5.4-rc5

For dependencies in the next patches

Conflict resolved by keeping the delete of the unlock.

Signed-off-by: Jason Gunthorpe <jgg@mellanox.com>
This commit is contained in:
Jason Gunthorpe 2019-10-28 16:36:29 -03:00
commit 036313316d
939 changed files with 8796 additions and 7839 deletions

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@ -196,7 +196,8 @@ Oleksij Rempel <linux@rempel-privat.de> <o.rempel@pengutronix.de>
Oleksij Rempel <linux@rempel-privat.de> <ore@pengutronix.de> Oleksij Rempel <linux@rempel-privat.de> <ore@pengutronix.de>
Paolo 'Blaisorblade' Giarrusso <blaisorblade@yahoo.it> Paolo 'Blaisorblade' Giarrusso <blaisorblade@yahoo.it>
Patrick Mochel <mochel@digitalimplant.org> Patrick Mochel <mochel@digitalimplant.org>
Paul Burton <paul.burton@mips.com> <paul.burton@imgtec.com> Paul Burton <paulburton@kernel.org> <paul.burton@imgtec.com>
Paul Burton <paulburton@kernel.org> <paul.burton@mips.com>
Peter A Jonsson <pj@ludd.ltu.se> Peter A Jonsson <pj@ludd.ltu.se>
Peter Oruba <peter@oruba.de> Peter Oruba <peter@oruba.de>
Peter Oruba <peter.oruba@amd.com> Peter Oruba <peter.oruba@amd.com>
@ -229,6 +230,7 @@ Shuah Khan <shuah@kernel.org> <shuahkhan@gmail.com>
Shuah Khan <shuah@kernel.org> <shuah.khan@hp.com> Shuah Khan <shuah@kernel.org> <shuah.khan@hp.com>
Shuah Khan <shuah@kernel.org> <shuahkh@osg.samsung.com> Shuah Khan <shuah@kernel.org> <shuahkh@osg.samsung.com>
Shuah Khan <shuah@kernel.org> <shuah.kh@samsung.com> Shuah Khan <shuah@kernel.org> <shuah.kh@samsung.com>
Simon Arlott <simon@octiron.net> <simon@fire.lp0.eu>
Simon Kelley <simon@thekelleys.org.uk> Simon Kelley <simon@thekelleys.org.uk>
Stéphane Witzmann <stephane.witzmann@ubpmes.univ-bpclermont.fr> Stéphane Witzmann <stephane.witzmann@ubpmes.univ-bpclermont.fr>
Stephen Hemminger <shemminger@osdl.org> Stephen Hemminger <shemminger@osdl.org>

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@ -1637,6 +1637,10 @@ S: Panoramastrasse 18
S: D-69126 Heidelberg S: D-69126 Heidelberg
S: Germany S: Germany
N: Simon Horman
M: horms@verge.net.au
D: Renesas ARM/ARM64 SoC maintainer
N: Christopher Horn N: Christopher Horn
E: chorn@warwick.net E: chorn@warwick.net
D: Miscellaneous sysctl hacks D: Miscellaneous sysctl hacks

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@ -615,8 +615,8 @@ on an IO device and is an example of this type.
Protections Protections
----------- -----------
A cgroup is protected to be allocated upto the configured amount of A cgroup is protected upto the configured amount of the resource
the resource if the usages of all its ancestors are under their as long as the usages of all its ancestors are under their
protected levels. Protections can be hard guarantees or best effort protected levels. Protections can be hard guarantees or best effort
soft boundaries. Protections can also be over-committed in which case soft boundaries. Protections can also be over-committed in which case
only upto the amount available to the parent is protected among only upto the amount available to the parent is protected among
@ -1096,7 +1096,10 @@ PAGE_SIZE multiple when read back.
is within its effective min boundary, the cgroup's memory is within its effective min boundary, the cgroup's memory
won't be reclaimed under any conditions. If there is no won't be reclaimed under any conditions. If there is no
unprotected reclaimable memory available, OOM killer unprotected reclaimable memory available, OOM killer
is invoked. is invoked. Above the effective min boundary (or
effective low boundary if it is higher), pages are reclaimed
proportionally to the overage, reducing reclaim pressure for
smaller overages.
Effective min boundary is limited by memory.min values of Effective min boundary is limited by memory.min values of
all ancestor cgroups. If there is memory.min overcommitment all ancestor cgroups. If there is memory.min overcommitment
@ -1118,7 +1121,10 @@ PAGE_SIZE multiple when read back.
Best-effort memory protection. If the memory usage of a Best-effort memory protection. If the memory usage of a
cgroup is within its effective low boundary, the cgroup's cgroup is within its effective low boundary, the cgroup's
memory won't be reclaimed unless memory can be reclaimed memory won't be reclaimed unless memory can be reclaimed
from unprotected cgroups. from unprotected cgroups. Above the effective low boundary (or
effective min boundary if it is higher), pages are reclaimed
proportionally to the overage, reducing reclaim pressure for
smaller overages.
Effective low boundary is limited by memory.low values of Effective low boundary is limited by memory.low values of
all ancestor cgroups. If there is memory.low overcommitment all ancestor cgroups. If there is memory.low overcommitment
@ -2482,8 +2488,10 @@ system performance due to overreclaim, to the point where the feature
becomes self-defeating. becomes self-defeating.
The memory.low boundary on the other hand is a top-down allocated The memory.low boundary on the other hand is a top-down allocated
reserve. A cgroup enjoys reclaim protection when it's within its low, reserve. A cgroup enjoys reclaim protection when it's within its
which makes delegation of subtrees possible. effective low, which makes delegation of subtrees possible. It also
enjoys having reclaim pressure proportional to its overage when
above its effective low.
The original high boundary, the hard limit, is defined as a strict The original high boundary, the hard limit, is defined as a strict
limit that can not budge, even if the OOM killer has to be called. limit that can not budge, even if the OOM killer has to be called.

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@ -5302,6 +5302,10 @@
the unplug protocol the unplug protocol
never -- do not unplug even if version check succeeds never -- do not unplug even if version check succeeds
xen_legacy_crash [X86,XEN]
Crash from Xen panic notifier, without executing late
panic() code such as dumping handler.
xen_nopvspin [X86,XEN] xen_nopvspin [X86,XEN]
Disables the ticketlock slowpath using Xen PV Disables the ticketlock slowpath using Xen PV
optimizations. optimizations.

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@ -154,11 +154,18 @@ return virtual addresses to userspace from a 48-bit range.
Software can "opt-in" to receiving VAs from a 52-bit space by Software can "opt-in" to receiving VAs from a 52-bit space by
specifying an mmap hint parameter that is larger than 48-bit. specifying an mmap hint parameter that is larger than 48-bit.
For example: For example:
.. code-block:: c
maybe_high_address = mmap(~0UL, size, prot, flags,...); maybe_high_address = mmap(~0UL, size, prot, flags,...);
It is also possible to build a debug kernel that returns addresses It is also possible to build a debug kernel that returns addresses
from a 52-bit space by enabling the following kernel config options: from a 52-bit space by enabling the following kernel config options:
.. code-block:: sh
CONFIG_EXPERT=y && CONFIG_ARM64_FORCE_52BIT=y CONFIG_EXPERT=y && CONFIG_ARM64_FORCE_52BIT=y
Note that this option is only intended for debugging applications Note that this option is only intended for debugging applications

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@ -107,6 +107,8 @@ stable kernels.
+----------------+-----------------+-----------------+-----------------------------+ +----------------+-----------------+-----------------+-----------------------------+
| Cavium | ThunderX2 SMMUv3| #126 | N/A | | Cavium | ThunderX2 SMMUv3| #126 | N/A |
+----------------+-----------------+-----------------+-----------------------------+ +----------------+-----------------+-----------------+-----------------------------+
| Cavium | ThunderX2 Core | #219 | CAVIUM_TX2_ERRATUM_219 |
+----------------+-----------------+-----------------+-----------------------------+
+----------------+-----------------+-----------------+-----------------------------+ +----------------+-----------------+-----------------+-----------------------------+
| Freescale/NXP | LS2080A/LS1043A | A-008585 | FSL_ERRATUM_A008585 | | Freescale/NXP | LS2080A/LS1043A | A-008585 | FSL_ERRATUM_A008585 |
+----------------+-----------------+-----------------+-----------------------------+ +----------------+-----------------+-----------------+-----------------------------+

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@ -38,6 +38,7 @@ Core utilities
protection-keys protection-keys
../RCU/index ../RCU/index
gcc-plugins gcc-plugins
symbol-namespaces
Interfaces for kernel debugging Interfaces for kernel debugging

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@ -98,6 +98,10 @@ limited. The actual limit depends on the hardware and the kernel
configuration, but it is a good practice to use `kmalloc` for objects configuration, but it is a good practice to use `kmalloc` for objects
smaller than page size. smaller than page size.
The address of a chunk allocated with `kmalloc` is aligned to at least
ARCH_KMALLOC_MINALIGN bytes. For sizes which are a power of two, the
alignment is also guaranteed to be at least the respective size.
For large allocations you can use :c:func:`vmalloc` and For large allocations you can use :c:func:`vmalloc` and
:c:func:`vzalloc`, or directly request pages from the page :c:func:`vzalloc`, or directly request pages from the page
allocator. The memory allocated by `vmalloc` and related functions is allocator. The memory allocated by `vmalloc` and related functions is

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@ -41,6 +41,9 @@ smaller binary while the latter is 1.1 - 2 times faster.
Both KASAN modes work with both SLUB and SLAB memory allocators. Both KASAN modes work with both SLUB and SLAB memory allocators.
For better bug detection and nicer reporting, enable CONFIG_STACKTRACE. For better bug detection and nicer reporting, enable CONFIG_STACKTRACE.
To augment reports with last allocation and freeing stack of the physical page,
it is recommended to enable also CONFIG_PAGE_OWNER and boot with page_owner=on.
To disable instrumentation for specific files or directories, add a line To disable instrumentation for specific files or directories, add a line
similar to the following to the respective kernel Makefile: similar to the following to the respective kernel Makefile:

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@ -89,6 +89,22 @@ To build, save output files in a separate directory with KBUILD_OUTPUT ::
$ export KBUILD_OUTPUT=/tmp/kselftest; make TARGETS="size timers" kselftest $ export KBUILD_OUTPUT=/tmp/kselftest; make TARGETS="size timers" kselftest
Additionally you can use the "SKIP_TARGETS" variable on the make command
line to specify one or more targets to exclude from the TARGETS list.
To run all tests but a single subsystem::
$ make -C tools/testing/selftests SKIP_TARGETS=ptrace run_tests
You can specify multiple tests to skip::
$ make SKIP_TARGETS="size timers" kselftest
You can also specify a restricted list of tests to run together with a
dedicated skiplist::
$ make TARGETS="bpf breakpoints size timers" SKIP_TARGETS=bpf kselftest
See the top-level tools/testing/selftests/Makefile for the list of all See the top-level tools/testing/selftests/Makefile for the list of all
possible targets. possible targets.

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@ -496,12 +496,12 @@ properties:
- description: Theobroma Systems RK3368-uQ7 with Haikou baseboard - description: Theobroma Systems RK3368-uQ7 with Haikou baseboard
items: items:
- const: tsd,rk3368-uq7-haikou - const: tsd,rk3368-lion-haikou
- const: rockchip,rk3368 - const: rockchip,rk3368
- description: Theobroma Systems RK3399-Q7 with Haikou baseboard - description: Theobroma Systems RK3399-Q7 with Haikou baseboard
items: items:
- const: tsd,rk3399-q7-haikou - const: tsd,rk3399-puma-haikou
- const: rockchip,rk3399 - const: rockchip,rk3399
- description: Tronsmart Orion R68 Meta - description: Tronsmart Orion R68 Meta

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@ -1,8 +1,11 @@
* Advanced Interrupt Controller (AIC) * Advanced Interrupt Controller (AIC)
Required properties: Required properties:
- compatible: Should be "atmel,<chip>-aic" - compatible: Should be:
<chip> can be "at91rm9200", "sama5d2", "sama5d3" or "sama5d4" - "atmel,<chip>-aic" where <chip> can be "at91rm9200", "sama5d2",
"sama5d3" or "sama5d4"
- "microchip,<chip>-aic" where <chip> can be "sam9x60"
- interrupt-controller: Identifies the node as an interrupt controller. - interrupt-controller: Identifies the node as an interrupt controller.
- #interrupt-cells: The number of cells to define the interrupts. It should be 3. - #interrupt-cells: The number of cells to define the interrupts. It should be 3.
The first cell is the IRQ number (aka "Peripheral IDentifier" on datasheet). The first cell is the IRQ number (aka "Peripheral IDentifier" on datasheet).

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@ -1,7 +1,7 @@
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
%YAML 1.2 %YAML 1.2
--- ---
$id: http://devicetree.org/schemas/arm/allwinner,sun4i-a10-csi.yaml# $id: http://devicetree.org/schemas/media/allwinner,sun4i-a10-csi.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml#
title: Allwinner A10 CMOS Sensor Interface (CSI) Device Tree Bindings title: Allwinner A10 CMOS Sensor Interface (CSI) Device Tree Bindings
@ -27,14 +27,12 @@ properties:
clocks: clocks:
items: items:
- description: The CSI interface clock - description: The CSI interface clock
- description: The CSI module clock
- description: The CSI ISP clock - description: The CSI ISP clock
- description: The CSI DRAM clock - description: The CSI DRAM clock
clock-names: clock-names:
items: items:
- const: bus - const: bus
- const: mod
- const: isp - const: isp
- const: ram - const: ram
@ -89,9 +87,8 @@ examples:
compatible = "allwinner,sun7i-a20-csi0"; compatible = "allwinner,sun7i-a20-csi0";
reg = <0x01c09000 0x1000>; reg = <0x01c09000 0x1000>;
interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&ccu CLK_AHB_CSI0>, <&ccu CLK_CSI0>, clocks = <&ccu CLK_AHB_CSI0>, <&ccu CLK_CSI_SCLK>, <&ccu CLK_DRAM_CSI0>;
<&ccu CLK_CSI_SCLK>, <&ccu CLK_DRAM_CSI0>; clock-names = "bus", "isp", "ram";
clock-names = "bus", "mod", "isp", "ram";
resets = <&ccu RST_CSI0>; resets = <&ccu RST_CSI0>;
port { port {

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@ -33,13 +33,13 @@ patternProperties:
allOf: allOf:
- $ref: "/schemas/types.yaml#/definitions/string" - $ref: "/schemas/types.yaml#/definitions/string"
- enum: [ ADC0, ADC1, ADC10, ADC11, ADC12, ADC13, ADC14, ADC15, - enum: [ ADC0, ADC1, ADC10, ADC11, ADC12, ADC13, ADC14, ADC15,
ADC2, ADC3, ADC4, ADC5, ADC6, ADC7, ADC8, ADC9, BMCINT, ESPI, ADC2, ADC3, ADC4, ADC5, ADC6, ADC7, ADC8, ADC9, BMCINT, EMMC,
ESPIALT, FSI1, FSI2, FWSPIABR, FWSPID, FWSPIWP, GPIT0, GPIT1, ESPI, ESPIALT, FSI1, FSI2, FWSPIABR, FWSPID, FWSPIWP, GPIT0,
GPIT2, GPIT3, GPIT4, GPIT5, GPIT6, GPIT7, GPIU0, GPIU1, GPIU2, GPIT1, GPIT2, GPIT3, GPIT4, GPIT5, GPIT6, GPIT7, GPIU0, GPIU1,
GPIU3, GPIU4, GPIU5, GPIU6, GPIU7, I2C1, I2C10, I2C11, I2C12, GPIU2, GPIU3, GPIU4, GPIU5, GPIU6, GPIU7, I2C1, I2C10, I2C11,
I2C13, I2C14, I2C15, I2C16, I2C2, I2C3, I2C4, I2C5, I2C6, I2C7, I2C12, I2C13, I2C14, I2C15, I2C16, I2C2, I2C3, I2C4, I2C5, I2C6,
I2C8, I2C9, I3C3, I3C4, I3C5, I3C6, JTAGM, LHPD, LHSIRQ, LPC, I2C7, I2C8, I2C9, I3C3, I3C4, I3C5, I3C6, JTAGM, LHPD, LHSIRQ,
LPCHC, LPCPD, LPCPME, LPCSMI, LSIRQ, MACLINK1, MACLINK2, LPC, LPCHC, LPCPD, LPCPME, LPCSMI, LSIRQ, MACLINK1, MACLINK2,
MACLINK3, MACLINK4, MDIO1, MDIO2, MDIO3, MDIO4, NCTS1, NCTS2, MACLINK3, MACLINK4, MDIO1, MDIO2, MDIO3, MDIO4, NCTS1, NCTS2,
NCTS3, NCTS4, NDCD1, NDCD2, NDCD3, NDCD4, NDSR1, NDSR2, NDSR3, NCTS3, NCTS4, NDCD1, NDCD2, NDCD3, NDCD4, NDSR1, NDSR2, NDSR3,
NDSR4, NDTR1, NDTR2, NDTR3, NDTR4, NRI1, NRI2, NRI3, NRI4, NRTS1, NDSR4, NDTR1, NDTR2, NDTR3, NDTR4, NRI1, NRI2, NRI3, NRI4, NRTS1,
@ -48,47 +48,45 @@ patternProperties:
PWM8, PWM9, RGMII1, RGMII2, RGMII3, RGMII4, RMII1, RMII2, RMII3, PWM8, PWM9, RGMII1, RGMII2, RGMII3, RGMII4, RMII1, RMII2, RMII3,
RMII4, RXD1, RXD2, RXD3, RXD4, SALT1, SALT10, SALT11, SALT12, RMII4, RXD1, RXD2, RXD3, RXD4, SALT1, SALT10, SALT11, SALT12,
SALT13, SALT14, SALT15, SALT16, SALT2, SALT3, SALT4, SALT5, SALT13, SALT14, SALT15, SALT16, SALT2, SALT3, SALT4, SALT5,
SALT6, SALT7, SALT8, SALT9, SD1, SD2, SD3, SD3DAT4, SD3DAT5, SALT6, SALT7, SALT8, SALT9, SD1, SD2, SGPM1, SGPS1, SIOONCTRL,
SD3DAT6, SD3DAT7, SGPM1, SGPS1, SIOONCTRL, SIOPBI, SIOPBO, SIOPBI, SIOPBO, SIOPWREQ, SIOPWRGD, SIOS3, SIOS5, SIOSCI, SPI1,
SIOPWREQ, SIOPWRGD, SIOS3, SIOS5, SIOSCI, SPI1, SPI1ABR, SPI1CS1, SPI1ABR, SPI1CS1, SPI1WP, SPI2, SPI2CS1, SPI2CS2, TACH0, TACH1,
SPI1WP, SPI2, SPI2CS1, SPI2CS2, TACH0, TACH1, TACH10, TACH11, TACH10, TACH11, TACH12, TACH13, TACH14, TACH15, TACH2, TACH3,
TACH12, TACH13, TACH14, TACH15, TACH2, TACH3, TACH4, TACH5, TACH4, TACH5, TACH6, TACH7, TACH8, TACH9, THRU0, THRU1, THRU2,
TACH6, TACH7, TACH8, TACH9, THRU0, THRU1, THRU2, THRU3, TXD1, THRU3, TXD1, TXD2, TXD3, TXD4, UART10, UART11, UART12, UART13,
TXD2, TXD3, TXD4, UART10, UART11, UART12, UART13, UART6, UART7, UART6, UART7, UART8, UART9, VB, VGAHS, VGAVS, WDTRST1, WDTRST2,
UART8, UART9, VB, VGAHS, VGAVS, WDTRST1, WDTRST2, WDTRST3, WDTRST3, WDTRST4, ]
WDTRST4, ]
groups: groups:
allOf: allOf:
- $ref: "/schemas/types.yaml#/definitions/string" - $ref: "/schemas/types.yaml#/definitions/string"
- enum: [ ADC0, ADC1, ADC10, ADC11, ADC12, ADC13, ADC14, ADC15, - enum: [ ADC0, ADC1, ADC10, ADC11, ADC12, ADC13, ADC14, ADC15,
ADC2, ADC3, ADC4, ADC5, ADC6, ADC7, ADC8, ADC9, BMCINT, ESPI, ADC2, ADC3, ADC4, ADC5, ADC6, ADC7, ADC8, ADC9, BMCINT, EMMCG1,
ESPIALT, FSI1, FSI2, FWSPIABR, FWSPID, FWQSPID, FWSPIWP, GPIT0, EMMCG4, EMMCG8, ESPI, ESPIALT, FSI1, FSI2, FWSPIABR, FWSPID,
GPIT1, GPIT2, GPIT3, GPIT4, GPIT5, GPIT6, GPIT7, GPIU0, GPIU1, FWQSPID, FWSPIWP, GPIT0, GPIT1, GPIT2, GPIT3, GPIT4, GPIT5,
GPIU2, GPIU3, GPIU4, GPIU5, GPIU6, GPIU7, HVI3C3, HVI3C4, I2C1, GPIT6, GPIT7, GPIU0, GPIU1, GPIU2, GPIU3, GPIU4, GPIU5, GPIU6,
I2C10, I2C11, I2C12, I2C13, I2C14, I2C15, I2C16, I2C2, I2C3, GPIU7, HVI3C3, HVI3C4, I2C1, I2C10, I2C11, I2C12, I2C13, I2C14,
I2C4, I2C5, I2C6, I2C7, I2C8, I2C9, I3C3, I3C4, I3C5, I3C6, I2C15, I2C16, I2C2, I2C3, I2C4, I2C5, I2C6, I2C7, I2C8, I2C9,
JTAGM, LHPD, LHSIRQ, LPC, LPCHC, LPCPD, LPCPME, LPCSMI, LSIRQ, I3C3, I3C4, I3C5, I3C6, JTAGM, LHPD, LHSIRQ, LPC, LPCHC, LPCPD,
MACLINK1, MACLINK2, MACLINK3, MACLINK4, MDIO1, MDIO2, MDIO3, LPCPME, LPCSMI, LSIRQ, MACLINK1, MACLINK2, MACLINK3, MACLINK4,
MDIO4, NCTS1, NCTS2, NCTS3, NCTS4, NDCD1, NDCD2, NDCD3, NDCD4, MDIO1, MDIO2, MDIO3, MDIO4, NCTS1, NCTS2, NCTS3, NCTS4, NDCD1,
NDSR1, NDSR2, NDSR3, NDSR4, NDTR1, NDTR2, NDTR3, NDTR4, NRI1, NDCD2, NDCD3, NDCD4, NDSR1, NDSR2, NDSR3, NDSR4, NDTR1, NDTR2,
NRI2, NRI3, NRI4, NRTS1, NRTS2, NRTS3, NRTS4, OSCCLK, PEWAKE, NDTR3, NDTR4, NRI1, NRI2, NRI3, NRI4, NRTS1, NRTS2, NRTS3, NRTS4,
PWM0, PWM1, PWM10G0, PWM10G1, PWM11G0, PWM11G1, PWM12G0, PWM12G1, OSCCLK, PEWAKE, PWM0, PWM1, PWM10G0, PWM10G1, PWM11G0, PWM11G1,
PWM13G0, PWM13G1, PWM14G0, PWM14G1, PWM15G0, PWM15G1, PWM2, PWM3, PWM12G0, PWM12G1, PWM13G0, PWM13G1, PWM14G0, PWM14G1, PWM15G0,
PWM4, PWM5, PWM6, PWM7, PWM8G0, PWM8G1, PWM9G0, PWM9G1, QSPI1, PWM15G1, PWM2, PWM3, PWM4, PWM5, PWM6, PWM7, PWM8G0, PWM8G1,
QSPI2, RGMII1, RGMII2, RGMII3, RGMII4, RMII1, RMII2, RMII3, PWM9G0, PWM9G1, QSPI1, QSPI2, RGMII1, RGMII2, RGMII3, RGMII4,
RMII4, RXD1, RXD2, RXD3, RXD4, SALT1, SALT10G0, SALT10G1, RMII1, RMII2, RMII3, RMII4, RXD1, RXD2, RXD3, RXD4, SALT1,
SALT11G0, SALT11G1, SALT12G0, SALT12G1, SALT13G0, SALT13G1, SALT10G0, SALT10G1, SALT11G0, SALT11G1, SALT12G0, SALT12G1,
SALT14G0, SALT14G1, SALT15G0, SALT15G1, SALT16G0, SALT16G1, SALT13G0, SALT13G1, SALT14G0, SALT14G1, SALT15G0, SALT15G1,
SALT2, SALT3, SALT4, SALT5, SALT6, SALT7, SALT8, SALT9G0, SALT16G0, SALT16G1, SALT2, SALT3, SALT4, SALT5, SALT6, SALT7,
SALT9G1, SD1, SD2, SD3, SD3DAT4, SD3DAT5, SD3DAT6, SD3DAT7, SALT8, SALT9G0, SALT9G1, SD1, SD2, SD3, SGPM1, SGPS1, SIOONCTRL,
SGPM1, SGPS1, SIOONCTRL, SIOPBI, SIOPBO, SIOPWREQ, SIOPWRGD, SIOPBI, SIOPBO, SIOPWREQ, SIOPWRGD, SIOS3, SIOS5, SIOSCI, SPI1,
SIOS3, SIOS5, SIOSCI, SPI1, SPI1ABR, SPI1CS1, SPI1WP, SPI2, SPI1ABR, SPI1CS1, SPI1WP, SPI2, SPI2CS1, SPI2CS2, TACH0, TACH1,
SPI2CS1, SPI2CS2, TACH0, TACH1, TACH10, TACH11, TACH12, TACH13, TACH10, TACH11, TACH12, TACH13, TACH14, TACH15, TACH2, TACH3,
TACH14, TACH15, TACH2, TACH3, TACH4, TACH5, TACH6, TACH7, TACH8, TACH4, TACH5, TACH6, TACH7, TACH8, TACH9, THRU0, THRU1, THRU2,
TACH9, THRU0, THRU1, THRU2, THRU3, TXD1, TXD2, TXD3, TXD4, THRU3, TXD1, TXD2, TXD3, TXD4, UART10, UART11, UART12G0,
UART10, UART11, UART12G0, UART12G1, UART13G0, UART13G1, UART6, UART12G1, UART13G0, UART13G1, UART6, UART7, UART8, UART9, VB,
UART7, UART8, UART9, VB, VGAHS, VGAVS, WDTRST1, WDTRST2, WDTRST3, VGAHS, VGAVS, WDTRST1, WDTRST2, WDTRST3, WDTRST4, ]
WDTRST4, ]
required: required:
- compatible - compatible

View File

@ -30,8 +30,8 @@ if:
properties: properties:
compatible: compatible:
enum: enum:
- const: regulator-fixed - regulator-fixed
- const: regulator-fixed-clock - regulator-fixed-clock
regulator-name: true regulator-name: true

View File

@ -24,7 +24,8 @@ description: |
properties: properties:
compatible: compatible:
items: oneOf:
- items:
- enum: - enum:
- sifive,rocket0 - sifive,rocket0
- sifive,e5 - sifive,e5
@ -33,6 +34,7 @@ properties:
- sifive,u54 - sifive,u54
- sifive,u5 - sifive,u5
- const: riscv - const: riscv
- const: riscv # Simulator only
description: description:
Identifies that the hart uses the RISC-V instruction set Identifies that the hart uses the RISC-V instruction set
and identifies the type of the hart. and identifies the type of the hart.
@ -66,12 +68,8 @@ properties:
insensitive, letters in the riscv,isa string must be all insensitive, letters in the riscv,isa string must be all
lowercase to simplify parsing. lowercase to simplify parsing.
timebase-frequency: # RISC-V requires 'timebase-frequency' in /cpus, so disallow it here
type: integer timebase-frequency: false
minimum: 1
description:
Specifies the clock frequency of the system timer in Hz.
This value is common to all harts on a single system image.
interrupt-controller: interrupt-controller:
type: object type: object
@ -93,7 +91,6 @@ properties:
required: required:
- riscv,isa - riscv,isa
- timebase-frequency
- interrupt-controller - interrupt-controller
examples: examples:

View File

@ -26,6 +26,8 @@ Required properties:
- "renesas,hscif-r8a77470" for R8A77470 (RZ/G1C) HSCIF compatible UART. - "renesas,hscif-r8a77470" for R8A77470 (RZ/G1C) HSCIF compatible UART.
- "renesas,scif-r8a774a1" for R8A774A1 (RZ/G2M) SCIF compatible UART. - "renesas,scif-r8a774a1" for R8A774A1 (RZ/G2M) SCIF compatible UART.
- "renesas,hscif-r8a774a1" for R8A774A1 (RZ/G2M) HSCIF compatible UART. - "renesas,hscif-r8a774a1" for R8A774A1 (RZ/G2M) HSCIF compatible UART.
- "renesas,scif-r8a774b1" for R8A774B1 (RZ/G2N) SCIF compatible UART.
- "renesas,hscif-r8a774b1" for R8A774B1 (RZ/G2N) HSCIF compatible UART.
- "renesas,scif-r8a774c0" for R8A774C0 (RZ/G2E) SCIF compatible UART. - "renesas,scif-r8a774c0" for R8A774C0 (RZ/G2E) SCIF compatible UART.
- "renesas,hscif-r8a774c0" for R8A774C0 (RZ/G2E) HSCIF compatible UART. - "renesas,hscif-r8a774c0" for R8A774C0 (RZ/G2E) HSCIF compatible UART.
- "renesas,scif-r8a7778" for R8A7778 (R-Car M1) SCIF compatible UART. - "renesas,scif-r8a7778" for R8A7778 (R-Car M1) SCIF compatible UART.

View File

@ -85,8 +85,8 @@ A child node must exist to represent the core DWC2 IP block. The name of
the node is not important. The content of the node is defined in dwc2.txt. the node is not important. The content of the node is defined in dwc2.txt.
PHY documentation is provided in the following places: PHY documentation is provided in the following places:
- Documentation/devicetree/bindings/phy/meson-g12a-usb2-phy.txt - Documentation/devicetree/bindings/phy/amlogic,meson-g12a-usb2-phy.yaml
- Documentation/devicetree/bindings/phy/meson-g12a-usb3-pcie-phy.txt - Documentation/devicetree/bindings/phy/amlogic,meson-g12a-usb3-pcie-phy.yaml
Example device nodes: Example device nodes:
usb: usb@ffe09000 { usb: usb@ffe09000 {

View File

@ -63,7 +63,11 @@ properties:
description: description:
Set this flag to force EHCI reset after resume. Set this flag to force EHCI reset after resume.
phys: true phys:
description: PHY specifier for the USB PHY
phy-names:
const: usb
required: required:
- compatible - compatible
@ -89,6 +93,7 @@ examples:
interrupts = <39>; interrupts = <39>;
clocks = <&ahb_gates 1>; clocks = <&ahb_gates 1>;
phys = <&usbphy 1>; phys = <&usbphy 1>;
phy-names = "usb";
}; };
... ...

View File

@ -67,7 +67,11 @@ properties:
description: description:
Overrides the detected port count Overrides the detected port count
phys: true phys:
description: PHY specifier for the USB PHY
phy-names:
const: usb
required: required:
- compatible - compatible
@ -84,6 +88,7 @@ examples:
interrupts = <64>; interrupts = <64>;
clocks = <&usb_clk 6>, <&ahb_gates 2>; clocks = <&usb_clk 6>, <&ahb_gates 2>;
phys = <&usbphy 1>; phys = <&usbphy 1>;
phy-names = "usb";
}; };
... ...

View File

@ -33,7 +33,7 @@ Required properties:
"dma_ck": dma_bus clock for data transfer by DMA, "dma_ck": dma_bus clock for data transfer by DMA,
"xhci_ck": controller clock "xhci_ck": controller clock
- phys : see usb-hcd.txt in the current directory - phys : see usb-hcd.yaml in the current directory
Optional properties: Optional properties:
- wakeup-source : enable USB remote wakeup; - wakeup-source : enable USB remote wakeup;
@ -53,7 +53,7 @@ Optional properties:
See: Documentation/devicetree/bindings/pinctrl/pinctrl-bindings.txt See: Documentation/devicetree/bindings/pinctrl/pinctrl-bindings.txt
- imod-interval-ns: default interrupt moderation interval is 5000ns - imod-interval-ns: default interrupt moderation interval is 5000ns
additionally the properties from usb-hcd.txt (in the current directory) are additionally the properties from usb-hcd.yaml (in the current directory) are
supported. supported.
Example: Example:

View File

@ -17,7 +17,7 @@ Required properties:
- clock-names : must contain "sys_ck" for clock of controller, - clock-names : must contain "sys_ck" for clock of controller,
the following clocks are optional: the following clocks are optional:
"ref_ck", "mcu_ck" and "dma_ck"; "ref_ck", "mcu_ck" and "dma_ck";
- phys : see usb-hcd.txt in the current directory - phys : see usb-hcd.yaml in the current directory
- dr_mode : should be one of "host", "peripheral" or "otg", - dr_mode : should be one of "host", "peripheral" or "otg",
refer to usb/generic.txt refer to usb/generic.txt
@ -60,7 +60,7 @@ Optional properties:
- mediatek,u3p-dis-msk : mask to disable u3ports, bit0 for u3port0, - mediatek,u3p-dis-msk : mask to disable u3ports, bit0 for u3port0,
bit1 for u3port1, ... etc; bit1 for u3port1, ... etc;
additionally the properties from usb-hcd.txt (in the current directory) are additionally the properties from usb-hcd.yaml (in the current directory) are
supported. supported.
Sub-nodes: Sub-nodes:

View File

@ -18,8 +18,13 @@ properties:
description: description:
List of all the USB PHYs on this HCD List of all the USB PHYs on this HCD
phy-names:
description:
Name specifier for the USB PHY
examples: examples:
- | - |
usb { usb {
phys = <&usb2_phy1>, <&usb3_phy1>; phys = <&usb2_phy1>, <&usb3_phy1>;
phy-names = "usb";
}; };

View File

@ -6,7 +6,7 @@ Required properties:
- reg : Should contain 1 register ranges(address and length) - reg : Should contain 1 register ranges(address and length)
- interrupts : UHCI controller interrupt - interrupts : UHCI controller interrupt
additionally the properties from usb-hcd.txt (in the current directory) are additionally the properties from usb-hcd.yaml (in the current directory) are
supported. supported.
Example: Example:

View File

@ -41,9 +41,9 @@ Optional properties:
- usb3-lpm-capable: determines if platform is USB3 LPM capable - usb3-lpm-capable: determines if platform is USB3 LPM capable
- quirk-broken-port-ped: set if the controller has broken port disable mechanism - quirk-broken-port-ped: set if the controller has broken port disable mechanism
- imod-interval-ns: default interrupt moderation interval is 5000ns - imod-interval-ns: default interrupt moderation interval is 5000ns
- phys : see usb-hcd.txt in the current directory - phys : see usb-hcd.yaml in the current directory
additionally the properties from usb-hcd.txt (in the current directory) are additionally the properties from usb-hcd.yaml (in the current directory) are
supported. supported.

View File

@ -7,6 +7,7 @@ Linux Hardware Monitoring
hwmon-kernel-api hwmon-kernel-api
pmbus-core pmbus-core
inspur-ipsps1
submitting-patches submitting-patches
sysfs-interface sysfs-interface
userspace-tools userspace-tools

View File

@ -1,5 +1,5 @@
Kernel driver inspur-ipsps1 Kernel driver inspur-ipsps1
======================= ===========================
Supported chips: Supported chips:

View File

@ -21,10 +21,17 @@ Supported chips:
* AMD Family 14h processors: "Brazos" (C/E/G/Z-Series) * AMD Family 14h processors: "Brazos" (C/E/G/Z-Series)
* AMD Family 15h processors: "Bulldozer" (FX-Series), "Trinity", "Kaveri", "Carrizo" * AMD Family 15h processors: "Bulldozer" (FX-Series), "Trinity", "Kaveri",
"Carrizo", "Stoney Ridge", "Bristol Ridge"
* AMD Family 16h processors: "Kabini", "Mullins" * AMD Family 16h processors: "Kabini", "Mullins"
* AMD Family 17h processors: "Zen", "Zen 2"
* AMD Family 18h processors: "Hygon Dhyana"
* AMD Family 19h processors: "Zen 3"
Prefix: 'k10temp' Prefix: 'k10temp'
Addresses scanned: PCI space Addresses scanned: PCI space
@ -110,3 +117,12 @@ The maximum value for Tctl is available in the file temp1_max.
If the BIOS has enabled hardware temperature control, the threshold at If the BIOS has enabled hardware temperature control, the threshold at
which the processor will throttle itself to avoid damage is available in which the processor will throttle itself to avoid damage is available in
temp1_crit and temp1_crit_hyst. temp1_crit and temp1_crit_hyst.
On some AMD CPUs, there is a difference between the die temperature (Tdie) and
the reported temperature (Tctl). Tdie is the real measured temperature, and
Tctl is used for fan control. While Tctl is always available as temp1_input,
the driver exports Tdie temperature as temp2_input for those CPUs which support
it.
Models from 17h family report relative temperature, the driver aims to
compensate and report the real temperature.

View File

@ -36,8 +36,10 @@ Support
======= =======
For general Linux networking support, please use the netdev mailing For general Linux networking support, please use the netdev mailing
list, which is monitored by Pensando personnel:: list, which is monitored by Pensando personnel::
netdev@vger.kernel.org netdev@vger.kernel.org
For more specific support needs, please use the Pensando driver support For more specific support needs, please use the Pensando driver support
email:: email::
drivers@pensando.io drivers@pensando.io

View File

@ -92,16 +92,16 @@ under some conditions.
Part III: Registering a Network Device to DIM Part III: Registering a Network Device to DIM
============================================== ==============================================
Net DIM API exposes the main function net_dim(struct net_dim *dim, Net DIM API exposes the main function net_dim(struct dim *dim,
struct net_dim_sample end_sample). This function is the entry point to the Net struct dim_sample end_sample). This function is the entry point to the Net
DIM algorithm and has to be called every time the driver would like to check if DIM algorithm and has to be called every time the driver would like to check if
it should change interrupt moderation parameters. The driver should provide two it should change interrupt moderation parameters. The driver should provide two
data structures: struct net_dim and struct net_dim_sample. Struct net_dim data structures: struct dim and struct dim_sample. Struct dim
describes the state of DIM for a specific object (RX queue, TX queue, describes the state of DIM for a specific object (RX queue, TX queue,
other queues, etc.). This includes the current selected profile, previous data other queues, etc.). This includes the current selected profile, previous data
samples, the callback function provided by the driver and more. samples, the callback function provided by the driver and more.
Struct net_dim_sample describes a data sample, which will be compared to the Struct dim_sample describes a data sample, which will be compared to the
data sample stored in struct net_dim in order to decide on the algorithm's next data sample stored in struct dim in order to decide on the algorithm's next
step. The sample should include bytes, packets and interrupts, measured by step. The sample should include bytes, packets and interrupts, measured by
the driver. the driver.
@ -110,9 +110,9 @@ main net_dim() function. The recommended method is to call net_dim() on each
interrupt. Since Net DIM has a built-in moderation and it might decide to skip interrupt. Since Net DIM has a built-in moderation and it might decide to skip
iterations under certain conditions, there is no need to moderate the net_dim() iterations under certain conditions, there is no need to moderate the net_dim()
calls as well. As mentioned above, the driver needs to provide an object of type calls as well. As mentioned above, the driver needs to provide an object of type
struct net_dim to the net_dim() function call. It is advised for each entity struct dim to the net_dim() function call. It is advised for each entity
using Net DIM to hold a struct net_dim as part of its data structure and use it using Net DIM to hold a struct dim as part of its data structure and use it
as the main Net DIM API object. The struct net_dim_sample should hold the latest as the main Net DIM API object. The struct dim_sample should hold the latest
bytes, packets and interrupts count. No need to perform any calculations, just bytes, packets and interrupts count. No need to perform any calculations, just
include the raw data. include the raw data.
@ -132,19 +132,19 @@ usage is not complete but it should make the outline of the usage clear.
my_driver.c: my_driver.c:
#include <linux/net_dim.h> #include <linux/dim.h>
/* Callback for net DIM to schedule on a decision to change moderation */ /* Callback for net DIM to schedule on a decision to change moderation */
void my_driver_do_dim_work(struct work_struct *work) void my_driver_do_dim_work(struct work_struct *work)
{ {
/* Get struct net_dim from struct work_struct */ /* Get struct dim from struct work_struct */
struct net_dim *dim = container_of(work, struct net_dim, struct dim *dim = container_of(work, struct dim,
work); work);
/* Do interrupt moderation related stuff */ /* Do interrupt moderation related stuff */
... ...
/* Signal net DIM work is done and it should move to next iteration */ /* Signal net DIM work is done and it should move to next iteration */
dim->state = NET_DIM_START_MEASURE; dim->state = DIM_START_MEASURE;
} }
/* My driver's interrupt handler */ /* My driver's interrupt handler */
@ -152,10 +152,10 @@ int my_driver_handle_interrupt(struct my_driver_entity *my_entity, ...)
{ {
... ...
/* A struct to hold current measured data */ /* A struct to hold current measured data */
struct net_dim_sample dim_sample; struct dim_sample dim_sample;
... ...
/* Initiate data sample struct with current data */ /* Initiate data sample struct with current data */
net_dim_sample(my_entity->events, dim_update_sample(my_entity->events,
my_entity->packets, my_entity->packets,
my_entity->bytes, my_entity->bytes,
&dim_sample); &dim_sample);

View File

@ -56,7 +56,7 @@ instead of ``double-indenting`` the ``case`` labels. E.g.:
case 'K': case 'K':
case 'k': case 'k':
mem <<= 10; mem <<= 10;
/* fall through */ fallthrough;
default: default:
break; break;
} }

View File

@ -122,14 +122,27 @@ memory adjacent to the stack (when built without `CONFIG_VMAP_STACK=y`)
Implicit switch case fall-through Implicit switch case fall-through
--------------------------------- ---------------------------------
The C language allows switch cases to "fall through" when The C language allows switch cases to "fall-through" when a "break" statement
a "break" statement is missing at the end of a case. This, is missing at the end of a case. This, however, introduces ambiguity in the
however, introduces ambiguity in the code, as it's not always code, as it's not always clear if the missing break is intentional or a bug.
clear if the missing break is intentional or a bug. As there
have been a long list of flaws `due to missing "break" statements As there have been a long list of flaws `due to missing "break" statements
<https://cwe.mitre.org/data/definitions/484.html>`_, we no longer allow <https://cwe.mitre.org/data/definitions/484.html>`_, we no longer allow
"implicit fall-through". In order to identify an intentional fall-through "implicit fall-through".
case, we have adopted the marking used by static analyzers: a comment
saying `/* Fall through */`. Once the C++17 `__attribute__((fallthrough))` In order to identify intentional fall-through cases, we have adopted a
is more widely handled by C compilers, static analyzers, and IDEs, we can pseudo-keyword macro 'fallthrough' which expands to gcc's extension
switch to using that instead. __attribute__((__fallthrough__)). `Statement Attributes
<https://gcc.gnu.org/onlinedocs/gcc/Statement-Attributes.html>`_
When the C17/C18 [[fallthrough]] syntax is more commonly supported by
C compilers, static analyzers, and IDEs, we can switch to using that syntax
for the macro pseudo-keyword.
All switch/case blocks must end in one of:
break;
fallthrough;
continue;
goto <label>;
return [expression];

View File

@ -1,109 +0,0 @@
============
Diamonds Rio
============
Copyright (C) 1999, 2000 Bruce Tenison
Portions Copyright (C) 1999, 2000 David Nelson
Thanks to David Nelson for guidance and the usage of the scanner.txt
and scanner.c files to model our driver and this informative file.
Mar. 2, 2000
Changes
=======
- Initial Revision
Overview
========
This README will address issues regarding how to configure the kernel
to access a RIO 500 mp3 player.
Before I explain how to use this to access the Rio500 please be warned:
.. warning::
Please note that this software is still under development. The authors
are in no way responsible for any damage that may occur, no matter how
inconsequential.
It seems that the Rio has a problem when sending .mp3 with low batteries.
I suggest when the batteries are low and you want to transfer stuff that you
replace it with a fresh one. In my case, what happened is I lost two 16kb
blocks (they are no longer usable to store information to it). But I don't
know if that's normal or not; it could simply be a problem with the flash
memory.
In an extreme case, I left my Rio playing overnight and the batteries wore
down to nothing and appear to have corrupted the flash memory. My RIO
needed to be replaced as a result. Diamond tech support is aware of the
problem. Do NOT allow your batteries to wear down to nothing before
changing them. It appears RIO 500 firmware does not handle low battery
power well at all.
On systems with OHCI controllers, the kernel OHCI code appears to have
power on problems with some chipsets. If you are having problems
connecting to your RIO 500, try turning it on first and then plugging it
into the USB cable.
Contact Information
-------------------
The main page for the project is hosted at sourceforge.net in the following
URL: <http://rio500.sourceforge.net>. You can also go to the project's
sourceforge home page at: <http://sourceforge.net/projects/rio500/>.
There is also a mailing list: rio500-users@lists.sourceforge.net
Authors
-------
Most of the code was written by Cesar Miquel <miquel@df.uba.ar>. Keith
Clayton <kclayton@jps.net> is incharge of the PPC port and making sure
things work there. Bruce Tenison <btenison@dibbs.net> is adding support
for .fon files and also does testing. The program will mostly sure be
re-written and Pete Ikusz along with the rest will re-design it. I would
also like to thank Tri Nguyen <tmn_3022000@hotmail.com> who provided use
with some important information regarding the communication with the Rio.
Additional Information and userspace tools
http://rio500.sourceforge.net/
Requirements
============
A host with a USB port running a Linux kernel with RIO 500 support enabled.
The driver is a module called rio500, which should be automatically loaded
as you plug in your device. If that fails you can manually load it with
modprobe rio500
Udev should automatically create a device node as soon as plug in your device.
If that fails, you can manually add a device for the USB rio500::
mknod /dev/usb/rio500 c 180 64
In that case, set appropriate permissions for /dev/usb/rio500 (don't forget
about group and world permissions). Both read and write permissions are
required for proper operation.
That's it. The Rio500 Utils at: http://rio500.sourceforge.net should
be able to access the rio500.
Limits
======
You can use only a single rio500 device at a time with your computer.
Bugs
====
If you encounter any problems feel free to drop me an email.
Bruce Tenison
btenison@dibbs.net

View File

@ -2165,12 +2165,10 @@ F: arch/arm64/boot/dts/realtek/
F: Documentation/devicetree/bindings/arm/realtek.yaml F: Documentation/devicetree/bindings/arm/realtek.yaml
ARM/RENESAS ARM64 ARCHITECTURE ARM/RENESAS ARM64 ARCHITECTURE
M: Simon Horman <horms@verge.net.au>
M: Geert Uytterhoeven <geert+renesas@glider.be> M: Geert Uytterhoeven <geert+renesas@glider.be>
M: Magnus Damm <magnus.damm@gmail.com> M: Magnus Damm <magnus.damm@gmail.com>
L: linux-renesas-soc@vger.kernel.org L: linux-renesas-soc@vger.kernel.org
Q: http://patchwork.kernel.org/project/linux-renesas-soc/list/ Q: http://patchwork.kernel.org/project/linux-renesas-soc/list/
T: git git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas.git next
T: git git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel.git next T: git git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel.git next
S: Supported S: Supported
F: arch/arm64/boot/dts/renesas/ F: arch/arm64/boot/dts/renesas/
@ -2282,12 +2280,10 @@ S: Maintained
F: drivers/media/platform/s5p-mfc/ F: drivers/media/platform/s5p-mfc/
ARM/SHMOBILE ARM ARCHITECTURE ARM/SHMOBILE ARM ARCHITECTURE
M: Simon Horman <horms@verge.net.au>
M: Geert Uytterhoeven <geert+renesas@glider.be> M: Geert Uytterhoeven <geert+renesas@glider.be>
M: Magnus Damm <magnus.damm@gmail.com> M: Magnus Damm <magnus.damm@gmail.com>
L: linux-renesas-soc@vger.kernel.org L: linux-renesas-soc@vger.kernel.org
Q: http://patchwork.kernel.org/project/linux-renesas-soc/list/ Q: http://patchwork.kernel.org/project/linux-renesas-soc/list/
T: git git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas.git next
T: git git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel.git next T: git git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel.git next
S: Supported S: Supported
F: arch/arm/boot/dts/emev2* F: arch/arm/boot/dts/emev2*
@ -2327,11 +2323,13 @@ F: drivers/edac/altera_edac.
ARM/SPREADTRUM SoC SUPPORT ARM/SPREADTRUM SoC SUPPORT
M: Orson Zhai <orsonzhai@gmail.com> M: Orson Zhai <orsonzhai@gmail.com>
M: Baolin Wang <baolin.wang@linaro.org> M: Baolin Wang <baolin.wang7@gmail.com>
M: Chunyan Zhang <zhang.lyra@gmail.com> M: Chunyan Zhang <zhang.lyra@gmail.com>
S: Maintained S: Maintained
F: arch/arm64/boot/dts/sprd F: arch/arm64/boot/dts/sprd
N: sprd N: sprd
N: sc27xx
N: sc2731
ARM/STI ARCHITECTURE ARM/STI ARCHITECTURE
M: Patrice Chotard <patrice.chotard@st.com> M: Patrice Chotard <patrice.chotard@st.com>
@ -3100,7 +3098,7 @@ S: Supported
F: arch/arm64/net/ F: arch/arm64/net/
BPF JIT for MIPS (32-BIT AND 64-BIT) BPF JIT for MIPS (32-BIT AND 64-BIT)
M: Paul Burton <paul.burton@mips.com> M: Paul Burton <paulburton@kernel.org>
L: netdev@vger.kernel.org L: netdev@vger.kernel.org
L: bpf@vger.kernel.org L: bpf@vger.kernel.org
S: Maintained S: Maintained
@ -3187,7 +3185,7 @@ N: bcm216*
N: kona N: kona
F: arch/arm/mach-bcm/ F: arch/arm/mach-bcm/
BROADCOM BCM2835 ARM ARCHITECTURE BROADCOM BCM2711/BCM2835 ARM ARCHITECTURE
M: Eric Anholt <eric@anholt.net> M: Eric Anholt <eric@anholt.net>
M: Stefan Wahren <wahrenst@gmx.net> M: Stefan Wahren <wahrenst@gmx.net>
L: bcm-kernel-feedback-list@broadcom.com L: bcm-kernel-feedback-list@broadcom.com
@ -3195,6 +3193,7 @@ L: linux-rpi-kernel@lists.infradead.org (moderated for non-subscribers)
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers) L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
T: git git://github.com/anholt/linux T: git git://github.com/anholt/linux
S: Maintained S: Maintained
N: bcm2711
N: bcm2835 N: bcm2835
F: drivers/staging/vc04_services F: drivers/staging/vc04_services
@ -3241,8 +3240,6 @@ S: Maintained
F: drivers/usb/gadget/udc/bcm63xx_udc.* F: drivers/usb/gadget/udc/bcm63xx_udc.*
BROADCOM BCM7XXX ARM ARCHITECTURE BROADCOM BCM7XXX ARM ARCHITECTURE
M: Brian Norris <computersforpeace@gmail.com>
M: Gregory Fong <gregory.0xf0@gmail.com>
M: Florian Fainelli <f.fainelli@gmail.com> M: Florian Fainelli <f.fainelli@gmail.com>
M: bcm-kernel-feedback-list@broadcom.com M: bcm-kernel-feedback-list@broadcom.com
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers) L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
@ -7997,7 +7994,7 @@ S: Maintained
F: drivers/usb/atm/ueagle-atm.c F: drivers/usb/atm/ueagle-atm.c
IMGTEC ASCII LCD DRIVER IMGTEC ASCII LCD DRIVER
M: Paul Burton <paul.burton@mips.com> M: Paul Burton <paulburton@kernel.org>
S: Maintained S: Maintained
F: Documentation/devicetree/bindings/auxdisplay/img-ascii-lcd.txt F: Documentation/devicetree/bindings/auxdisplay/img-ascii-lcd.txt
F: drivers/auxdisplay/img-ascii-lcd.c F: drivers/auxdisplay/img-ascii-lcd.c
@ -9118,7 +9115,7 @@ F: drivers/auxdisplay/ks0108.c
F: include/linux/ks0108.h F: include/linux/ks0108.h
L3MDEV L3MDEV
M: David Ahern <dsa@cumulusnetworks.com> M: David Ahern <dsahern@kernel.org>
L: netdev@vger.kernel.org L: netdev@vger.kernel.org
S: Maintained S: Maintained
F: net/l3mdev F: net/l3mdev
@ -9179,6 +9176,7 @@ M: Pavel Machek <pavel@ucw.cz>
R: Dan Murphy <dmurphy@ti.com> R: Dan Murphy <dmurphy@ti.com>
L: linux-leds@vger.kernel.org L: linux-leds@vger.kernel.org
T: git git://git.kernel.org/pub/scm/linux/kernel/git/j.anaszewski/linux-leds.git T: git git://git.kernel.org/pub/scm/linux/kernel/git/j.anaszewski/linux-leds.git
T: git git://git.kernel.org/pub/scm/linux/kernel/git/pavel/linux-leds.git
S: Maintained S: Maintained
F: Documentation/devicetree/bindings/leds/ F: Documentation/devicetree/bindings/leds/
F: drivers/leds/ F: drivers/leds/
@ -10250,7 +10248,7 @@ MEDIATEK ETHERNET DRIVER
M: Felix Fietkau <nbd@openwrt.org> M: Felix Fietkau <nbd@openwrt.org>
M: John Crispin <john@phrozen.org> M: John Crispin <john@phrozen.org>
M: Sean Wang <sean.wang@mediatek.com> M: Sean Wang <sean.wang@mediatek.com>
M: Nelson Chang <nelson.chang@mediatek.com> M: Mark Lee <Mark-MC.Lee@mediatek.com>
L: netdev@vger.kernel.org L: netdev@vger.kernel.org
S: Maintained S: Maintained
F: drivers/net/ethernet/mediatek/ F: drivers/net/ethernet/mediatek/
@ -10823,7 +10821,7 @@ F: drivers/usb/image/microtek.*
MIPS MIPS
M: Ralf Baechle <ralf@linux-mips.org> M: Ralf Baechle <ralf@linux-mips.org>
M: Paul Burton <paul.burton@mips.com> M: Paul Burton <paulburton@kernel.org>
M: James Hogan <jhogan@kernel.org> M: James Hogan <jhogan@kernel.org>
L: linux-mips@vger.kernel.org L: linux-mips@vger.kernel.org
W: http://www.linux-mips.org/ W: http://www.linux-mips.org/
@ -10837,7 +10835,7 @@ F: arch/mips/
F: drivers/platform/mips/ F: drivers/platform/mips/
MIPS BOSTON DEVELOPMENT BOARD MIPS BOSTON DEVELOPMENT BOARD
M: Paul Burton <paul.burton@mips.com> M: Paul Burton <paulburton@kernel.org>
L: linux-mips@vger.kernel.org L: linux-mips@vger.kernel.org
S: Maintained S: Maintained
F: Documentation/devicetree/bindings/clock/img,boston-clock.txt F: Documentation/devicetree/bindings/clock/img,boston-clock.txt
@ -10847,7 +10845,7 @@ F: drivers/clk/imgtec/clk-boston.c
F: include/dt-bindings/clock/boston-clock.h F: include/dt-bindings/clock/boston-clock.h
MIPS GENERIC PLATFORM MIPS GENERIC PLATFORM
M: Paul Burton <paul.burton@mips.com> M: Paul Burton <paulburton@kernel.org>
L: linux-mips@vger.kernel.org L: linux-mips@vger.kernel.org
S: Supported S: Supported
F: Documentation/devicetree/bindings/power/mti,mips-cpc.txt F: Documentation/devicetree/bindings/power/mti,mips-cpc.txt
@ -11539,6 +11537,7 @@ NSDEPS
M: Matthias Maennich <maennich@google.com> M: Matthias Maennich <maennich@google.com>
S: Maintained S: Maintained
F: scripts/nsdeps F: scripts/nsdeps
F: Documentation/core-api/symbol-namespaces.rst
NTB AMD DRIVER NTB AMD DRIVER
M: Shyam Sundar S K <Shyam-sundar.S-k@amd.com> M: Shyam Sundar S K <Shyam-sundar.S-k@amd.com>
@ -12306,12 +12305,15 @@ F: arch/parisc/
F: Documentation/parisc/ F: Documentation/parisc/
F: drivers/parisc/ F: drivers/parisc/
F: drivers/char/agp/parisc-agp.c F: drivers/char/agp/parisc-agp.c
F: drivers/input/misc/hp_sdc_rtc.c
F: drivers/input/serio/gscps2.c F: drivers/input/serio/gscps2.c
F: drivers/input/serio/hp_sdc*
F: drivers/parport/parport_gsc.* F: drivers/parport/parport_gsc.*
F: drivers/tty/serial/8250/8250_gsc.c F: drivers/tty/serial/8250/8250_gsc.c
F: drivers/video/fbdev/sti* F: drivers/video/fbdev/sti*
F: drivers/video/console/sti* F: drivers/video/console/sti*
F: drivers/video/logo/logo_parisc* F: drivers/video/logo/logo_parisc*
F: include/linux/hp_sdc.h
PARMAN PARMAN
M: Jiri Pirko <jiri@mellanox.com> M: Jiri Pirko <jiri@mellanox.com>
@ -13355,7 +13357,7 @@ S: Maintained
F: drivers/scsi/qla1280.[ch] F: drivers/scsi/qla1280.[ch]
QLOGIC QLA2XXX FC-SCSI DRIVER QLOGIC QLA2XXX FC-SCSI DRIVER
M: qla2xxx-upstream@qlogic.com M: hmadhani@marvell.com
L: linux-scsi@vger.kernel.org L: linux-scsi@vger.kernel.org
S: Supported S: Supported
F: Documentation/scsi/LICENSE.qla2xxx F: Documentation/scsi/LICENSE.qla2xxx
@ -16758,13 +16760,6 @@ W: http://www.linux-usb.org/usbnet
S: Maintained S: Maintained
F: drivers/net/usb/dm9601.c F: drivers/net/usb/dm9601.c
USB DIAMOND RIO500 DRIVER
M: Cesar Miquel <miquel@df.uba.ar>
L: rio500-users@lists.sourceforge.net
W: http://rio500.sourceforge.net
S: Maintained
F: drivers/usb/misc/rio500*
USB EHCI DRIVER USB EHCI DRIVER
M: Alan Stern <stern@rowland.harvard.edu> M: Alan Stern <stern@rowland.harvard.edu>
L: linux-usb@vger.kernel.org L: linux-usb@vger.kernel.org
@ -17431,7 +17426,7 @@ F: include/linux/regulator/
K: regulator_get_optional K: regulator_get_optional
VRF VRF
M: David Ahern <dsa@cumulusnetworks.com> M: David Ahern <dsahern@kernel.org>
M: Shrijeet Mukherjee <shrijeet@gmail.com> M: Shrijeet Mukherjee <shrijeet@gmail.com>
L: netdev@vger.kernel.org L: netdev@vger.kernel.org
S: Maintained S: Maintained

View File

@ -2,8 +2,8 @@
VERSION = 5 VERSION = 5
PATCHLEVEL = 4 PATCHLEVEL = 4
SUBLEVEL = 0 SUBLEVEL = 0
EXTRAVERSION = -rc2 EXTRAVERSION = -rc5
NAME = Nesting Opossum NAME = Kleptomaniac Octopus
# *DOCUMENTATION* # *DOCUMENTATION*
# To see a list of typical targets execute "make help" # To see a list of typical targets execute "make help"
@ -599,7 +599,7 @@ endif
# in addition to whatever we do anyway. # in addition to whatever we do anyway.
# Just "make" or "make all" shall build modules as well # Just "make" or "make all" shall build modules as well
ifneq ($(filter all _all modules,$(MAKECMDGOALS)),) ifneq ($(filter all _all modules nsdeps,$(MAKECMDGOALS)),)
KBUILD_MODULES := 1 KBUILD_MODULES := 1
endif endif
@ -1037,7 +1037,7 @@ export KBUILD_VMLINUX_OBJS := $(head-y) $(init-y) $(core-y) $(libs-y2) \
export KBUILD_VMLINUX_LIBS := $(libs-y1) export KBUILD_VMLINUX_LIBS := $(libs-y1)
export KBUILD_LDS := arch/$(SRCARCH)/kernel/vmlinux.lds export KBUILD_LDS := arch/$(SRCARCH)/kernel/vmlinux.lds
export LDFLAGS_vmlinux export LDFLAGS_vmlinux
# used by scripts/package/Makefile # used by scripts/Makefile.package
export KBUILD_ALLDIRS := $(sort $(filter-out arch/%,$(vmlinux-alldirs)) LICENSES arch include scripts tools) export KBUILD_ALLDIRS := $(sort $(filter-out arch/%,$(vmlinux-alldirs)) LICENSES arch include scripts tools)
vmlinux-deps := $(KBUILD_LDS) $(KBUILD_VMLINUX_OBJS) $(KBUILD_VMLINUX_LIBS) vmlinux-deps := $(KBUILD_LDS) $(KBUILD_VMLINUX_OBJS) $(KBUILD_VMLINUX_LIBS)
@ -1217,9 +1217,8 @@ PHONY += kselftest
kselftest: kselftest:
$(Q)$(MAKE) -C $(srctree)/tools/testing/selftests run_tests $(Q)$(MAKE) -C $(srctree)/tools/testing/selftests run_tests
PHONY += kselftest-clean kselftest-%: FORCE
kselftest-clean: $(Q)$(MAKE) -C $(srctree)/tools/testing/selftests $*
$(Q)$(MAKE) -C $(srctree)/tools/testing/selftests clean
PHONY += kselftest-merge PHONY += kselftest-merge
kselftest-merge: kselftest-merge:

View File

@ -111,13 +111,13 @@ pca9548@70 {
reg = <0x70>; reg = <0x70>;
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
i2c-mux-idle-disconnect;
i2c@0 { i2c@0 {
/* FMC A */ /* FMC A */
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
reg = <0>; reg = <0>;
i2c-mux-idle-disconnect;
}; };
i2c@1 { i2c@1 {
@ -125,7 +125,6 @@ i2c@1 {
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
reg = <1>; reg = <1>;
i2c-mux-idle-disconnect;
}; };
i2c@2 { i2c@2 {
@ -133,7 +132,6 @@ i2c@2 {
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
reg = <2>; reg = <2>;
i2c-mux-idle-disconnect;
}; };
i2c@3 { i2c@3 {
@ -141,7 +139,6 @@ i2c@3 {
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
reg = <3>; reg = <3>;
i2c-mux-idle-disconnect;
}; };
i2c@4 { i2c@4 {
@ -149,14 +146,12 @@ i2c@4 {
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
reg = <4>; reg = <4>;
i2c-mux-idle-disconnect;
}; };
i2c@5 { i2c@5 {
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
reg = <5>; reg = <5>;
i2c-mux-idle-disconnect;
ina230@40 { compatible = "ti,ina230"; reg = <0x40>; shunt-resistor = <5000>; }; ina230@40 { compatible = "ti,ina230"; reg = <0x40>; shunt-resistor = <5000>; };
ina230@41 { compatible = "ti,ina230"; reg = <0x41>; shunt-resistor = <5000>; }; ina230@41 { compatible = "ti,ina230"; reg = <0x41>; shunt-resistor = <5000>; };
@ -182,14 +177,12 @@ i2c@6 {
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
reg = <6>; reg = <6>;
i2c-mux-idle-disconnect;
}; };
i2c@7 { i2c@7 {
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
reg = <7>; reg = <7>;
i2c-mux-idle-disconnect;
u41: pca9575@20 { u41: pca9575@20 {
compatible = "nxp,pca9575"; compatible = "nxp,pca9575";

View File

@ -113,6 +113,7 @@ &sdhci {
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
pinctrl-0 = <&emmc_gpio34 &gpclk2_gpio43>; pinctrl-0 = <&emmc_gpio34 &gpclk2_gpio43>;
bus-width = <4>;
mmc-pwrseq = <&wifi_pwrseq>; mmc-pwrseq = <&wifi_pwrseq>;
non-removable; non-removable;
status = "okay"; status = "okay";

View File

@ -9,6 +9,14 @@ memory@0 {
reg = <0 0x40000000>; reg = <0 0x40000000>;
}; };
leds {
/*
* Since there is no upstream GPIO driver yet,
* remove the incomplete node.
*/
/delete-node/ act;
};
reg_3v3: fixed-regulator { reg_3v3: fixed-regulator {
compatible = "regulator-fixed"; compatible = "regulator-fixed";
regulator-name = "3V3"; regulator-name = "3V3";

View File

@ -207,6 +207,10 @@ &reg_soc
vin-supply = <&sw1c_reg>; vin-supply = <&sw1c_reg>;
}; };
&snvs_poweroff {
status = "okay";
};
&iomuxc { &iomuxc {
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&pinctrl_hog>; pinctrl-0 = <&pinctrl_hog>;

View File

@ -448,7 +448,7 @@ gpt1: gpt@302d0000 {
compatible = "fsl,imx7d-gpt", "fsl,imx6sx-gpt"; compatible = "fsl,imx7d-gpt", "fsl,imx6sx-gpt";
reg = <0x302d0000 0x10000>; reg = <0x302d0000 0x10000>;
interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clks IMX7D_CLK_DUMMY>, clocks = <&clks IMX7D_GPT1_ROOT_CLK>,
<&clks IMX7D_GPT1_ROOT_CLK>; <&clks IMX7D_GPT1_ROOT_CLK>;
clock-names = "ipg", "per"; clock-names = "ipg", "per";
}; };
@ -457,7 +457,7 @@ gpt2: gpt@302e0000 {
compatible = "fsl,imx7d-gpt", "fsl,imx6sx-gpt"; compatible = "fsl,imx7d-gpt", "fsl,imx6sx-gpt";
reg = <0x302e0000 0x10000>; reg = <0x302e0000 0x10000>;
interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clks IMX7D_CLK_DUMMY>, clocks = <&clks IMX7D_GPT2_ROOT_CLK>,
<&clks IMX7D_GPT2_ROOT_CLK>; <&clks IMX7D_GPT2_ROOT_CLK>;
clock-names = "ipg", "per"; clock-names = "ipg", "per";
status = "disabled"; status = "disabled";
@ -467,7 +467,7 @@ gpt3: gpt@302f0000 {
compatible = "fsl,imx7d-gpt", "fsl,imx6sx-gpt"; compatible = "fsl,imx7d-gpt", "fsl,imx6sx-gpt";
reg = <0x302f0000 0x10000>; reg = <0x302f0000 0x10000>;
interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clks IMX7D_CLK_DUMMY>, clocks = <&clks IMX7D_GPT3_ROOT_CLK>,
<&clks IMX7D_GPT3_ROOT_CLK>; <&clks IMX7D_GPT3_ROOT_CLK>;
clock-names = "ipg", "per"; clock-names = "ipg", "per";
status = "disabled"; status = "disabled";
@ -477,7 +477,7 @@ gpt4: gpt@30300000 {
compatible = "fsl,imx7d-gpt", "fsl,imx6sx-gpt"; compatible = "fsl,imx7d-gpt", "fsl,imx6sx-gpt";
reg = <0x30300000 0x10000>; reg = <0x30300000 0x10000>;
interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clks IMX7D_CLK_DUMMY>, clocks = <&clks IMX7D_GPT4_ROOT_CLK>,
<&clks IMX7D_GPT4_ROOT_CLK>; <&clks IMX7D_GPT4_ROOT_CLK>;
clock-names = "ipg", "per"; clock-names = "ipg", "per";
status = "disabled"; status = "disabled";

View File

@ -192,3 +192,7 @@ twl_power: power {
&twl_gpio { &twl_gpio {
ti,use-leds; ti,use-leds;
}; };
&twl_keypad {
status = "disabled";
};

View File

@ -66,9 +66,21 @@ &eth {
pinctrl-1 = <&ephy_leds_pins>; pinctrl-1 = <&ephy_leds_pins>;
status = "okay"; status = "okay";
gmac0: mac@0 {
compatible = "mediatek,eth-mac";
reg = <0>;
phy-mode = "2500base-x";
fixed-link {
speed = <2500>;
full-duplex;
pause;
};
};
gmac1: mac@1 { gmac1: mac@1 {
compatible = "mediatek,eth-mac"; compatible = "mediatek,eth-mac";
reg = <1>; reg = <1>;
phy-mode = "gmii";
phy-handle = <&phy0>; phy-handle = <&phy0>;
}; };
@ -78,7 +90,6 @@ mdio: mdio-bus {
phy0: ethernet-phy@0 { phy0: ethernet-phy@0 {
reg = <0>; reg = <0>;
phy-mode = "gmii";
}; };
}; };
}; };

View File

@ -468,14 +468,12 @@ sgmiisys0: syscon@1b128000 {
compatible = "mediatek,mt7629-sgmiisys", "syscon"; compatible = "mediatek,mt7629-sgmiisys", "syscon";
reg = <0x1b128000 0x3000>; reg = <0x1b128000 0x3000>;
#clock-cells = <1>; #clock-cells = <1>;
mediatek,physpeed = "2500";
}; };
sgmiisys1: syscon@1b130000 { sgmiisys1: syscon@1b130000 {
compatible = "mediatek,mt7629-sgmiisys", "syscon"; compatible = "mediatek,mt7629-sgmiisys", "syscon";
reg = <0x1b130000 0x3000>; reg = <0x1b130000 0x3000>;
#clock-cells = <1>; #clock-cells = <1>;
mediatek,physpeed = "2500";
}; };
}; };
}; };

View File

@ -369,7 +369,7 @@ wlcore: wlcore@2 {
compatible = "ti,wl1285", "ti,wl1283"; compatible = "ti,wl1285", "ti,wl1283";
reg = <2>; reg = <2>;
/* gpio_100 with gpmc_wait2 pad as wakeirq */ /* gpio_100 with gpmc_wait2 pad as wakeirq */
interrupts-extended = <&gpio4 4 IRQ_TYPE_EDGE_RISING>, interrupts-extended = <&gpio4 4 IRQ_TYPE_LEVEL_HIGH>,
<&omap4_pmx_core 0x4e>; <&omap4_pmx_core 0x4e>;
interrupt-names = "irq", "wakeup"; interrupt-names = "irq", "wakeup";
ref-clock-frequency = <26000000>; ref-clock-frequency = <26000000>;

View File

@ -474,7 +474,7 @@ wlcore: wlcore@2 {
compatible = "ti,wl1271"; compatible = "ti,wl1271";
reg = <2>; reg = <2>;
/* gpio_53 with gpmc_ncs3 pad as wakeup */ /* gpio_53 with gpmc_ncs3 pad as wakeup */
interrupts-extended = <&gpio2 21 IRQ_TYPE_EDGE_RISING>, interrupts-extended = <&gpio2 21 IRQ_TYPE_LEVEL_HIGH>,
<&omap4_pmx_core 0x3a>; <&omap4_pmx_core 0x3a>;
interrupt-names = "irq", "wakeup"; interrupt-names = "irq", "wakeup";
ref-clock-frequency = <38400000>; ref-clock-frequency = <38400000>;

View File

@ -512,7 +512,7 @@ wlcore: wlcore@2 {
compatible = "ti,wl1281"; compatible = "ti,wl1281";
reg = <2>; reg = <2>;
interrupt-parent = <&gpio1>; interrupt-parent = <&gpio1>;
interrupts = <21 IRQ_TYPE_EDGE_RISING>; /* gpio 53 */ interrupts = <21 IRQ_TYPE_LEVEL_HIGH>; /* gpio 53 */
ref-clock-frequency = <26000000>; ref-clock-frequency = <26000000>;
tcxo-clock-frequency = <26000000>; tcxo-clock-frequency = <26000000>;
}; };

View File

@ -69,7 +69,7 @@ wlcore: wlcore@2 {
compatible = "ti,wl1271"; compatible = "ti,wl1271";
reg = <2>; reg = <2>;
interrupt-parent = <&gpio2>; interrupt-parent = <&gpio2>;
interrupts = <9 IRQ_TYPE_EDGE_RISING>; /* gpio 41 */ interrupts = <9 IRQ_TYPE_LEVEL_HIGH>; /* gpio 41 */
ref-clock-frequency = <38400000>; ref-clock-frequency = <38400000>;
}; };
}; };

View File

@ -362,7 +362,7 @@ wlcore: wlcore@2 {
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&wlcore_irq_pin>; pinctrl-0 = <&wlcore_irq_pin>;
interrupt-parent = <&gpio1>; interrupt-parent = <&gpio1>;
interrupts = <14 IRQ_TYPE_EDGE_RISING>; /* gpio 14 */ interrupts = <14 IRQ_TYPE_LEVEL_HIGH>; /* gpio 14 */
ref-clock-frequency = <26000000>; ref-clock-frequency = <26000000>;
}; };
}; };

View File

@ -1146,7 +1146,7 @@ dss_clkctrl: clk@20 {
}; };
}; };
gpu_cm: clock-controller@1500 { gpu_cm: gpu_cm@1500 {
compatible = "ti,omap4-cm"; compatible = "ti,omap4-cm";
reg = <0x1500 0x100>; reg = <0x1500 0x100>;
#address-cells = <1>; #address-cells = <1>;

View File

@ -609,13 +609,13 @@ pins1 {
<STM32_PINMUX('F', 6, AF9)>; /* QSPI_BK1_IO3 */ <STM32_PINMUX('F', 6, AF9)>; /* QSPI_BK1_IO3 */
bias-disable; bias-disable;
drive-push-pull; drive-push-pull;
slew-rate = <3>; slew-rate = <1>;
}; };
pins2 { pins2 {
pinmux = <STM32_PINMUX('B', 6, AF10)>; /* QSPI_BK1_NCS */ pinmux = <STM32_PINMUX('B', 6, AF10)>; /* QSPI_BK1_NCS */
bias-pull-up; bias-pull-up;
drive-push-pull; drive-push-pull;
slew-rate = <3>; slew-rate = <1>;
}; };
}; };
@ -637,13 +637,13 @@ pins1 {
<STM32_PINMUX('G', 7, AF11)>; /* QSPI_BK2_IO3 */ <STM32_PINMUX('G', 7, AF11)>; /* QSPI_BK2_IO3 */
bias-disable; bias-disable;
drive-push-pull; drive-push-pull;
slew-rate = <3>; slew-rate = <1>;
}; };
pins2 { pins2 {
pinmux = <STM32_PINMUX('C', 0, AF10)>; /* QSPI_BK2_NCS */ pinmux = <STM32_PINMUX('C', 0, AF10)>; /* QSPI_BK2_NCS */
bias-pull-up; bias-pull-up;
drive-push-pull; drive-push-pull;
slew-rate = <3>; slew-rate = <1>;
}; };
}; };

View File

@ -520,6 +520,7 @@ ehci0: usb@1c14000 {
interrupts = <39>; interrupts = <39>;
clocks = <&ccu CLK_AHB_EHCI0>; clocks = <&ccu CLK_AHB_EHCI0>;
phys = <&usbphy 1>; phys = <&usbphy 1>;
phy-names = "usb";
status = "disabled"; status = "disabled";
}; };
@ -529,6 +530,7 @@ ohci0: usb@1c14400 {
interrupts = <64>; interrupts = <64>;
clocks = <&ccu CLK_USB_OHCI0>, <&ccu CLK_AHB_OHCI0>; clocks = <&ccu CLK_USB_OHCI0>, <&ccu CLK_AHB_OHCI0>;
phys = <&usbphy 1>; phys = <&usbphy 1>;
phy-names = "usb";
status = "disabled"; status = "disabled";
}; };
@ -608,6 +610,7 @@ ehci1: usb@1c1c000 {
interrupts = <40>; interrupts = <40>;
clocks = <&ccu CLK_AHB_EHCI1>; clocks = <&ccu CLK_AHB_EHCI1>;
phys = <&usbphy 2>; phys = <&usbphy 2>;
phy-names = "usb";
status = "disabled"; status = "disabled";
}; };
@ -617,6 +620,7 @@ ohci1: usb@1c1c400 {
interrupts = <65>; interrupts = <65>;
clocks = <&ccu CLK_USB_OHCI1>, <&ccu CLK_AHB_OHCI1>; clocks = <&ccu CLK_USB_OHCI1>, <&ccu CLK_AHB_OHCI1>;
phys = <&usbphy 2>; phys = <&usbphy 2>;
phy-names = "usb";
status = "disabled"; status = "disabled";
}; };

View File

@ -391,6 +391,7 @@ ehci0: usb@1c14000 {
interrupts = <39>; interrupts = <39>;
clocks = <&ccu CLK_AHB_EHCI>; clocks = <&ccu CLK_AHB_EHCI>;
phys = <&usbphy 1>; phys = <&usbphy 1>;
phy-names = "usb";
status = "disabled"; status = "disabled";
}; };
@ -400,6 +401,7 @@ ohci0: usb@1c14400 {
interrupts = <40>; interrupts = <40>;
clocks = <&ccu CLK_USB_OHCI>, <&ccu CLK_AHB_OHCI>; clocks = <&ccu CLK_USB_OHCI>, <&ccu CLK_AHB_OHCI>;
phys = <&usbphy 1>; phys = <&usbphy 1>;
phy-names = "usb";
status = "disabled"; status = "disabled";
}; };

View File

@ -545,6 +545,7 @@ ehci0: usb@1c1a000 {
clocks = <&ccu CLK_AHB1_EHCI0>; clocks = <&ccu CLK_AHB1_EHCI0>;
resets = <&ccu RST_AHB1_EHCI0>; resets = <&ccu RST_AHB1_EHCI0>;
phys = <&usbphy 1>; phys = <&usbphy 1>;
phy-names = "usb";
status = "disabled"; status = "disabled";
}; };
@ -555,6 +556,7 @@ ohci0: usb@1c1a400 {
clocks = <&ccu CLK_AHB1_OHCI0>, <&ccu CLK_USB_OHCI0>; clocks = <&ccu CLK_AHB1_OHCI0>, <&ccu CLK_USB_OHCI0>;
resets = <&ccu RST_AHB1_OHCI0>; resets = <&ccu RST_AHB1_OHCI0>;
phys = <&usbphy 1>; phys = <&usbphy 1>;
phy-names = "usb";
status = "disabled"; status = "disabled";
}; };
@ -565,6 +567,7 @@ ehci1: usb@1c1b000 {
clocks = <&ccu CLK_AHB1_EHCI1>; clocks = <&ccu CLK_AHB1_EHCI1>;
resets = <&ccu RST_AHB1_EHCI1>; resets = <&ccu RST_AHB1_EHCI1>;
phys = <&usbphy 2>; phys = <&usbphy 2>;
phy-names = "usb";
status = "disabled"; status = "disabled";
}; };
@ -575,6 +578,7 @@ ohci1: usb@1c1b400 {
clocks = <&ccu CLK_AHB1_OHCI1>, <&ccu CLK_USB_OHCI1>; clocks = <&ccu CLK_AHB1_OHCI1>, <&ccu CLK_USB_OHCI1>;
resets = <&ccu RST_AHB1_OHCI1>; resets = <&ccu RST_AHB1_OHCI1>;
phys = <&usbphy 2>; phys = <&usbphy 2>;
phy-names = "usb";
status = "disabled"; status = "disabled";
}; };

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@ -380,9 +380,8 @@ csi0: csi@1c09000 {
compatible = "allwinner,sun7i-a20-csi0"; compatible = "allwinner,sun7i-a20-csi0";
reg = <0x01c09000 0x1000>; reg = <0x01c09000 0x1000>;
interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&ccu CLK_AHB_CSI0>, <&ccu CLK_CSI0>, clocks = <&ccu CLK_AHB_CSI0>, <&ccu CLK_CSI_SCLK>, <&ccu CLK_DRAM_CSI0>;
<&ccu CLK_CSI_SCLK>, <&ccu CLK_DRAM_CSI0>; clock-names = "bus", "isp", "ram";
clock-names = "bus", "mod", "isp", "ram";
resets = <&ccu RST_CSI0>; resets = <&ccu RST_CSI0>;
status = "disabled"; status = "disabled";
}; };
@ -623,6 +622,7 @@ ehci0: usb@1c14000 {
interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&ccu CLK_AHB_EHCI0>; clocks = <&ccu CLK_AHB_EHCI0>;
phys = <&usbphy 1>; phys = <&usbphy 1>;
phy-names = "usb";
status = "disabled"; status = "disabled";
}; };
@ -632,6 +632,7 @@ ohci0: usb@1c14400 {
interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&ccu CLK_USB_OHCI0>, <&ccu CLK_AHB_OHCI0>; clocks = <&ccu CLK_USB_OHCI0>, <&ccu CLK_AHB_OHCI0>;
phys = <&usbphy 1>; phys = <&usbphy 1>;
phy-names = "usb";
status = "disabled"; status = "disabled";
}; };
@ -714,6 +715,7 @@ ehci1: usb@1c1c000 {
interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&ccu CLK_AHB_EHCI1>; clocks = <&ccu CLK_AHB_EHCI1>;
phys = <&usbphy 2>; phys = <&usbphy 2>;
phy-names = "usb";
status = "disabled"; status = "disabled";
}; };
@ -723,6 +725,7 @@ ohci1: usb@1c1c400 {
interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&ccu CLK_USB_OHCI1>, <&ccu CLK_AHB_OHCI1>; clocks = <&ccu CLK_USB_OHCI1>, <&ccu CLK_AHB_OHCI1>;
phys = <&usbphy 2>; phys = <&usbphy 2>;
phy-names = "usb";
status = "disabled"; status = "disabled";
}; };

View File

@ -307,6 +307,7 @@ ehci0: usb@1c1a000 {
clocks = <&ccu CLK_BUS_EHCI>; clocks = <&ccu CLK_BUS_EHCI>;
resets = <&ccu RST_BUS_EHCI>; resets = <&ccu RST_BUS_EHCI>;
phys = <&usbphy 1>; phys = <&usbphy 1>;
phy-names = "usb";
status = "disabled"; status = "disabled";
}; };
@ -317,6 +318,7 @@ ohci0: usb@1c1a400 {
clocks = <&ccu CLK_BUS_OHCI>, <&ccu CLK_USB_OHCI>; clocks = <&ccu CLK_BUS_OHCI>, <&ccu CLK_USB_OHCI>;
resets = <&ccu RST_BUS_OHCI>; resets = <&ccu RST_BUS_OHCI>;
phys = <&usbphy 1>; phys = <&usbphy 1>;
phy-names = "usb";
status = "disabled"; status = "disabled";
}; };

View File

@ -632,6 +632,7 @@ ehci0: usb@1c1a000 {
clocks = <&ccu CLK_BUS_EHCI0>; clocks = <&ccu CLK_BUS_EHCI0>;
resets = <&ccu RST_BUS_EHCI0>; resets = <&ccu RST_BUS_EHCI0>;
phys = <&usbphy 1>; phys = <&usbphy 1>;
phy-names = "usb";
status = "disabled"; status = "disabled";
}; };
@ -643,6 +644,7 @@ ohci0: usb@1c1a400 {
clocks = <&ccu CLK_BUS_OHCI0>, <&ccu CLK_USB_OHCI0>; clocks = <&ccu CLK_BUS_OHCI0>, <&ccu CLK_USB_OHCI0>;
resets = <&ccu RST_BUS_OHCI0>; resets = <&ccu RST_BUS_OHCI0>;
phys = <&usbphy 1>; phys = <&usbphy 1>;
phy-names = "usb";
status = "disabled"; status = "disabled";
}; };
@ -654,6 +656,7 @@ ehci1: usb@1c1b000 {
clocks = <&ccu CLK_BUS_EHCI1>; clocks = <&ccu CLK_BUS_EHCI1>;
resets = <&ccu RST_BUS_EHCI1>; resets = <&ccu RST_BUS_EHCI1>;
phys = <&usbphy 2>; phys = <&usbphy 2>;
phy-names = "usb";
status = "disabled"; status = "disabled";
}; };

View File

@ -273,6 +273,7 @@ ehci1: usb@1c19000 {
clocks = <&ccu CLK_BUS_EHCI1>; clocks = <&ccu CLK_BUS_EHCI1>;
resets = <&ccu RST_BUS_EHCI1>; resets = <&ccu RST_BUS_EHCI1>;
phys = <&usbphy 1>; phys = <&usbphy 1>;
phy-names = "usb";
status = "disabled"; status = "disabled";
}; };
@ -284,6 +285,7 @@ ohci1: usb@1c19400 {
<&ccu CLK_USB_OHCI1>; <&ccu CLK_USB_OHCI1>;
resets = <&ccu RST_BUS_OHCI1>; resets = <&ccu RST_BUS_OHCI1>;
phys = <&usbphy 1>; phys = <&usbphy 1>;
phy-names = "usb";
status = "disabled"; status = "disabled";
}; };
@ -294,6 +296,7 @@ ehci2: usb@1c1c000 {
clocks = <&ccu CLK_BUS_EHCI2>; clocks = <&ccu CLK_BUS_EHCI2>;
resets = <&ccu RST_BUS_EHCI2>; resets = <&ccu RST_BUS_EHCI2>;
phys = <&usbphy 2>; phys = <&usbphy 2>;
phy-names = "usb";
status = "disabled"; status = "disabled";
}; };
@ -305,6 +308,7 @@ ohci2: usb@1c1c400 {
<&ccu CLK_USB_OHCI2>; <&ccu CLK_USB_OHCI2>;
resets = <&ccu RST_BUS_OHCI2>; resets = <&ccu RST_BUS_OHCI2>;
phys = <&usbphy 2>; phys = <&usbphy 2>;
phy-names = "usb";
status = "disabled"; status = "disabled";
}; };

View File

@ -346,6 +346,7 @@ ehci0: usb@a00000 {
clocks = <&usb_clocks CLK_BUS_HCI0>; clocks = <&usb_clocks CLK_BUS_HCI0>;
resets = <&usb_clocks RST_USB0_HCI>; resets = <&usb_clocks RST_USB0_HCI>;
phys = <&usbphy1>; phys = <&usbphy1>;
phy-names = "usb";
status = "disabled"; status = "disabled";
}; };
@ -357,6 +358,7 @@ ohci0: usb@a00400 {
<&usb_clocks CLK_USB_OHCI0>; <&usb_clocks CLK_USB_OHCI0>;
resets = <&usb_clocks RST_USB0_HCI>; resets = <&usb_clocks RST_USB0_HCI>;
phys = <&usbphy1>; phys = <&usbphy1>;
phy-names = "usb";
status = "disabled"; status = "disabled";
}; };
@ -378,6 +380,7 @@ ehci1: usb@a01000 {
clocks = <&usb_clocks CLK_BUS_HCI1>; clocks = <&usb_clocks CLK_BUS_HCI1>;
resets = <&usb_clocks RST_USB1_HCI>; resets = <&usb_clocks RST_USB1_HCI>;
phys = <&usbphy2>; phys = <&usbphy2>;
phy-names = "usb";
status = "disabled"; status = "disabled";
}; };
@ -407,6 +410,7 @@ ehci2: usb@a02000 {
clocks = <&usb_clocks CLK_BUS_HCI2>; clocks = <&usb_clocks CLK_BUS_HCI2>;
resets = <&usb_clocks RST_USB2_HCI>; resets = <&usb_clocks RST_USB2_HCI>;
phys = <&usbphy3>; phys = <&usbphy3>;
phy-names = "usb";
status = "disabled"; status = "disabled";
}; };
@ -418,6 +422,7 @@ ohci2: usb@a02400 {
<&usb_clocks CLK_USB_OHCI2>; <&usb_clocks CLK_USB_OHCI2>;
resets = <&usb_clocks RST_USB2_HCI>; resets = <&usb_clocks RST_USB2_HCI>;
phys = <&usbphy3>; phys = <&usbphy3>;
phy-names = "usb";
status = "disabled"; status = "disabled";
}; };

View File

@ -304,6 +304,7 @@ ehci1: usb@1c1b000 {
clocks = <&ccu CLK_BUS_EHCI1>, <&ccu CLK_BUS_OHCI1>; clocks = <&ccu CLK_BUS_EHCI1>, <&ccu CLK_BUS_OHCI1>;
resets = <&ccu RST_BUS_EHCI1>, <&ccu RST_BUS_OHCI1>; resets = <&ccu RST_BUS_EHCI1>, <&ccu RST_BUS_OHCI1>;
phys = <&usbphy 1>; phys = <&usbphy 1>;
phy-names = "usb";
status = "disabled"; status = "disabled";
}; };
@ -315,6 +316,7 @@ ohci1: usb@1c1b400 {
<&ccu CLK_USB_OHCI1>; <&ccu CLK_USB_OHCI1>;
resets = <&ccu RST_BUS_EHCI1>, <&ccu RST_BUS_OHCI1>; resets = <&ccu RST_BUS_EHCI1>, <&ccu RST_BUS_OHCI1>;
phys = <&usbphy 1>; phys = <&usbphy 1>;
phy-names = "usb";
status = "disabled"; status = "disabled";
}; };
@ -325,6 +327,7 @@ ehci2: usb@1c1c000 {
clocks = <&ccu CLK_BUS_EHCI2>, <&ccu CLK_BUS_OHCI2>; clocks = <&ccu CLK_BUS_EHCI2>, <&ccu CLK_BUS_OHCI2>;
resets = <&ccu RST_BUS_EHCI2>, <&ccu RST_BUS_OHCI2>; resets = <&ccu RST_BUS_EHCI2>, <&ccu RST_BUS_OHCI2>;
phys = <&usbphy 2>; phys = <&usbphy 2>;
phy-names = "usb";
status = "disabled"; status = "disabled";
}; };
@ -336,6 +339,7 @@ ohci2: usb@1c1c400 {
<&ccu CLK_USB_OHCI2>; <&ccu CLK_USB_OHCI2>;
resets = <&ccu RST_BUS_EHCI2>, <&ccu RST_BUS_OHCI2>; resets = <&ccu RST_BUS_EHCI2>, <&ccu RST_BUS_OHCI2>;
phys = <&usbphy 2>; phys = <&usbphy 2>;
phy-names = "usb";
status = "disabled"; status = "disabled";
}; };
@ -346,6 +350,7 @@ ehci3: usb@1c1d000 {
clocks = <&ccu CLK_BUS_EHCI3>, <&ccu CLK_BUS_OHCI3>; clocks = <&ccu CLK_BUS_EHCI3>, <&ccu CLK_BUS_OHCI3>;
resets = <&ccu RST_BUS_EHCI3>, <&ccu RST_BUS_OHCI3>; resets = <&ccu RST_BUS_EHCI3>, <&ccu RST_BUS_OHCI3>;
phys = <&usbphy 3>; phys = <&usbphy 3>;
phy-names = "usb";
status = "disabled"; status = "disabled";
}; };
@ -357,6 +362,7 @@ ohci3: usb@1c1d400 {
<&ccu CLK_USB_OHCI3>; <&ccu CLK_USB_OHCI3>;
resets = <&ccu RST_BUS_EHCI3>, <&ccu RST_BUS_OHCI3>; resets = <&ccu RST_BUS_EHCI3>, <&ccu RST_BUS_OHCI3>;
phys = <&usbphy 3>; phys = <&usbphy 3>;
phy-names = "usb";
status = "disabled"; status = "disabled";
}; };

View File

@ -602,6 +602,7 @@ tca9548@70 {
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
reg = <0x70>; reg = <0x70>;
i2c-mux-idle-disconnect;
sff0_i2c: i2c@1 { sff0_i2c: i2c@1 {
#address-cells = <1>; #address-cells = <1>;
@ -640,6 +641,7 @@ tca9548@71 {
reg = <0x71>; reg = <0x71>;
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
i2c-mux-idle-disconnect;
sff5_i2c: i2c@1 { sff5_i2c: i2c@1 {
#address-cells = <1>; #address-cells = <1>;

View File

@ -91,7 +91,6 @@ CONFIG_USB_SERIAL_PL2303=m
CONFIG_USB_SERIAL_CYBERJACK=m CONFIG_USB_SERIAL_CYBERJACK=m
CONFIG_USB_SERIAL_XIRCOM=m CONFIG_USB_SERIAL_XIRCOM=m
CONFIG_USB_SERIAL_OMNINET=m CONFIG_USB_SERIAL_OMNINET=m
CONFIG_USB_RIO500=m
CONFIG_EXT2_FS=m CONFIG_EXT2_FS=m
CONFIG_EXT3_FS=m CONFIG_EXT3_FS=m
CONFIG_MSDOS_FS=y CONFIG_MSDOS_FS=y

View File

@ -195,7 +195,6 @@ CONFIG_USB_SERIAL_XIRCOM=m
CONFIG_USB_SERIAL_OMNINET=m CONFIG_USB_SERIAL_OMNINET=m
CONFIG_USB_EMI62=m CONFIG_USB_EMI62=m
CONFIG_USB_EMI26=m CONFIG_USB_EMI26=m
CONFIG_USB_RIO500=m
CONFIG_USB_LEGOTOWER=m CONFIG_USB_LEGOTOWER=m
CONFIG_USB_LCD=m CONFIG_USB_LCD=m
CONFIG_USB_CYTHERM=m CONFIG_USB_CYTHERM=m

View File

@ -167,6 +167,7 @@ CONFIG_FB=y
CONFIG_FIRMWARE_EDID=y CONFIG_FIRMWARE_EDID=y
CONFIG_FB_DA8XX=y CONFIG_FB_DA8XX=y
CONFIG_BACKLIGHT_PWM=m CONFIG_BACKLIGHT_PWM=m
CONFIG_BACKLIGHT_GPIO=m
CONFIG_FRAMEBUFFER_CONSOLE=y CONFIG_FRAMEBUFFER_CONSOLE=y
CONFIG_LOGO=y CONFIG_LOGO=y
CONFIG_SOUND=m CONFIG_SOUND=m

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@ -276,6 +276,7 @@ CONFIG_VIDEO_OV5640=m
CONFIG_VIDEO_OV5645=m CONFIG_VIDEO_OV5645=m
CONFIG_IMX_IPUV3_CORE=y CONFIG_IMX_IPUV3_CORE=y
CONFIG_DRM=y CONFIG_DRM=y
CONFIG_DRM_MSM=y
CONFIG_DRM_PANEL_LVDS=y CONFIG_DRM_PANEL_LVDS=y
CONFIG_DRM_PANEL_SIMPLE=y CONFIG_DRM_PANEL_SIMPLE=y
CONFIG_DRM_PANEL_SEIKO_43WVF1G=y CONFIG_DRM_PANEL_SEIKO_43WVF1G=y

View File

@ -356,15 +356,15 @@ CONFIG_DRM_OMAP_CONNECTOR_HDMI=m
CONFIG_DRM_OMAP_CONNECTOR_ANALOG_TV=m CONFIG_DRM_OMAP_CONNECTOR_ANALOG_TV=m
CONFIG_DRM_OMAP_PANEL_DPI=m CONFIG_DRM_OMAP_PANEL_DPI=m
CONFIG_DRM_OMAP_PANEL_DSI_CM=m CONFIG_DRM_OMAP_PANEL_DSI_CM=m
CONFIG_DRM_OMAP_PANEL_SONY_ACX565AKM=m
CONFIG_DRM_OMAP_PANEL_LGPHILIPS_LB035Q02=m
CONFIG_DRM_OMAP_PANEL_SHARP_LS037V7DW01=m
CONFIG_DRM_OMAP_PANEL_TPO_TD028TTEC1=m
CONFIG_DRM_OMAP_PANEL_TPO_TD043MTEA1=m
CONFIG_DRM_OMAP_PANEL_NEC_NL8048HL11=m
CONFIG_DRM_TILCDC=m CONFIG_DRM_TILCDC=m
CONFIG_DRM_PANEL_SIMPLE=m CONFIG_DRM_PANEL_SIMPLE=m
CONFIG_DRM_TI_TFP410=m CONFIG_DRM_TI_TFP410=m
CONFIG_DRM_PANEL_LG_LB035Q02=m
CONFIG_DRM_PANEL_NEC_NL8048HL11=m
CONFIG_DRM_PANEL_SHARP_LS037V7DW01=m
CONFIG_DRM_PANEL_SONY_ACX565AKM=m
CONFIG_DRM_PANEL_TPO_TD028TTEC1=m
CONFIG_DRM_PANEL_TPO_TD043MTEA1=m
CONFIG_FB=y CONFIG_FB=y
CONFIG_FIRMWARE_EDID=y CONFIG_FIRMWARE_EDID=y
CONFIG_FB_MODE_HELPERS=y CONFIG_FB_MODE_HELPERS=y

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@ -581,7 +581,6 @@ CONFIG_USB_SERIAL_XIRCOM=m
CONFIG_USB_SERIAL_OMNINET=m CONFIG_USB_SERIAL_OMNINET=m
CONFIG_USB_EMI62=m CONFIG_USB_EMI62=m
CONFIG_USB_EMI26=m CONFIG_USB_EMI26=m
CONFIG_USB_RIO500=m
CONFIG_USB_LEGOTOWER=m CONFIG_USB_LEGOTOWER=m
CONFIG_USB_LCD=m CONFIG_USB_LCD=m
CONFIG_USB_CYTHERM=m CONFIG_USB_CYTHERM=m

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@ -327,7 +327,6 @@ CONFIG_USB_EMI62=m
CONFIG_USB_EMI26=m CONFIG_USB_EMI26=m
CONFIG_USB_ADUTUX=m CONFIG_USB_ADUTUX=m
CONFIG_USB_SEVSEG=m CONFIG_USB_SEVSEG=m
CONFIG_USB_RIO500=m
CONFIG_USB_LEGOTOWER=m CONFIG_USB_LEGOTOWER=m
CONFIG_USB_LCD=m CONFIG_USB_LCD=m
CONFIG_USB_CYPRESS_CY7C63=m CONFIG_USB_CYPRESS_CY7C63=m

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@ -189,7 +189,6 @@ CONFIG_USB_SERIAL_XIRCOM=m
CONFIG_USB_SERIAL_OMNINET=m CONFIG_USB_SERIAL_OMNINET=m
CONFIG_USB_EMI62=m CONFIG_USB_EMI62=m
CONFIG_USB_EMI26=m CONFIG_USB_EMI26=m
CONFIG_USB_RIO500=m
CONFIG_USB_LEGOTOWER=m CONFIG_USB_LEGOTOWER=m
CONFIG_USB_LCD=m CONFIG_USB_LCD=m
CONFIG_USB_CYTHERM=m CONFIG_USB_CYTHERM=m

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@ -98,6 +98,7 @@ config CRYPTO_AES_ARM_CE
tristate "Accelerated AES using ARMv8 Crypto Extensions" tristate "Accelerated AES using ARMv8 Crypto Extensions"
depends on KERNEL_MODE_NEON depends on KERNEL_MODE_NEON
select CRYPTO_BLKCIPHER select CRYPTO_BLKCIPHER
select CRYPTO_LIB_AES
select CRYPTO_SIMD select CRYPTO_SIMD
help help
Use an implementation of AES in CBC, CTR and XTS modes that uses Use an implementation of AES in CBC, CTR and XTS modes that uses

View File

@ -9,6 +9,7 @@
#include <asm/assembler.h> #include <asm/assembler.h>
.text .text
.arch armv8-a
.fpu crypto-neon-fp-armv8 .fpu crypto-neon-fp-armv8
.align 3 .align 3

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@ -82,7 +82,7 @@
#ifndef __ASSEMBLY__ #ifndef __ASSEMBLY__
#ifdef CONFIG_CPU_CP15_MMU #ifdef CONFIG_CPU_CP15_MMU
static inline unsigned int get_domain(void) static __always_inline unsigned int get_domain(void)
{ {
unsigned int domain; unsigned int domain;
@ -94,7 +94,7 @@ static inline unsigned int get_domain(void)
return domain; return domain;
} }
static inline void set_domain(unsigned val) static __always_inline void set_domain(unsigned int val)
{ {
asm volatile( asm volatile(
"mcr p15, 0, %0, c3, c0 @ set domain" "mcr p15, 0, %0, c3, c0 @ set domain"
@ -102,12 +102,12 @@ static inline void set_domain(unsigned val)
isb(); isb();
} }
#else #else
static inline unsigned int get_domain(void) static __always_inline unsigned int get_domain(void)
{ {
return 0; return 0;
} }
static inline void set_domain(unsigned val) static __always_inline void set_domain(unsigned int val)
{ {
} }
#endif #endif

View File

@ -22,7 +22,7 @@
* perform such accesses (eg, via list poison values) which could then * perform such accesses (eg, via list poison values) which could then
* be exploited for priviledge escalation. * be exploited for priviledge escalation.
*/ */
static inline unsigned int uaccess_save_and_enable(void) static __always_inline unsigned int uaccess_save_and_enable(void)
{ {
#ifdef CONFIG_CPU_SW_DOMAIN_PAN #ifdef CONFIG_CPU_SW_DOMAIN_PAN
unsigned int old_domain = get_domain(); unsigned int old_domain = get_domain();
@ -37,7 +37,7 @@ static inline unsigned int uaccess_save_and_enable(void)
#endif #endif
} }
static inline void uaccess_restore(unsigned int flags) static __always_inline void uaccess_restore(unsigned int flags)
{ {
#ifdef CONFIG_CPU_SW_DOMAIN_PAN #ifdef CONFIG_CPU_SW_DOMAIN_PAN
/* Restore the user access mask */ /* Restore the user access mask */

View File

@ -68,7 +68,7 @@ ENDPROC(__vet_atags)
* The following fragment of code is executed with the MMU on in MMU mode, * The following fragment of code is executed with the MMU on in MMU mode,
* and uses absolute addresses; this is not position independent. * and uses absolute addresses; this is not position independent.
* *
* r0 = cp#15 control register * r0 = cp#15 control register (exc_ret for M-class)
* r1 = machine ID * r1 = machine ID
* r2 = atags/dtb pointer * r2 = atags/dtb pointer
* r9 = processor ID * r9 = processor ID
@ -137,7 +137,8 @@ __mmap_switched_data:
#ifdef CONFIG_CPU_CP15 #ifdef CONFIG_CPU_CP15
.long cr_alignment @ r3 .long cr_alignment @ r3
#else #else
.long 0 @ r3 M_CLASS(.long exc_ret) @ r3
AR_CLASS(.long 0) @ r3
#endif #endif
.size __mmap_switched_data, . - __mmap_switched_data .size __mmap_switched_data, . - __mmap_switched_data

View File

@ -201,6 +201,8 @@ M_CLASS(streq r3, [r12, #PMSAv8_MAIR1])
bic r0, r0, #V7M_SCB_CCR_IC bic r0, r0, #V7M_SCB_CCR_IC
#endif #endif
str r0, [r12, V7M_SCB_CCR] str r0, [r12, V7M_SCB_CCR]
/* Pass exc_ret to __mmap_switched */
mov r0, r10
#endif /* CONFIG_CPU_CP15 elif CONFIG_CPU_V7M */ #endif /* CONFIG_CPU_CP15 elif CONFIG_CPU_V7M */
ret lr ret lr
ENDPROC(__after_proc_init) ENDPROC(__after_proc_init)

View File

@ -462,8 +462,8 @@ static s8 dm365_queue_priority_mapping[][2] = {
}; };
static const struct dma_slave_map dm365_edma_map[] = { static const struct dma_slave_map dm365_edma_map[] = {
{ "davinci-mcbsp.0", "tx", EDMA_FILTER_PARAM(0, 2) }, { "davinci-mcbsp", "tx", EDMA_FILTER_PARAM(0, 2) },
{ "davinci-mcbsp.0", "rx", EDMA_FILTER_PARAM(0, 3) }, { "davinci-mcbsp", "rx", EDMA_FILTER_PARAM(0, 3) },
{ "davinci_voicecodec", "tx", EDMA_FILTER_PARAM(0, 2) }, { "davinci_voicecodec", "tx", EDMA_FILTER_PARAM(0, 2) },
{ "davinci_voicecodec", "rx", EDMA_FILTER_PARAM(0, 3) }, { "davinci_voicecodec", "rx", EDMA_FILTER_PARAM(0, 3) },
{ "spi_davinci.2", "tx", EDMA_FILTER_PARAM(0, 10) }, { "spi_davinci.2", "tx", EDMA_FILTER_PARAM(0, 10) },

View File

@ -89,6 +89,13 @@ static struct iommu_platform_data omap3_iommu_pdata = {
.reset_name = "mmu", .reset_name = "mmu",
.assert_reset = omap_device_assert_hardreset, .assert_reset = omap_device_assert_hardreset,
.deassert_reset = omap_device_deassert_hardreset, .deassert_reset = omap_device_deassert_hardreset,
.device_enable = omap_device_enable,
.device_idle = omap_device_idle,
};
static struct iommu_platform_data omap3_iommu_isp_pdata = {
.device_enable = omap_device_enable,
.device_idle = omap_device_idle,
}; };
static int omap3_sbc_t3730_twl_callback(struct device *dev, static int omap3_sbc_t3730_twl_callback(struct device *dev,
@ -424,6 +431,8 @@ static struct iommu_platform_data omap4_iommu_pdata = {
.reset_name = "mmu_cache", .reset_name = "mmu_cache",
.assert_reset = omap_device_assert_hardreset, .assert_reset = omap_device_assert_hardreset,
.deassert_reset = omap_device_deassert_hardreset, .deassert_reset = omap_device_deassert_hardreset,
.device_enable = omap_device_enable,
.device_idle = omap_device_idle,
}; };
#endif #endif
@ -617,6 +626,8 @@ static struct of_dev_auxdata omap_auxdata_lookup[] = {
#ifdef CONFIG_ARCH_OMAP3 #ifdef CONFIG_ARCH_OMAP3
OF_DEV_AUXDATA("ti,omap2-iommu", 0x5d000000, "5d000000.mmu", OF_DEV_AUXDATA("ti,omap2-iommu", 0x5d000000, "5d000000.mmu",
&omap3_iommu_pdata), &omap3_iommu_pdata),
OF_DEV_AUXDATA("ti,omap2-iommu", 0x480bd400, "480bd400.mmu",
&omap3_iommu_isp_pdata),
OF_DEV_AUXDATA("ti,omap3-smartreflex-core", 0x480cb000, OF_DEV_AUXDATA("ti,omap3-smartreflex-core", 0x480cb000,
"480cb000.smartreflex", &omap_sr_pdata[OMAP_SR_CORE]), "480cb000.smartreflex", &omap_sr_pdata[OMAP_SR_CORE]),
OF_DEV_AUXDATA("ti,omap3-smartreflex-mpu-iva", 0x480c9000, OF_DEV_AUXDATA("ti,omap3-smartreflex-mpu-iva", 0x480c9000,

View File

@ -324,7 +324,7 @@ union offset_union {
__put32_unaligned_check("strbt", val, addr) __put32_unaligned_check("strbt", val, addr)
static void static void
do_alignment_finish_ldst(unsigned long addr, unsigned long instr, struct pt_regs *regs, union offset_union offset) do_alignment_finish_ldst(unsigned long addr, u32 instr, struct pt_regs *regs, union offset_union offset)
{ {
if (!LDST_U_BIT(instr)) if (!LDST_U_BIT(instr))
offset.un = -offset.un; offset.un = -offset.un;
@ -337,7 +337,7 @@ do_alignment_finish_ldst(unsigned long addr, unsigned long instr, struct pt_regs
} }
static int static int
do_alignment_ldrhstrh(unsigned long addr, unsigned long instr, struct pt_regs *regs) do_alignment_ldrhstrh(unsigned long addr, u32 instr, struct pt_regs *regs)
{ {
unsigned int rd = RD_BITS(instr); unsigned int rd = RD_BITS(instr);
@ -386,8 +386,7 @@ do_alignment_ldrhstrh(unsigned long addr, unsigned long instr, struct pt_regs *r
} }
static int static int
do_alignment_ldrdstrd(unsigned long addr, unsigned long instr, do_alignment_ldrdstrd(unsigned long addr, u32 instr, struct pt_regs *regs)
struct pt_regs *regs)
{ {
unsigned int rd = RD_BITS(instr); unsigned int rd = RD_BITS(instr);
unsigned int rd2; unsigned int rd2;
@ -449,7 +448,7 @@ do_alignment_ldrdstrd(unsigned long addr, unsigned long instr,
} }
static int static int
do_alignment_ldrstr(unsigned long addr, unsigned long instr, struct pt_regs *regs) do_alignment_ldrstr(unsigned long addr, u32 instr, struct pt_regs *regs)
{ {
unsigned int rd = RD_BITS(instr); unsigned int rd = RD_BITS(instr);
@ -498,7 +497,7 @@ do_alignment_ldrstr(unsigned long addr, unsigned long instr, struct pt_regs *reg
* PU = 10 A B * PU = 10 A B
*/ */
static int static int
do_alignment_ldmstm(unsigned long addr, unsigned long instr, struct pt_regs *regs) do_alignment_ldmstm(unsigned long addr, u32 instr, struct pt_regs *regs)
{ {
unsigned int rd, rn, correction, nr_regs, regbits; unsigned int rd, rn, correction, nr_regs, regbits;
unsigned long eaddr, newaddr; unsigned long eaddr, newaddr;
@ -539,7 +538,7 @@ do_alignment_ldmstm(unsigned long addr, unsigned long instr, struct pt_regs *reg
* processor for us. * processor for us.
*/ */
if (addr != eaddr) { if (addr != eaddr) {
pr_err("LDMSTM: PC = %08lx, instr = %08lx, " pr_err("LDMSTM: PC = %08lx, instr = %08x, "
"addr = %08lx, eaddr = %08lx\n", "addr = %08lx, eaddr = %08lx\n",
instruction_pointer(regs), instr, addr, eaddr); instruction_pointer(regs), instr, addr, eaddr);
show_regs(regs); show_regs(regs);
@ -716,10 +715,10 @@ thumb2arm(u16 tinstr)
* 2. Register name Rt from ARMv7 is same as Rd from ARMv6 (Rd is Rt) * 2. Register name Rt from ARMv7 is same as Rd from ARMv6 (Rd is Rt)
*/ */
static void * static void *
do_alignment_t32_to_handler(unsigned long *pinstr, struct pt_regs *regs, do_alignment_t32_to_handler(u32 *pinstr, struct pt_regs *regs,
union offset_union *poffset) union offset_union *poffset)
{ {
unsigned long instr = *pinstr; u32 instr = *pinstr;
u16 tinst1 = (instr >> 16) & 0xffff; u16 tinst1 = (instr >> 16) & 0xffff;
u16 tinst2 = instr & 0xffff; u16 tinst2 = instr & 0xffff;
@ -767,17 +766,48 @@ do_alignment_t32_to_handler(unsigned long *pinstr, struct pt_regs *regs,
return NULL; return NULL;
} }
static int alignment_get_arm(struct pt_regs *regs, u32 *ip, u32 *inst)
{
u32 instr = 0;
int fault;
if (user_mode(regs))
fault = get_user(instr, ip);
else
fault = probe_kernel_address(ip, instr);
*inst = __mem_to_opcode_arm(instr);
return fault;
}
static int alignment_get_thumb(struct pt_regs *regs, u16 *ip, u16 *inst)
{
u16 instr = 0;
int fault;
if (user_mode(regs))
fault = get_user(instr, ip);
else
fault = probe_kernel_address(ip, instr);
*inst = __mem_to_opcode_thumb16(instr);
return fault;
}
static int static int
do_alignment(unsigned long addr, unsigned int fsr, struct pt_regs *regs) do_alignment(unsigned long addr, unsigned int fsr, struct pt_regs *regs)
{ {
union offset_union uninitialized_var(offset); union offset_union uninitialized_var(offset);
unsigned long instr = 0, instrptr; unsigned long instrptr;
int (*handler)(unsigned long addr, unsigned long instr, struct pt_regs *regs); int (*handler)(unsigned long addr, u32 instr, struct pt_regs *regs);
unsigned int type; unsigned int type;
unsigned int fault; u32 instr = 0;
u16 tinstr = 0; u16 tinstr = 0;
int isize = 4; int isize = 4;
int thumb2_32b = 0; int thumb2_32b = 0;
int fault;
if (interrupts_enabled(regs)) if (interrupts_enabled(regs))
local_irq_enable(); local_irq_enable();
@ -786,15 +816,14 @@ do_alignment(unsigned long addr, unsigned int fsr, struct pt_regs *regs)
if (thumb_mode(regs)) { if (thumb_mode(regs)) {
u16 *ptr = (u16 *)(instrptr & ~1); u16 *ptr = (u16 *)(instrptr & ~1);
fault = probe_kernel_address(ptr, tinstr);
tinstr = __mem_to_opcode_thumb16(tinstr); fault = alignment_get_thumb(regs, ptr, &tinstr);
if (!fault) { if (!fault) {
if (cpu_architecture() >= CPU_ARCH_ARMv7 && if (cpu_architecture() >= CPU_ARCH_ARMv7 &&
IS_T32(tinstr)) { IS_T32(tinstr)) {
/* Thumb-2 32-bit */ /* Thumb-2 32-bit */
u16 tinst2 = 0; u16 tinst2;
fault = probe_kernel_address(ptr + 1, tinst2); fault = alignment_get_thumb(regs, ptr + 1, &tinst2);
tinst2 = __mem_to_opcode_thumb16(tinst2);
instr = __opcode_thumb32_compose(tinstr, tinst2); instr = __opcode_thumb32_compose(tinstr, tinst2);
thumb2_32b = 1; thumb2_32b = 1;
} else { } else {
@ -803,8 +832,7 @@ do_alignment(unsigned long addr, unsigned int fsr, struct pt_regs *regs)
} }
} }
} else { } else {
fault = probe_kernel_address((void *)instrptr, instr); fault = alignment_get_arm(regs, (void *)instrptr, &instr);
instr = __mem_to_opcode_arm(instr);
} }
if (fault) { if (fault) {
@ -926,7 +954,7 @@ do_alignment(unsigned long addr, unsigned int fsr, struct pt_regs *regs)
* Oops, we didn't handle the instruction. * Oops, we didn't handle the instruction.
*/ */
pr_err("Alignment trap: not handling instruction " pr_err("Alignment trap: not handling instruction "
"%0*lx at [<%08lx>]\n", "%0*x at [<%08lx>]\n",
isize << 1, isize << 1,
isize == 2 ? tinstr : instr, instrptr); isize == 2 ? tinstr : instr, instrptr);
ai_skipped += 1; ai_skipped += 1;
@ -936,7 +964,7 @@ do_alignment(unsigned long addr, unsigned int fsr, struct pt_regs *regs)
ai_user += 1; ai_user += 1;
if (ai_usermode & UM_WARN) if (ai_usermode & UM_WARN)
printk("Alignment trap: %s (%d) PC=0x%08lx Instr=0x%0*lx " printk("Alignment trap: %s (%d) PC=0x%08lx Instr=0x%0*x "
"Address=0x%08lx FSR 0x%03x\n", current->comm, "Address=0x%08lx FSR 0x%03x\n", current->comm,
task_pid_nr(current), instrptr, task_pid_nr(current), instrptr,
isize << 1, isize << 1,

View File

@ -132,13 +132,11 @@ __v7m_setup_cont:
dsb dsb
mov r6, lr @ save LR mov r6, lr @ save LR
ldr sp, =init_thread_union + THREAD_START_SP ldr sp, =init_thread_union + THREAD_START_SP
stmia sp, {r0-r3, r12}
cpsie i cpsie i
svc #0 svc #0
1: cpsid i 1: cpsid i
ldr r0, =exc_ret /* Calculate exc_ret */
orr lr, lr, #EXC_RET_THREADMODE_PROCESSSTACK orr r10, lr, #EXC_RET_THREADMODE_PROCESSSTACK
str lr, [r0]
ldmia sp, {r0-r3, r12} ldmia sp, {r0-r3, r12}
str r5, [r12, #11 * 4] @ restore the original SVC vector entry str r5, [r12, #11 * 4] @ restore the original SVC vector entry
mov lr, r6 @ restore LR mov lr, r6 @ restore LR

View File

@ -110,7 +110,6 @@ config ARM64
select GENERIC_STRNLEN_USER select GENERIC_STRNLEN_USER
select GENERIC_TIME_VSYSCALL select GENERIC_TIME_VSYSCALL
select GENERIC_GETTIMEOFDAY select GENERIC_GETTIMEOFDAY
select GENERIC_COMPAT_VDSO if (!CPU_BIG_ENDIAN && COMPAT)
select HANDLE_DOMAIN_IRQ select HANDLE_DOMAIN_IRQ
select HARDIRQS_SW_RESEND select HARDIRQS_SW_RESEND
select HAVE_PCI select HAVE_PCI
@ -617,6 +616,23 @@ config CAVIUM_ERRATUM_30115
If unsure, say Y. If unsure, say Y.
config CAVIUM_TX2_ERRATUM_219
bool "Cavium ThunderX2 erratum 219: PRFM between TTBR change and ISB fails"
default y
help
On Cavium ThunderX2, a load, store or prefetch instruction between a
TTBR update and the corresponding context synchronizing operation can
cause a spurious Data Abort to be delivered to any hardware thread in
the CPU core.
Work around the issue by avoiding the problematic code sequence and
trapping KVM guest TTBRx_EL1 writes to EL2 when SMT is enabled. The
trap handler performs the corresponding register access, skips the
instruction and ensures context synchronization by virtue of the
exception return.
If unsure, say Y.
config QCOM_FALKOR_ERRATUM_1003 config QCOM_FALKOR_ERRATUM_1003
bool "Falkor E1003: Incorrect translation due to ASID change" bool "Falkor E1003: Incorrect translation due to ASID change"
default y default y
@ -1159,7 +1175,7 @@ menuconfig COMPAT
if COMPAT if COMPAT
config KUSER_HELPERS config KUSER_HELPERS
bool "Enable kuser helpers page for 32 bit applications" bool "Enable kuser helpers page for 32-bit applications"
default y default y
help help
Warning: disabling this option may break 32-bit user programs. Warning: disabling this option may break 32-bit user programs.
@ -1185,6 +1201,18 @@ config KUSER_HELPERS
Say N here only if you are absolutely certain that you do not Say N here only if you are absolutely certain that you do not
need these helpers; otherwise, the safe option is to say Y. need these helpers; otherwise, the safe option is to say Y.
config COMPAT_VDSO
bool "Enable vDSO for 32-bit applications"
depends on !CPU_BIG_ENDIAN && "$(CROSS_COMPILE_COMPAT)" != ""
select GENERIC_COMPAT_VDSO
default y
help
Place in the process address space of 32-bit applications an
ELF shared object providing fast implementations of gettimeofday
and clock_gettime.
You must have a 32-bit build of glibc 2.22 or later for programs
to seamlessly take advantage of this.
menuconfig ARMV8_DEPRECATED menuconfig ARMV8_DEPRECATED
bool "Emulate deprecated/obsolete ARMv8 instructions" bool "Emulate deprecated/obsolete ARMv8 instructions"

View File

@ -53,22 +53,6 @@ $(warning Detected assembler with broken .inst; disassembly will be unreliable)
endif endif
endif endif
ifeq ($(CONFIG_GENERIC_COMPAT_VDSO), y)
CROSS_COMPILE_COMPAT ?= $(CONFIG_CROSS_COMPILE_COMPAT_VDSO:"%"=%)
ifeq ($(CONFIG_CC_IS_CLANG), y)
$(warning CROSS_COMPILE_COMPAT is clang, the compat vDSO will not be built)
else ifeq ($(strip $(CROSS_COMPILE_COMPAT)),)
$(warning CROSS_COMPILE_COMPAT not defined or empty, the compat vDSO will not be built)
else ifeq ($(shell which $(CROSS_COMPILE_COMPAT)gcc 2> /dev/null),)
$(error $(CROSS_COMPILE_COMPAT)gcc not found, check CROSS_COMPILE_COMPAT)
else
export CROSS_COMPILE_COMPAT
export CONFIG_COMPAT_VDSO := y
compat_vdso := -DCONFIG_COMPAT_VDSO=1
endif
endif
KBUILD_CFLAGS += -mgeneral-regs-only $(lseinstr) $(brokengasinst) \ KBUILD_CFLAGS += -mgeneral-regs-only $(lseinstr) $(brokengasinst) \
$(compat_vdso) $(cc_has_k_constraint) $(compat_vdso) $(cc_has_k_constraint)
KBUILD_CFLAGS += -fno-asynchronous-unwind-tables KBUILD_CFLAGS += -fno-asynchronous-unwind-tables

View File

@ -63,3 +63,12 @@ ext_rgmii_phy: ethernet-phy@1 {
reg = <1>; reg = <1>;
}; };
}; };
&reg_dc1sw {
/*
* Ethernet PHY needs 30ms to properly power up and some more
* to initialize. 100ms should be plenty of time to finish
* whole process.
*/
regulator-enable-ramp-delay = <100000>;
};

View File

@ -104,6 +104,7 @@ &dai {
&ehci0 { &ehci0 {
phys = <&usbphy 0>; phys = <&usbphy 0>;
phy-names = "usb";
status = "okay"; status = "okay";
}; };
@ -150,6 +151,7 @@ &mmc2 {
&ohci0 { &ohci0 {
phys = <&usbphy 0>; phys = <&usbphy 0>;
phy-names = "usb";
status = "okay"; status = "okay";
}; };

View File

@ -159,6 +159,12 @@ &ohci1 {
}; };
&reg_dc1sw { &reg_dc1sw {
/*
* Ethernet PHY needs 30ms to properly power up and some more
* to initialize. 100ms should be plenty of time to finish
* whole process.
*/
regulator-enable-ramp-delay = <100000>;
regulator-name = "vcc-phy"; regulator-name = "vcc-phy";
}; };

View File

@ -142,15 +142,6 @@ osc32k: osc32k_clk {
clock-output-names = "ext-osc32k"; clock-output-names = "ext-osc32k";
}; };
pmu {
compatible = "arm,cortex-a53-pmu";
interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>;
};
psci { psci {
compatible = "arm,psci-0.2"; compatible = "arm,psci-0.2";
method = "smc"; method = "smc";
@ -553,6 +544,7 @@ ehci1: usb@1c1b000 {
resets = <&ccu RST_BUS_OHCI1>, resets = <&ccu RST_BUS_OHCI1>,
<&ccu RST_BUS_EHCI1>; <&ccu RST_BUS_EHCI1>;
phys = <&usbphy 1>; phys = <&usbphy 1>;
phy-names = "usb";
status = "disabled"; status = "disabled";
}; };
@ -564,6 +556,7 @@ ohci1: usb@1c1b400 {
<&ccu CLK_USB_OHCI1>; <&ccu CLK_USB_OHCI1>;
resets = <&ccu RST_BUS_OHCI1>; resets = <&ccu RST_BUS_OHCI1>;
phys = <&usbphy 1>; phys = <&usbphy 1>;
phy-names = "usb";
status = "disabled"; status = "disabled";
}; };

View File

@ -547,6 +547,7 @@ ehci3: usb@5311000 {
resets = <&ccu RST_BUS_OHCI3>, resets = <&ccu RST_BUS_OHCI3>,
<&ccu RST_BUS_EHCI3>; <&ccu RST_BUS_EHCI3>;
phys = <&usb2phy 3>; phys = <&usb2phy 3>;
phy-names = "usb";
status = "disabled"; status = "disabled";
}; };
@ -558,6 +559,7 @@ ohci3: usb@5311400 {
<&ccu CLK_USB_OHCI3>; <&ccu CLK_USB_OHCI3>;
resets = <&ccu RST_BUS_OHCI3>; resets = <&ccu RST_BUS_OHCI3>;
phys = <&usb2phy 3>; phys = <&usb2phy 3>;
phy-names = "usb";
status = "disabled"; status = "disabled";
}; };

View File

@ -42,13 +42,14 @@ pinconf: pinconf@140000 {
pinmux: pinmux@14029c { pinmux: pinmux@14029c {
compatible = "pinctrl-single"; compatible = "pinctrl-single";
reg = <0x0014029c 0x250>; reg = <0x0014029c 0x26c>;
#address-cells = <1>; #address-cells = <1>;
#size-cells = <1>; #size-cells = <1>;
pinctrl-single,register-width = <32>; pinctrl-single,register-width = <32>;
pinctrl-single,function-mask = <0xf>; pinctrl-single,function-mask = <0xf>;
pinctrl-single,gpio-range = < pinctrl-single,gpio-range = <
&range 0 154 MODE_GPIO &range 0 91 MODE_GPIO
&range 95 60 MODE_GPIO
>; >;
range: gpio-range { range: gpio-range {
#pinctrl-single,gpio-range-cells = <3>; #pinctrl-single,gpio-range-cells = <3>;

View File

@ -464,8 +464,7 @@ gpio_hsls: gpio@d0000 {
<&pinmux 108 16 27>, <&pinmux 108 16 27>,
<&pinmux 135 77 6>, <&pinmux 135 77 6>,
<&pinmux 141 67 4>, <&pinmux 141 67 4>,
<&pinmux 145 149 6>, <&pinmux 145 149 6>;
<&pinmux 151 91 4>;
}; };
i2c1: i2c@e0000 { i2c1: i2c@e0000 {

View File

@ -33,7 +33,7 @@ cpu@0 {
i-cache-line-size = <64>; i-cache-line-size = <64>;
i-cache-sets = <192>; i-cache-sets = <192>;
next-level-cache = <&cluster0_l2>; next-level-cache = <&cluster0_l2>;
cpu-idle-states = <&cpu_pw20>; cpu-idle-states = <&cpu_pw15>;
}; };
cpu@1 { cpu@1 {
@ -49,7 +49,7 @@ cpu@1 {
i-cache-line-size = <64>; i-cache-line-size = <64>;
i-cache-sets = <192>; i-cache-sets = <192>;
next-level-cache = <&cluster0_l2>; next-level-cache = <&cluster0_l2>;
cpu-idle-states = <&cpu_pw20>; cpu-idle-states = <&cpu_pw15>;
}; };
cpu@100 { cpu@100 {
@ -65,7 +65,7 @@ cpu@100 {
i-cache-line-size = <64>; i-cache-line-size = <64>;
i-cache-sets = <192>; i-cache-sets = <192>;
next-level-cache = <&cluster1_l2>; next-level-cache = <&cluster1_l2>;
cpu-idle-states = <&cpu_pw20>; cpu-idle-states = <&cpu_pw15>;
}; };
cpu@101 { cpu@101 {
@ -81,7 +81,7 @@ cpu@101 {
i-cache-line-size = <64>; i-cache-line-size = <64>;
i-cache-sets = <192>; i-cache-sets = <192>;
next-level-cache = <&cluster1_l2>; next-level-cache = <&cluster1_l2>;
cpu-idle-states = <&cpu_pw20>; cpu-idle-states = <&cpu_pw15>;
}; };
cpu@200 { cpu@200 {
@ -97,7 +97,7 @@ cpu@200 {
i-cache-line-size = <64>; i-cache-line-size = <64>;
i-cache-sets = <192>; i-cache-sets = <192>;
next-level-cache = <&cluster2_l2>; next-level-cache = <&cluster2_l2>;
cpu-idle-states = <&cpu_pw20>; cpu-idle-states = <&cpu_pw15>;
}; };
cpu@201 { cpu@201 {
@ -113,7 +113,7 @@ cpu@201 {
i-cache-line-size = <64>; i-cache-line-size = <64>;
i-cache-sets = <192>; i-cache-sets = <192>;
next-level-cache = <&cluster2_l2>; next-level-cache = <&cluster2_l2>;
cpu-idle-states = <&cpu_pw20>; cpu-idle-states = <&cpu_pw15>;
}; };
cpu@300 { cpu@300 {
@ -129,7 +129,7 @@ cpu@300 {
i-cache-line-size = <64>; i-cache-line-size = <64>;
i-cache-sets = <192>; i-cache-sets = <192>;
next-level-cache = <&cluster3_l2>; next-level-cache = <&cluster3_l2>;
cpu-idle-states = <&cpu_pw20>; cpu-idle-states = <&cpu_pw15>;
}; };
cpu@301 { cpu@301 {
@ -145,7 +145,7 @@ cpu@301 {
i-cache-line-size = <64>; i-cache-line-size = <64>;
i-cache-sets = <192>; i-cache-sets = <192>;
next-level-cache = <&cluster3_l2>; next-level-cache = <&cluster3_l2>;
cpu-idle-states = <&cpu_pw20>; cpu-idle-states = <&cpu_pw15>;
}; };
cpu@400 { cpu@400 {
@ -161,7 +161,7 @@ cpu@400 {
i-cache-line-size = <64>; i-cache-line-size = <64>;
i-cache-sets = <192>; i-cache-sets = <192>;
next-level-cache = <&cluster4_l2>; next-level-cache = <&cluster4_l2>;
cpu-idle-states = <&cpu_pw20>; cpu-idle-states = <&cpu_pw15>;
}; };
cpu@401 { cpu@401 {
@ -177,7 +177,7 @@ cpu@401 {
i-cache-line-size = <64>; i-cache-line-size = <64>;
i-cache-sets = <192>; i-cache-sets = <192>;
next-level-cache = <&cluster4_l2>; next-level-cache = <&cluster4_l2>;
cpu-idle-states = <&cpu_pw20>; cpu-idle-states = <&cpu_pw15>;
}; };
cpu@500 { cpu@500 {
@ -193,7 +193,7 @@ cpu@500 {
i-cache-line-size = <64>; i-cache-line-size = <64>;
i-cache-sets = <192>; i-cache-sets = <192>;
next-level-cache = <&cluster5_l2>; next-level-cache = <&cluster5_l2>;
cpu-idle-states = <&cpu_pw20>; cpu-idle-states = <&cpu_pw15>;
}; };
cpu@501 { cpu@501 {
@ -209,7 +209,7 @@ cpu@501 {
i-cache-line-size = <64>; i-cache-line-size = <64>;
i-cache-sets = <192>; i-cache-sets = <192>;
next-level-cache = <&cluster5_l2>; next-level-cache = <&cluster5_l2>;
cpu-idle-states = <&cpu_pw20>; cpu-idle-states = <&cpu_pw15>;
}; };
cpu@600 { cpu@600 {
@ -225,7 +225,7 @@ cpu@600 {
i-cache-line-size = <64>; i-cache-line-size = <64>;
i-cache-sets = <192>; i-cache-sets = <192>;
next-level-cache = <&cluster6_l2>; next-level-cache = <&cluster6_l2>;
cpu-idle-states = <&cpu_pw20>; cpu-idle-states = <&cpu_pw15>;
}; };
cpu@601 { cpu@601 {
@ -241,7 +241,7 @@ cpu@601 {
i-cache-line-size = <64>; i-cache-line-size = <64>;
i-cache-sets = <192>; i-cache-sets = <192>;
next-level-cache = <&cluster6_l2>; next-level-cache = <&cluster6_l2>;
cpu-idle-states = <&cpu_pw20>; cpu-idle-states = <&cpu_pw15>;
}; };
cpu@700 { cpu@700 {
@ -257,7 +257,7 @@ cpu@700 {
i-cache-line-size = <64>; i-cache-line-size = <64>;
i-cache-sets = <192>; i-cache-sets = <192>;
next-level-cache = <&cluster7_l2>; next-level-cache = <&cluster7_l2>;
cpu-idle-states = <&cpu_pw20>; cpu-idle-states = <&cpu_pw15>;
}; };
cpu@701 { cpu@701 {
@ -273,7 +273,7 @@ cpu@701 {
i-cache-line-size = <64>; i-cache-line-size = <64>;
i-cache-sets = <192>; i-cache-sets = <192>;
next-level-cache = <&cluster7_l2>; next-level-cache = <&cluster7_l2>;
cpu-idle-states = <&cpu_pw20>; cpu-idle-states = <&cpu_pw15>;
}; };
cluster0_l2: l2-cache0 { cluster0_l2: l2-cache0 {
@ -340,9 +340,9 @@ cluster7_l2: l2-cache7 {
cache-level = <2>; cache-level = <2>;
}; };
cpu_pw20: cpu-pw20 { cpu_pw15: cpu-pw15 {
compatible = "arm,idle-state"; compatible = "arm,idle-state";
idle-state-name = "PW20"; idle-state-name = "PW15";
arm,psci-suspend-param = <0x0>; arm,psci-suspend-param = <0x0>;
entry-latency-us = <2000>; entry-latency-us = <2000>;
exit-latency-us = <2000>; exit-latency-us = <2000>;

View File

@ -694,7 +694,7 @@ usdhc1: mmc@30b40000 {
compatible = "fsl,imx8mm-usdhc", "fsl,imx7d-usdhc"; compatible = "fsl,imx8mm-usdhc", "fsl,imx7d-usdhc";
reg = <0x30b40000 0x10000>; reg = <0x30b40000 0x10000>;
interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clk IMX8MM_CLK_DUMMY>, clocks = <&clk IMX8MM_CLK_IPG_ROOT>,
<&clk IMX8MM_CLK_NAND_USDHC_BUS>, <&clk IMX8MM_CLK_NAND_USDHC_BUS>,
<&clk IMX8MM_CLK_USDHC1_ROOT>; <&clk IMX8MM_CLK_USDHC1_ROOT>;
clock-names = "ipg", "ahb", "per"; clock-names = "ipg", "ahb", "per";
@ -710,7 +710,7 @@ usdhc2: mmc@30b50000 {
compatible = "fsl,imx8mm-usdhc", "fsl,imx7d-usdhc"; compatible = "fsl,imx8mm-usdhc", "fsl,imx7d-usdhc";
reg = <0x30b50000 0x10000>; reg = <0x30b50000 0x10000>;
interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clk IMX8MM_CLK_DUMMY>, clocks = <&clk IMX8MM_CLK_IPG_ROOT>,
<&clk IMX8MM_CLK_NAND_USDHC_BUS>, <&clk IMX8MM_CLK_NAND_USDHC_BUS>,
<&clk IMX8MM_CLK_USDHC2_ROOT>; <&clk IMX8MM_CLK_USDHC2_ROOT>;
clock-names = "ipg", "ahb", "per"; clock-names = "ipg", "ahb", "per";
@ -724,7 +724,7 @@ usdhc3: mmc@30b60000 {
compatible = "fsl,imx8mm-usdhc", "fsl,imx7d-usdhc"; compatible = "fsl,imx8mm-usdhc", "fsl,imx7d-usdhc";
reg = <0x30b60000 0x10000>; reg = <0x30b60000 0x10000>;
interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clk IMX8MM_CLK_DUMMY>, clocks = <&clk IMX8MM_CLK_IPG_ROOT>,
<&clk IMX8MM_CLK_NAND_USDHC_BUS>, <&clk IMX8MM_CLK_NAND_USDHC_BUS>,
<&clk IMX8MM_CLK_USDHC3_ROOT>; <&clk IMX8MM_CLK_USDHC3_ROOT>;
clock-names = "ipg", "ahb", "per"; clock-names = "ipg", "ahb", "per";

View File

@ -569,7 +569,7 @@ usdhc1: mmc@30b40000 {
compatible = "fsl,imx8mn-usdhc", "fsl,imx7d-usdhc"; compatible = "fsl,imx8mn-usdhc", "fsl,imx7d-usdhc";
reg = <0x30b40000 0x10000>; reg = <0x30b40000 0x10000>;
interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clk IMX8MN_CLK_DUMMY>, clocks = <&clk IMX8MN_CLK_IPG_ROOT>,
<&clk IMX8MN_CLK_NAND_USDHC_BUS>, <&clk IMX8MN_CLK_NAND_USDHC_BUS>,
<&clk IMX8MN_CLK_USDHC1_ROOT>; <&clk IMX8MN_CLK_USDHC1_ROOT>;
clock-names = "ipg", "ahb", "per"; clock-names = "ipg", "ahb", "per";
@ -585,7 +585,7 @@ usdhc2: mmc@30b50000 {
compatible = "fsl,imx8mn-usdhc", "fsl,imx7d-usdhc"; compatible = "fsl,imx8mn-usdhc", "fsl,imx7d-usdhc";
reg = <0x30b50000 0x10000>; reg = <0x30b50000 0x10000>;
interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clk IMX8MN_CLK_DUMMY>, clocks = <&clk IMX8MN_CLK_IPG_ROOT>,
<&clk IMX8MN_CLK_NAND_USDHC_BUS>, <&clk IMX8MN_CLK_NAND_USDHC_BUS>,
<&clk IMX8MN_CLK_USDHC2_ROOT>; <&clk IMX8MN_CLK_USDHC2_ROOT>;
clock-names = "ipg", "ahb", "per"; clock-names = "ipg", "ahb", "per";
@ -599,7 +599,7 @@ usdhc3: mmc@30b60000 {
compatible = "fsl,imx8mn-usdhc", "fsl,imx7d-usdhc"; compatible = "fsl,imx8mn-usdhc", "fsl,imx7d-usdhc";
reg = <0x30b60000 0x10000>; reg = <0x30b60000 0x10000>;
interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clk IMX8MN_CLK_DUMMY>, clocks = <&clk IMX8MN_CLK_IPG_ROOT>,
<&clk IMX8MN_CLK_NAND_USDHC_BUS>, <&clk IMX8MN_CLK_NAND_USDHC_BUS>,
<&clk IMX8MN_CLK_USDHC3_ROOT>; <&clk IMX8MN_CLK_USDHC3_ROOT>;
clock-names = "ipg", "ahb", "per"; clock-names = "ipg", "ahb", "per";

View File

@ -89,8 +89,8 @@ reg_arm: regulator-arm {
regulator-min-microvolt = <900000>; regulator-min-microvolt = <900000>;
regulator-max-microvolt = <1000000>; regulator-max-microvolt = <1000000>;
gpios = <&gpio3 19 GPIO_ACTIVE_HIGH>; gpios = <&gpio3 19 GPIO_ACTIVE_HIGH>;
states = <1000000 0x0 states = <1000000 0x1
900000 0x1>; 900000 0x0>;
regulator-always-on; regulator-always-on;
}; };
}; };

View File

@ -850,7 +850,7 @@ usdhc1: mmc@30b40000 {
"fsl,imx7d-usdhc"; "fsl,imx7d-usdhc";
reg = <0x30b40000 0x10000>; reg = <0x30b40000 0x10000>;
interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clk IMX8MQ_CLK_DUMMY>, clocks = <&clk IMX8MQ_CLK_IPG_ROOT>,
<&clk IMX8MQ_CLK_NAND_USDHC_BUS>, <&clk IMX8MQ_CLK_NAND_USDHC_BUS>,
<&clk IMX8MQ_CLK_USDHC1_ROOT>; <&clk IMX8MQ_CLK_USDHC1_ROOT>;
clock-names = "ipg", "ahb", "per"; clock-names = "ipg", "ahb", "per";
@ -867,7 +867,7 @@ usdhc2: mmc@30b50000 {
"fsl,imx7d-usdhc"; "fsl,imx7d-usdhc";
reg = <0x30b50000 0x10000>; reg = <0x30b50000 0x10000>;
interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clk IMX8MQ_CLK_DUMMY>, clocks = <&clk IMX8MQ_CLK_IPG_ROOT>,
<&clk IMX8MQ_CLK_NAND_USDHC_BUS>, <&clk IMX8MQ_CLK_NAND_USDHC_BUS>,
<&clk IMX8MQ_CLK_USDHC2_ROOT>; <&clk IMX8MQ_CLK_USDHC2_ROOT>;
clock-names = "ipg", "ahb", "per"; clock-names = "ipg", "ahb", "per";

View File

@ -60,11 +60,6 @@ exp_usb3_vbus: usb3-vbus {
gpio = <&gpiosb 0 GPIO_ACTIVE_HIGH>; gpio = <&gpiosb 0 GPIO_ACTIVE_HIGH>;
}; };
usb3_phy: usb3-phy {
compatible = "usb-nop-xceiv";
vcc-supply = <&exp_usb3_vbus>;
};
vsdc_reg: vsdc-reg { vsdc_reg: vsdc-reg {
compatible = "regulator-gpio"; compatible = "regulator-gpio";
regulator-name = "vsdc"; regulator-name = "vsdc";
@ -255,10 +250,16 @@ &usb2 {
status = "okay"; status = "okay";
}; };
&comphy2 {
connector {
compatible = "usb-a-connector";
phy-supply = <&exp_usb3_vbus>;
};
};
&usb3 { &usb3 {
status = "okay"; status = "okay";
phys = <&comphy2 0>; phys = <&comphy2 0>;
usb-phy = <&usb3_phy>;
}; };
&mdio { &mdio {

View File

@ -44,7 +44,7 @@ edp_panel: edp-panel {
power-supply = <&pp3300_disp>; power-supply = <&pp3300_disp>;
panel-timing { panel-timing {
clock-frequency = <266604720>; clock-frequency = <266666667>;
hactive = <2400>; hactive = <2400>;
hfront-porch = <48>; hfront-porch = <48>;
hback-porch = <84>; hback-porch = <84>;

View File

@ -644,7 +644,7 @@ &u2phy0 {
status = "okay"; status = "okay";
u2phy0_host: host-port { u2phy0_host: host-port {
phy-supply = <&vcc5v0_host>; phy-supply = <&vcc5v0_typec>;
status = "okay"; status = "okay";
}; };
@ -712,7 +712,7 @@ &usbdrd3_0 {
&usbdrd_dwc3_0 { &usbdrd_dwc3_0 {
status = "okay"; status = "okay";
dr_mode = "otg"; dr_mode = "host";
}; };
&usbdrd3_1 { &usbdrd3_1 {

View File

@ -173,7 +173,7 @@ vdd_log: vdd-log {
regulator-always-on; regulator-always-on;
regulator-boot-on; regulator-boot-on;
regulator-min-microvolt = <800000>; regulator-min-microvolt = <800000>;
regulator-max-microvolt = <1400000>; regulator-max-microvolt = <1700000>;
vin-supply = <&vcc5v0_sys>; vin-supply = <&vcc5v0_sys>;
}; };
}; };
@ -247,8 +247,8 @@ &i2c0 {
rk808: pmic@1b { rk808: pmic@1b {
compatible = "rockchip,rk808"; compatible = "rockchip,rk808";
reg = <0x1b>; reg = <0x1b>;
interrupt-parent = <&gpio1>; interrupt-parent = <&gpio3>;
interrupts = <21 IRQ_TYPE_LEVEL_LOW>; interrupts = <10 IRQ_TYPE_LEVEL_LOW>;
#clock-cells = <1>; #clock-cells = <1>;
clock-output-names = "xin32k", "rk808-clkout2"; clock-output-names = "xin32k", "rk808-clkout2";
pinctrl-names = "default"; pinctrl-names = "default";
@ -574,7 +574,7 @@ pcie_pwr_en: pcie-pwr-en {
pmic { pmic {
pmic_int_l: pmic-int-l { pmic_int_l: pmic-int-l {
rockchip,pins = <1 RK_PC5 RK_FUNC_GPIO &pcfg_pull_up>; rockchip,pins = <3 RK_PB2 RK_FUNC_GPIO &pcfg_pull_up>;
}; };
vsel1_gpio: vsel1-gpio { vsel1_gpio: vsel1-gpio {
@ -624,7 +624,6 @@ &saradc {
&sdmmc { &sdmmc {
bus-width = <4>; bus-width = <4>;
cap-mmc-highspeed;
cap-sd-highspeed; cap-sd-highspeed;
cd-gpios = <&gpio0 7 GPIO_ACTIVE_LOW>; cd-gpios = <&gpio0 7 GPIO_ACTIVE_LOW>;
disable-wp; disable-wp;
@ -636,8 +635,7 @@ &sdmmc {
&sdhci { &sdhci {
bus-width = <8>; bus-width = <8>;
mmc-hs400-1_8v; mmc-hs200-1_8v;
mmc-hs400-enhanced-strobe;
non-removable; non-removable;
status = "okay"; status = "okay";
}; };

View File

@ -78,10 +78,9 @@ alternative_else_nop_endif
/* /*
* Remove the address tag from a virtual address, if present. * Remove the address tag from a virtual address, if present.
*/ */
.macro clear_address_tag, dst, addr .macro untagged_addr, dst, addr
tst \addr, #(1 << 55) sbfx \dst, \addr, #0, #56
bic \dst, \addr, #(0xff << 56) and \dst, \dst, \addr
csel \dst, \dst, \addr, eq
.endm .endm
#endif #endif

View File

@ -321,7 +321,8 @@ static inline s64 __lse_atomic64_dec_if_positive(atomic64_t *v)
} }
#define __CMPXCHG_CASE(w, sfx, name, sz, mb, cl...) \ #define __CMPXCHG_CASE(w, sfx, name, sz, mb, cl...) \
static inline u##sz __lse__cmpxchg_case_##name##sz(volatile void *ptr, \ static __always_inline u##sz \
__lse__cmpxchg_case_##name##sz(volatile void *ptr, \
u##sz old, \ u##sz old, \
u##sz new) \ u##sz new) \
{ \ { \
@ -362,7 +363,8 @@ __CMPXCHG_CASE(x, , mb_, 64, al, "memory")
#undef __CMPXCHG_CASE #undef __CMPXCHG_CASE
#define __CMPXCHG_DBL(name, mb, cl...) \ #define __CMPXCHG_DBL(name, mb, cl...) \
static inline long __lse__cmpxchg_double##name(unsigned long old1, \ static __always_inline long \
__lse__cmpxchg_double##name(unsigned long old1, \
unsigned long old2, \ unsigned long old2, \
unsigned long new1, \ unsigned long new1, \
unsigned long new2, \ unsigned long new2, \

View File

@ -52,7 +52,9 @@
#define ARM64_HAS_IRQ_PRIO_MASKING 42 #define ARM64_HAS_IRQ_PRIO_MASKING 42
#define ARM64_HAS_DCPODP 43 #define ARM64_HAS_DCPODP 43
#define ARM64_WORKAROUND_1463225 44 #define ARM64_WORKAROUND_1463225 44
#define ARM64_WORKAROUND_CAVIUM_TX2_219_TVM 45
#define ARM64_WORKAROUND_CAVIUM_TX2_219_PRFM 46
#define ARM64_NCAPS 45 #define ARM64_NCAPS 47
#endif /* __ASM_CPUCAPS_H */ #endif /* __ASM_CPUCAPS_H */

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