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drm: omapdrm: Check the CRTC software state at enable/disable time 

The omapdrm DSS manager enable/disable operations check the DSS manager
state to avoid double enabling/disabling. Check the CRTC software state
instead to decrease the dependency of the DRM layer to the DSS layer.
The dispc_mgr_is_enabled() function then be turned into a static
function, but needs to be moved up in its compilation unit to avoid a
forward declaration.

Add a WARN_ON to catch double enable or disable that should be prevented
by the DRM core and would be a clear sign of a bug. The warning should
eventually be removed.

Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Reviewed-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
This commit is contained in:
Laurent Pinchart 2016-04-18 03:09:48 +03:00
parent dadf4659d0
commit 03af8157aa
3 changed files with 16 additions and 18 deletions
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27
drivers/gpu/drm/omapdrm/dss/dispc.c
View File

@ -620,6 +620,19 @@ u32 dispc_wb_get_framedone_irq(void)
return DISPC_IRQ_FRAMEDONEWB; return DISPC_IRQ_FRAMEDONEWB;
} }
void dispc_mgr_enable(enum omap_channel channel, bool enable)
{
mgr_fld_write(channel, DISPC_MGR_FLD_ENABLE, enable);
/* flush posted write */
mgr_fld_read(channel, DISPC_MGR_FLD_ENABLE);
}
EXPORT_SYMBOL(dispc_mgr_enable);
static bool dispc_mgr_is_enabled(enum omap_channel channel)
{
return !!mgr_fld_read(channel, DISPC_MGR_FLD_ENABLE);
}
bool dispc_mgr_go_busy(enum omap_channel channel) bool dispc_mgr_go_busy(enum omap_channel channel)
{ {
return mgr_fld_read(channel, DISPC_MGR_FLD_GO) == 1; return mgr_fld_read(channel, DISPC_MGR_FLD_GO) == 1;
@ -2901,20 +2914,6 @@ enum omap_dss_output_id dispc_mgr_get_supported_outputs(enum omap_channel channe
} }
EXPORT_SYMBOL(dispc_mgr_get_supported_outputs); EXPORT_SYMBOL(dispc_mgr_get_supported_outputs);
void dispc_mgr_enable(enum omap_channel channel, bool enable)
{
mgr_fld_write(channel, DISPC_MGR_FLD_ENABLE, enable);
/* flush posted write */
mgr_fld_read(channel, DISPC_MGR_FLD_ENABLE);
}
EXPORT_SYMBOL(dispc_mgr_enable);
bool dispc_mgr_is_enabled(enum omap_channel channel)
{
return !!mgr_fld_read(channel, DISPC_MGR_FLD_ENABLE);
}
EXPORT_SYMBOL(dispc_mgr_is_enabled);
void dispc_wb_enable(bool enable) void dispc_wb_enable(bool enable)
{ {
dispc_ovl_enable(OMAP_DSS_WB, enable); dispc_ovl_enable(OMAP_DSS_WB, enable);

1
drivers/gpu/drm/omapdrm/dss/omapdss.h
View File

@ -856,7 +856,6 @@ int dispc_runtime_get(void);
void dispc_runtime_put(void); void dispc_runtime_put(void);
void dispc_mgr_enable(enum omap_channel channel, bool enable); void dispc_mgr_enable(enum omap_channel channel, bool enable);
bool dispc_mgr_is_enabled(enum omap_channel channel);
u32 dispc_mgr_get_vsync_irq(enum omap_channel channel); u32 dispc_mgr_get_vsync_irq(enum omap_channel channel);
u32 dispc_mgr_get_framedone_irq(enum omap_channel channel); u32 dispc_mgr_get_framedone_irq(enum omap_channel channel);
u32 dispc_mgr_get_sync_lost_irq(enum omap_channel channel); u32 dispc_mgr_get_sync_lost_irq(enum omap_channel channel);

6
drivers/gpu/drm/omapdrm/omap_crtc.c
View File

@ -135,15 +135,15 @@ static void omap_crtc_set_enabled(struct drm_crtc *crtc, bool enable)
u32 framedone_irq, vsync_irq; u32 framedone_irq, vsync_irq;
int ret; int ret;
if (WARN_ON(omap_crtc->enabled == enable))
return;
if (omap_crtc_output[channel]->output_type == OMAP_DISPLAY_TYPE_HDMI) { if (omap_crtc_output[channel]->output_type == OMAP_DISPLAY_TYPE_HDMI) {
dispc_mgr_enable(channel, enable); dispc_mgr_enable(channel, enable);
omap_crtc->enabled = enable; omap_crtc->enabled = enable;
return; return;
} }
if (dispc_mgr_is_enabled(channel) == enable)
return;
if (omap_crtc->channel == OMAP_DSS_CHANNEL_DIGIT) { if (omap_crtc->channel == OMAP_DSS_CHANNEL_DIGIT) {
/* /*
* Digit output produces some sync lost interrupts during the * Digit output produces some sync lost interrupts during the