From 047d2df54cb866f13014cb566eac61449bf89a29 Mon Sep 17 00:00:00 2001 From: Ben Skeggs Date: Wed, 20 Apr 2011 13:21:40 +1000 Subject: [PATCH] drm/nvc0/pm: parse clock for pll 0x0a (0x137020) from perf table Signed-off-by: Ben Skeggs --- drivers/gpu/drm/nouveau/nouveau_drv.h | 1 + drivers/gpu/drm/nouveau/nouveau_perf.c | 2 ++ 2 files changed, 3 insertions(+) diff --git a/drivers/gpu/drm/nouveau/nouveau_drv.h b/drivers/gpu/drm/nouveau/nouveau_drv.h index 224d3a1ce6ec..444a943283b1 100644 --- a/drivers/gpu/drm/nouveau/nouveau_drv.h +++ b/drivers/gpu/drm/nouveau/nouveau_drv.h @@ -433,6 +433,7 @@ struct nouveau_pm_level { u32 memory; u32 shader; u32 unk05; + u32 unk0a; u8 voltage; u8 fanspeed; diff --git a/drivers/gpu/drm/nouveau/nouveau_perf.c b/drivers/gpu/drm/nouveau/nouveau_perf.c index 90ab4978e812..6e3f93334a97 100644 --- a/drivers/gpu/drm/nouveau/nouveau_perf.c +++ b/drivers/gpu/drm/nouveau/nouveau_perf.c @@ -243,12 +243,14 @@ nouveau_perf_init(struct drm_device *dev) } else { perflvl->shader = ROM16(subent(3)) & 0xfff; perflvl->core = perflvl->shader / 2; + perflvl->unk0a = ROM16(subent(4)) & 0xfff; perflvl->memory = ROM16(subent(5)) & 0xfff; } perflvl->core *= 1000; perflvl->shader *= 1000; perflvl->memory *= 1000; + perflvl->unk0a *= 1000; break; }