From 1c4b68fdd52e05730591682bc62042cead6f5af3 Mon Sep 17 00:00:00 2001 From: Simon Horman Date: Wed, 24 Feb 2016 11:29:05 +0900 Subject: [PATCH 01/22] ARM: dts: r8a7790: use fallback jpu compatibility string Use recently added fallback compatibility string in r8a7790 device trees. Signed-off-by: Simon Horman Acked-by: Geert Uytterhoeven --- arch/arm/boot/dts/r8a7790.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/r8a7790.dtsi b/arch/arm/boot/dts/r8a7790.dtsi index 283698fc0fea..60db8e4f5790 100644 --- a/arch/arm/boot/dts/r8a7790.dtsi +++ b/arch/arm/boot/dts/r8a7790.dtsi @@ -990,7 +990,7 @@ can1: can@e6e88000 { }; jpu: jpeg-codec@fe980000 { - compatible = "renesas,jpu-r8a7790"; + compatible = "renesas,jpu-r8a7790", "renesas,rcar-gen2-jpu"; reg = <0 0xfe980000 0 0x10300>; interrupts = ; clocks = <&mstp1_clks R8A7790_CLK_JPU>; From 803f7e0b23d3a7cb3f038df786df4faf2e0c752a Mon Sep 17 00:00:00 2001 From: Simon Horman Date: Wed, 24 Feb 2016 11:29:06 +0900 Subject: [PATCH 02/22] ARM: dts: r8a7791: use fallback jpu compatibility string Use recently added fallback compatibility string in r8a7791 device tree. Signed-off-by: Simon Horman Acked-by: Geert Uytterhoeven --- arch/arm/boot/dts/r8a7791.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/r8a7791.dtsi b/arch/arm/boot/dts/r8a7791.dtsi index 8010d935300f..d4de6db1143b 100644 --- a/arch/arm/boot/dts/r8a7791.dtsi +++ b/arch/arm/boot/dts/r8a7791.dtsi @@ -1035,7 +1035,7 @@ can1: can@e6e88000 { }; jpu: jpeg-codec@fe980000 { - compatible = "renesas,jpu-r8a7791"; + compatible = "renesas,jpu-r8a7791", "renesas,rcar-gen2-jpu"; reg = <0 0xfe980000 0 0x10300>; interrupts = ; clocks = <&mstp1_clks R8A7791_CLK_JPU>; From 38805823377d762ec46f2430f29ef0cb8b3937d4 Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Thu, 3 Mar 2016 10:32:40 +0100 Subject: [PATCH 03/22] ARM: dts: r8a7790: Add SCIF2 clock Based on Rev. 2.00 of the R-Car Gen2 datasheet. Signed-off-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- arch/arm/boot/dts/r8a7790.dtsi | 6 +++--- include/dt-bindings/clock/r8a7790-clock.h | 1 + 2 files changed, 4 insertions(+), 3 deletions(-) diff --git a/arch/arm/boot/dts/r8a7790.dtsi b/arch/arm/boot/dts/r8a7790.dtsi index 60db8e4f5790..6f4fdfccdcfd 100644 --- a/arch/arm/boot/dts/r8a7790.dtsi +++ b/arch/arm/boot/dts/r8a7790.dtsi @@ -1302,19 +1302,19 @@ R8A7790_CLK_SYS_DMAC1 R8A7790_CLK_SYS_DMAC0 mstp3_clks: mstp3_clks@e615013c { compatible = "renesas,r8a7790-mstp-clocks", "renesas,cpg-mstp-clocks"; reg = <0 0xe615013c 0 4>, <0 0xe6150048 0 4>; - clocks = <&hp_clk>, <&cp_clk>, <&mmc1_clk>, <&sd3_clk>, + clocks = <&hp_clk>, <&cp_clk>, <&mmc1_clk>, <&p_clk>, <&sd3_clk>, <&sd2_clk>, <&cpg_clocks R8A7790_CLK_SD1>, <&cpg_clocks R8A7790_CLK_SD0>, <&mmc0_clk>, <&hp_clk>, <&mp_clk>, <&hp_clk>, <&mp_clk>, <&rclk_clk>, <&hp_clk>, <&hp_clk>; #clock-cells = <1>; clock-indices = < - R8A7790_CLK_IIC2 R8A7790_CLK_TPU0 R8A7790_CLK_MMCIF1 R8A7790_CLK_SDHI3 + R8A7790_CLK_IIC2 R8A7790_CLK_TPU0 R8A7790_CLK_MMCIF1 R8A7790_CLK_SCIF2 R8A7790_CLK_SDHI3 R8A7790_CLK_SDHI2 R8A7790_CLK_SDHI1 R8A7790_CLK_SDHI0 R8A7790_CLK_MMCIF0 R8A7790_CLK_IIC0 R8A7790_CLK_PCIEC R8A7790_CLK_IIC1 R8A7790_CLK_SSUSB R8A7790_CLK_CMT1 R8A7790_CLK_USBDMAC0 R8A7790_CLK_USBDMAC1 >; clock-output-names = - "iic2", "tpu0", "mmcif1", "sdhi3", + "iic2", "tpu0", "mmcif1", "scif2", "sdhi3", "sdhi2", "sdhi1", "sdhi0", "mmcif0", "iic0", "pciec", "iic1", "ssusb", "cmt1", "usbdmac0", "usbdmac1"; diff --git a/include/dt-bindings/clock/r8a7790-clock.h b/include/dt-bindings/clock/r8a7790-clock.h index 7b1ad8922eec..fa5e8da809f2 100644 --- a/include/dt-bindings/clock/r8a7790-clock.h +++ b/include/dt-bindings/clock/r8a7790-clock.h @@ -66,6 +66,7 @@ #define R8A7790_CLK_IIC2 0 #define R8A7790_CLK_TPU0 4 #define R8A7790_CLK_MMCIF1 5 +#define R8A7790_CLK_SCIF2 10 #define R8A7790_CLK_SDHI3 11 #define R8A7790_CLK_SDHI2 12 #define R8A7790_CLK_SDHI1 13 From 022869a2c4e15c3b615dd278d59e0fa82e5a8449 Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Thu, 3 Mar 2016 10:32:41 +0100 Subject: [PATCH 04/22] ARM: dts: r8a7790: Add SCIF2 device node Signed-off-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- arch/arm/boot/dts/r8a7790.dtsi | 14 ++++++++++++++ 1 file changed, 14 insertions(+) diff --git a/arch/arm/boot/dts/r8a7790.dtsi b/arch/arm/boot/dts/r8a7790.dtsi index 6f4fdfccdcfd..e96f8a4cb66f 100644 --- a/arch/arm/boot/dts/r8a7790.dtsi +++ b/arch/arm/boot/dts/r8a7790.dtsi @@ -732,6 +732,20 @@ scif1: serial@e6e68000 { status = "disabled"; }; + scif2: serial@e6e56000 { + compatible = "renesas,scif-r8a7790", "renesas,rcar-gen2-scif", + "renesas,scif"; + reg = <0 0xe6e56000 0 64>; + interrupts = ; + clocks = <&mstp3_clks R8A7790_CLK_SCIF2>, <&zs_clk>, + <&scif_clk>; + clock-names = "fck", "brg_int", "scif_clk"; + dmas = <&dmac0 0x2b>, <&dmac0 0x2c>; + dma-names = "tx", "rx"; + power-domains = <&cpg_clocks>; + status = "disabled"; + }; + hscif0: serial@e62c0000 { compatible = "renesas,hscif-r8a7790", "renesas,rcar-gen2-hscif", "renesas,hscif"; From 73ae9cfecd069060e7bf182250e16ff8c598f997 Mon Sep 17 00:00:00 2001 From: Simon Horman Date: Mon, 14 Mar 2016 11:13:58 +0900 Subject: [PATCH 05/22] ARM: dts: r8a7791: use fallback can compatibility string Use recently added fallback compatibility string in r8a7791 device tree. Signed-off-by: Simon Horman Acked-by: Geert Uytterhoeven --- arch/arm/boot/dts/r8a7791.dtsi | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm/boot/dts/r8a7791.dtsi b/arch/arm/boot/dts/r8a7791.dtsi index d4de6db1143b..6122a7919c9f 100644 --- a/arch/arm/boot/dts/r8a7791.dtsi +++ b/arch/arm/boot/dts/r8a7791.dtsi @@ -1013,7 +1013,7 @@ du_out_lvds0: endpoint { }; can0: can@e6e80000 { - compatible = "renesas,can-r8a7791"; + compatible = "renesas,can-r8a7791", "renesas,rcar-gen2-can"; reg = <0 0xe6e80000 0 0x1000>; interrupts = ; clocks = <&mstp9_clks R8A7791_CLK_RCAN0>, @@ -1024,7 +1024,7 @@ can0: can@e6e80000 { }; can1: can@e6e88000 { - compatible = "renesas,can-r8a7791"; + compatible = "renesas,can-r8a7791", "renesas,rcar-gen2-can"; reg = <0 0xe6e88000 0 0x1000>; interrupts = ; clocks = <&mstp9_clks R8A7791_CLK_RCAN1>, From 28e941de3dc7105ab3c0c261814d4d53a6b8ddf4 Mon Sep 17 00:00:00 2001 From: Simon Horman Date: Mon, 14 Mar 2016 11:13:59 +0900 Subject: [PATCH 06/22] ARM: dts: r8a7790: use fallback can compatibility string Use recently added fallback compatibility string in r8a7790 device tree. Signed-off-by: Simon Horman Acked-by: Geert Uytterhoeven --- arch/arm/boot/dts/r8a7790.dtsi | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm/boot/dts/r8a7790.dtsi b/arch/arm/boot/dts/r8a7790.dtsi index e96f8a4cb66f..7cf52e6da956 100644 --- a/arch/arm/boot/dts/r8a7790.dtsi +++ b/arch/arm/boot/dts/r8a7790.dtsi @@ -982,7 +982,7 @@ du_out_lvds1: endpoint { }; can0: can@e6e80000 { - compatible = "renesas,can-r8a7790"; + compatible = "renesas,can-r8a7790", "renesas,rcar-gen2-can"; reg = <0 0xe6e80000 0 0x1000>; interrupts = ; clocks = <&mstp9_clks R8A7790_CLK_RCAN0>, @@ -993,7 +993,7 @@ can0: can@e6e80000 { }; can1: can@e6e88000 { - compatible = "renesas,can-r8a7790"; + compatible = "renesas,can-r8a7790", "renesas,rcar-gen2-can"; reg = <0 0xe6e88000 0 0x1000>; interrupts = ; clocks = <&mstp9_clks R8A7790_CLK_RCAN1>, From e980f9418f45a3c0d53e54bc17bd48406060c2bb Mon Sep 17 00:00:00 2001 From: Simon Horman Date: Tue, 15 Mar 2016 09:26:33 +0900 Subject: [PATCH 07/22] ARM: dts: r8a7794: add CAN clocks to device tree Add CAN nodes to r8a7794 device tree. Based on work by Sergei Shtylyov for the r8a7791 SoC. Signed-off-by: Simon Horman Reviewed-by: Geert Uytterhoeven Acked-by: Ramesh Shanmugasundaram --- arch/arm/boot/dts/r8a7794.dtsi | 33 ++++++++++++++++++----- include/dt-bindings/clock/r8a7794-clock.h | 3 +++ 2 files changed, 29 insertions(+), 7 deletions(-) diff --git a/arch/arm/boot/dts/r8a7794.dtsi b/arch/arm/boot/dts/r8a7794.dtsi index 7d7d18766540..2d8835bdf3f6 100644 --- a/arch/arm/boot/dts/r8a7794.dtsi +++ b/arch/arm/boot/dts/r8a7794.dtsi @@ -843,6 +843,22 @@ extal_clk: extal { clock-frequency = <0>; }; + /* External USB clock - can be overridden by the board */ + usb_extal_clk: usb_extal { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <48000000>; + }; + + /* External CAN clock */ + can_clk: can { + compatible = "fixed-clock"; + #clock-cells = <0>; + /* This value must be overridden by the board. */ + clock-frequency = <0>; + status = "disabled"; + }; + /* External SCIF clock */ scif_clk: scif { compatible = "fixed-clock"; @@ -857,10 +873,11 @@ cpg_clocks: cpg_clocks@e6150000 { compatible = "renesas,r8a7794-cpg-clocks", "renesas,rcar-gen2-cpg-clocks"; reg = <0 0xe6150000 0 0x1000>; - clocks = <&extal_clk>; + clocks = <&extal_clk &usb_extal_clk>; #clock-cells = <1>; clock-output-names = "main", "pll0", "pll1", "pll3", - "lb", "qspi", "sdh", "sd0", "z"; + "lb", "qspi", "sdh", "sd0", "z", + "rcan"; #power-domain-cells = <0>; }; /* Variable factor clocks */ @@ -1115,20 +1132,22 @@ mstp9_clks: mstp9_clks@e6150994 { compatible = "renesas,r8a7794-mstp-clocks", "renesas,cpg-mstp-clocks"; reg = <0 0xe6150994 0 4>, <0 0xe61509a4 0 4>; clocks = <&cp_clk>, <&cp_clk>, <&cp_clk>, <&cp_clk>, - <&cp_clk>, <&cp_clk>, <&cp_clk>, - <&cpg_clocks R8A7794_CLK_QSPI>, <&hp_clk>, <&hp_clk>, - <&hp_clk>, <&hp_clk>, <&hp_clk>, <&hp_clk>; + <&cp_clk>, <&cp_clk>, <&cp_clk>, <&p_clk>, + <&p_clk>, <&cpg_clocks R8A7794_CLK_QSPI>, + <&hp_clk>, <&hp_clk>, <&hp_clk>, <&hp_clk>, + <&hp_clk>, <&hp_clk>; #clock-cells = <1>; clock-indices = ; clock-output-names = "gpio6", "gpio5", "gpio4", "gpio3", "gpio2", - "gpio1", "gpio0", "qspi_mod", + "gpio1", "gpio0", "rcan1", "rcan0", "qspi_mod", "i2c5", "i2c4", "i2c3", "i2c2", "i2c1", "i2c0"; }; mstp11_clks: mstp11_clks@e615099c { diff --git a/include/dt-bindings/clock/r8a7794-clock.h b/include/dt-bindings/clock/r8a7794-clock.h index f843de6bf377..9703fbdb81c8 100644 --- a/include/dt-bindings/clock/r8a7794-clock.h +++ b/include/dt-bindings/clock/r8a7794-clock.h @@ -21,6 +21,7 @@ #define R8A7794_CLK_SDH 6 #define R8A7794_CLK_SD0 7 #define R8A7794_CLK_Z 8 +#define R8A7794_CLK_RCAN 9 /* MSTP0 */ #define R8A7794_CLK_MSIOF0 0 @@ -95,6 +96,8 @@ #define R8A7794_CLK_GPIO2 10 #define R8A7794_CLK_GPIO1 11 #define R8A7794_CLK_GPIO0 12 +#define R8A7794_CLK_RCAN1 15 +#define R8A7794_CLK_RCAN0 16 #define R8A7794_CLK_QSPI_MOD 17 #define R8A7794_CLK_I2C5 25 #define R8A7794_CLK_I2C4 27 From 9f1c1a2c784d28d45d0cd18a44e45ddd15d7458f Mon Sep 17 00:00:00 2001 From: Simon Horman Date: Tue, 15 Mar 2016 09:26:34 +0900 Subject: [PATCH 08/22] ARM: dts: r8a7794: add CAN nodes to device tree Add CAN nodes to r8a7794 device tree. Based on work by Sergei Shtylyov for the r8a7791 SoC. Signed-off-by: Simon Horman Reviewed-by: Geert Uytterhoeven Acked-by: Ramesh Shanmugasundaram --- arch/arm/boot/dts/r8a7794.dtsi | 22 ++++++++++++++++++++++ 1 file changed, 22 insertions(+) diff --git a/arch/arm/boot/dts/r8a7794.dtsi b/arch/arm/boot/dts/r8a7794.dtsi index 2d8835bdf3f6..a1ee2a82c3c0 100644 --- a/arch/arm/boot/dts/r8a7794.dtsi +++ b/arch/arm/boot/dts/r8a7794.dtsi @@ -830,6 +830,28 @@ du_out_rgb1: endpoint { }; }; + can0: can@e6e80000 { + compatible = "renesas,can-r8a7794", "renesas,rcar-gen2-can"; + reg = <0 0xe6e80000 0 0x1000>; + interrupts = ; + clocks = <&mstp9_clks R8A7794_CLK_RCAN0>, + <&cpg_clocks R8A7794_CLK_RCAN>, <&can_clk>; + clock-names = "clkp1", "clkp2", "can_clk"; + power-domains = <&cpg_clocks>; + status = "disabled"; + }; + + can1: can@e6e88000 { + compatible = "renesas,can-r8a7794", "renesas,rcar-gen2-can"; + reg = <0 0xe6e88000 0 0x1000>; + interrupts = ; + clocks = <&mstp9_clks R8A7794_CLK_RCAN1>, + <&cpg_clocks R8A7794_CLK_RCAN>, <&can_clk>; + clock-names = "clkp1", "clkp2", "can_clk"; + power-domains = <&cpg_clocks>; + status = "disabled"; + }; + clocks { #address-cells = <2>; #size-cells = <2>; From 7892e6c1be78a7b008722badd99e5abd0ad6007b Mon Sep 17 00:00:00 2001 From: Simon Horman Date: Wed, 16 Mar 2016 10:52:55 +0900 Subject: [PATCH 09/22] ARM: dts: r8a7793: add CAN clocks to device tree The R-Car CAN controllers can derive the CAN bus clock not only from their peripheral clock input (clkp1) but also from the other internal clock (clkp2) and external clock fed on CAN_CLK pin. Describe those clocks in the device tree along with the USB_EXTAL clock from which clkp2 is derived. Based on work by Sergei Shtylyov for the r8a7791 SoC. Signed-off-by: Simon Horman Acked-by: Geert Uytterhoeven --- arch/arm/boot/dts/r8a7793.dtsi | 27 +++++++++++++++++++++++---- 1 file changed, 23 insertions(+), 4 deletions(-) diff --git a/arch/arm/boot/dts/r8a7793.dtsi b/arch/arm/boot/dts/r8a7793.dtsi index 95bbed95b0c1..0e609bdafaa9 100644 --- a/arch/arm/boot/dts/r8a7793.dtsi +++ b/arch/arm/boot/dts/r8a7793.dtsi @@ -839,6 +839,22 @@ audio_clk_c: audio_clk_c { clock-frequency = <0>; }; + /* External USB clock - can be overridden by the board */ + usb_extal_clk: usb_extal { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <48000000>; + }; + + /* External CAN clock */ + can_clk: can { + compatible = "fixed-clock"; + #clock-cells = <0>; + /* This value must be overridden by the board. */ + clock-frequency = <0>; + status = "disabled"; + }; + /* External SCIF clock */ scif_clk: scif { compatible = "fixed-clock"; @@ -853,7 +869,7 @@ cpg_clocks: cpg_clocks@e6150000 { compatible = "renesas,r8a7793-cpg-clocks", "renesas,rcar-gen2-cpg-clocks"; reg = <0 0xe6150000 0 0x1000>; - clocks = <&extal_clk>; + clocks = <&extal_clk &usb_extal_clk>; #clock-cells = <1>; clock-output-names = "main", "pll0", "pll1", "pll3", "lb", "qspi", "sdh", "sd0", "z", @@ -1081,6 +1097,7 @@ mstp9_clks: mstp9_clks@e6150994 { reg = <0 0xe6150994 0 4>, <0 0xe61509a4 0 4>; clocks = <&cp_clk>, <&cp_clk>, <&cp_clk>, <&cp_clk>, <&cp_clk>, <&cp_clk>, <&cp_clk>, <&cp_clk>, + <&p_clk>, <&p_clk>, <&cpg_clocks R8A7793_CLK_QSPI>, <&hp_clk>, <&cp_clk>, <&hp_clk>, <&hp_clk>, <&hp_clk>, <&hp_clk>, <&hp_clk>; @@ -1090,7 +1107,8 @@ R8A7793_CLK_GPIO7 R8A7793_CLK_GPIO6 R8A7793_CLK_GPIO5 R8A7793_CLK_GPIO4 R8A7793_CLK_GPIO3 R8A7793_CLK_GPIO2 R8A7793_CLK_GPIO1 R8A7793_CLK_GPIO0 - R8A7793_CLK_QSPI_MOD R8A7793_CLK_I2C5 + R8A7793_CLK_QSPI_MOD R8A7793_CLK_RCAN1 + R8A7793_CLK_RCAN0 R8A7793_CLK_I2C5 R8A7793_CLK_IICDVFS R8A7793_CLK_I2C4 R8A7793_CLK_I2C3 R8A7793_CLK_I2C2 R8A7793_CLK_I2C1 R8A7793_CLK_I2C0 @@ -1098,8 +1116,9 @@ R8A7793_CLK_I2C1 R8A7793_CLK_I2C0 clock-output-names = "gpio7", "gpio6", "gpio5", "gpio4", "gpio3", "gpio2", "gpio1", "gpio0", - "qspi_mod", "i2c5", "i2c6", "i2c4", - "i2c3", "i2c2", "i2c1", "i2c0"; + "rcan1", "rcan0", "qspi_mod", "i2c5", + "i2c6", "i2c4", "i2c3", "i2c2", "i2c1", + "i2c0"; }; mstp10_clks: mstp10_clks@e6150998 { compatible = "renesas,r8a7793-mstp-clocks", "renesas,cpg-mstp-clocks"; From a0e300ceb5259e8584ff67971981ac22580ef550 Mon Sep 17 00:00:00 2001 From: Simon Horman Date: Wed, 16 Mar 2016 10:52:56 +0900 Subject: [PATCH 10/22] ARM: dts: r8a7793: add CAN nodes to device tree Add CAN nodes to r8a7793 device tree. Based on work by Sergei Shtylyov for the r8a7791 SoC. Signed-off-by: Simon Horman --- arch/arm/boot/dts/r8a7793.dtsi | 22 ++++++++++++++++++++++ 1 file changed, 22 insertions(+) diff --git a/arch/arm/boot/dts/r8a7793.dtsi b/arch/arm/boot/dts/r8a7793.dtsi index 0e609bdafaa9..bddc31283bd9 100644 --- a/arch/arm/boot/dts/r8a7793.dtsi +++ b/arch/arm/boot/dts/r8a7793.dtsi @@ -806,6 +806,28 @@ du_out_lvds0: endpoint { }; }; + can0: can@e6e80000 { + compatible = "renesas,can-r8a7793", "renesas,rcar-gen2-can"; + reg = <0 0xe6e80000 0 0x1000>; + interrupts = ; + clocks = <&mstp9_clks R8A7793_CLK_RCAN0>, + <&cpg_clocks R8A7793_CLK_RCAN>, <&can_clk>; + clock-names = "clkp1", "clkp2", "can_clk"; + power-domains = <&cpg_clocks>; + status = "disabled"; + }; + + can1: can@e6e88000 { + compatible = "renesas,can-r8a7793", "renesas,rcar-gen2-can"; + reg = <0 0xe6e88000 0 0x1000>; + interrupts = ; + clocks = <&mstp9_clks R8A7793_CLK_RCAN1>, + <&cpg_clocks R8A7793_CLK_RCAN>, <&can_clk>; + clock-names = "clkp1", "clkp2", "can_clk"; + power-domains = <&cpg_clocks>; + status = "disabled"; + }; + clocks { #address-cells = <2>; #size-cells = <2>; From a856b195d129059c71981b6d069085d611ad8d38 Mon Sep 17 00:00:00 2001 From: Simon Horman Date: Thu, 17 Mar 2016 16:33:10 +0900 Subject: [PATCH 11/22] ARM: dts: r8a7794: add IIC clocks Add IIC clocks to r8a7794 device tree. Based on similar work for the r8a7790 by Wolfram Sang. Signed-off-by: Simon Horman Reviewed-by: Geert Uytterhoeven --- arch/arm/boot/dts/r8a7794.dtsi | 9 ++++++--- include/dt-bindings/clock/r8a7794-clock.h | 2 ++ 2 files changed, 8 insertions(+), 3 deletions(-) diff --git a/arch/arm/boot/dts/r8a7794.dtsi b/arch/arm/boot/dts/r8a7794.dtsi index a1ee2a82c3c0..8b2060c87a76 100644 --- a/arch/arm/boot/dts/r8a7794.dtsi +++ b/arch/arm/boot/dts/r8a7794.dtsi @@ -1099,16 +1099,19 @@ mstp3_clks: mstp3_clks@e615013c { compatible = "renesas,r8a7794-mstp-clocks", "renesas,cpg-mstp-clocks"; reg = <0 0xe615013c 0 4>, <0 0xe6150048 0 4>; clocks = <&sd3_clk>, <&sd2_clk>, <&cpg_clocks R8A7794_CLK_SD0>, - <&mmc0_clk>, <&rclk_clk>, <&hp_clk>, <&hp_clk>; + <&mmc0_clk>, <&hp_clk>, <&hp_clk>, <&rclk_clk>, + <&hp_clk>, <&hp_clk>; #clock-cells = <1>; clock-indices = < R8A7794_CLK_SDHI2 R8A7794_CLK_SDHI1 R8A7794_CLK_SDHI0 - R8A7794_CLK_MMCIF0 R8A7794_CLK_CMT1 + R8A7794_CLK_MMCIF0 R8A7794_CLK_IIC0 + R8A7794_CLK_IIC1 R8A7794_CLK_CMT1 R8A7794_CLK_USBDMAC0 R8A7794_CLK_USBDMAC1 >; clock-output-names = "sdhi2", "sdhi1", "sdhi0", - "mmcif0", "cmt1", "usbdmac0", "usbdmac1"; + "mmcif0", "i2c6", "i2c7", + "cmt1", "usbdmac0", "usbdmac1"; }; mstp4_clks: mstp4_clks@e6150140 { compatible = "renesas,r8a7794-mstp-clocks", "renesas,cpg-mstp-clocks"; diff --git a/include/dt-bindings/clock/r8a7794-clock.h b/include/dt-bindings/clock/r8a7794-clock.h index 9703fbdb81c8..4d3ecd626c1f 100644 --- a/include/dt-bindings/clock/r8a7794-clock.h +++ b/include/dt-bindings/clock/r8a7794-clock.h @@ -57,6 +57,8 @@ #define R8A7794_CLK_SDHI1 12 #define R8A7794_CLK_SDHI0 14 #define R8A7794_CLK_MMCIF0 15 +#define R8A7794_CLK_IIC0 18 +#define R8A7794_CLK_IIC1 23 #define R8A7794_CLK_CMT1 29 #define R8A7794_CLK_USBDMAC0 30 #define R8A7794_CLK_USBDMAC1 31 From aa9b992ea2d3c2cc48712c21d1e680318d4156e2 Mon Sep 17 00:00:00 2001 From: Simon Horman Date: Thu, 17 Mar 2016 16:35:17 +0900 Subject: [PATCH 12/22] ARM: dts: r8a7794: Add IIC nodes Add IIC nodes to r8a7794 device tree. Based on similar work for the r8a7793 by Laurent Pinchart. Signed-off-by: Simon Horman Reviewed-by: Geert Uytterhoeven --- arch/arm/boot/dts/r8a7794.dtsi | 28 ++++++++++++++++++++++++++++ 1 file changed, 28 insertions(+) diff --git a/arch/arm/boot/dts/r8a7794.dtsi b/arch/arm/boot/dts/r8a7794.dtsi index 8b2060c87a76..b0bce43779f1 100644 --- a/arch/arm/boot/dts/r8a7794.dtsi +++ b/arch/arm/boot/dts/r8a7794.dtsi @@ -26,6 +26,8 @@ aliases { i2c3 = &i2c3; i2c4 = &i2c4; i2c5 = &i2c5; + i2c6 = &i2c6; + i2c7 = &i2c7; spi0 = &qspi; vin0 = &vin0; vin1 = &vin1; @@ -629,6 +631,32 @@ i2c5: i2c@e6528000 { status = "disabled"; }; + i2c6: i2c@e6500000 { + compatible = "renesas,iic-r8a7794", "renesas,rmobile-iic"; + reg = <0 0xe6500000 0 0x425>; + interrupts = ; + clocks = <&mstp3_clks R8A7794_CLK_IIC0>; + dmas = <&dmac0 0x61>, <&dmac0 0x62>; + dma-names = "tx", "rx"; + power-domains = <&cpg_clocks>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + + i2c7: i2c@e6510000 { + compatible = "renesas,iic-r8a7794", "renesas,rmobile-iic"; + reg = <0 0xe6510000 0 0x425>; + interrupts = ; + clocks = <&mstp3_clks R8A7794_CLK_IIC1>; + dmas = <&dmac0 0x65>, <&dmac0 0x66>; + dma-names = "tx", "rx"; + power-domains = <&cpg_clocks>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + mmcif0: mmc@ee200000 { compatible = "renesas,mmcif-r8a7794", "renesas,sh-mmcif"; reg = <0 0xee200000 0 0x80>; From a4a72b473e2897265a0fecbd5f6b5a92ea62585f Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Fri, 18 Mar 2016 11:19:20 +0100 Subject: [PATCH 13/22] ARM: dts: sh73a0: Correct interrupt type for ARM TWD The ARM TWD interrupt is a private peripheral interrupt (PPI), and per the ARM GIC documentation, whether the type for PPIs can be set is IMPLEMENTATION DEFINED. For SH-Mobile AG5 devices the PPI type cannot be set, and so when we attempt to set the type for the ARM TWD interrupt it fails. This has gone unnoticed because it fails silently, and because we cannot re-configure the type it has had no impact. Nevertheless fix the type for the TWD interrupt so that it matches the hardware configuration. Based on patches by Jon Hunter for Tegra20/30 and OMAP4. Signed-off-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- arch/arm/boot/dts/sh73a0.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/sh73a0.dtsi b/arch/arm/boot/dts/sh73a0.dtsi index 639ea2d76970..c4f434cdec60 100644 --- a/arch/arm/boot/dts/sh73a0.dtsi +++ b/arch/arm/boot/dts/sh73a0.dtsi @@ -43,7 +43,7 @@ cpu@1 { timer@f0000600 { compatible = "arm,cortex-a9-twd-timer"; reg = <0xf0000600 0x20>; - interrupts = ; + interrupts = ; clocks = <&twd_clk>; }; From e6c2488251b1c7e62f3e43907ca3f6fd016b1353 Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Fri, 18 Mar 2016 11:19:21 +0100 Subject: [PATCH 14/22] ARM: dts: r8a7779: Correct interrupt type for ARM TWD The ARM TWD interrupt is a private peripheral interrupt (PPI), and per the ARM GIC documentation, whether the type for PPIs can be set is IMPLEMENTATION DEFINED. For R-Car H1 devices the PPI type cannot be set, and so when we attempt to set the type for the ARM TWD interrupt it fails. This has gone unnoticed because it fails silently, and because we cannot re-configure the type it has had no impact. Nevertheless fix the type for the TWD interrupt so that it matches the hardware configuration. Based on patches by Jon Hunter for Tegra20/30 and OMAP4. Signed-off-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- arch/arm/boot/dts/r8a7779.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/r8a7779.dtsi b/arch/arm/boot/dts/r8a7779.dtsi index 60bc1e66bba9..5c1d48d712a1 100644 --- a/arch/arm/boot/dts/r8a7779.dtsi +++ b/arch/arm/boot/dts/r8a7779.dtsi @@ -67,7 +67,7 @@ timer@f0000600 { compatible = "arm,cortex-a9-twd-timer"; reg = <0xf0000600 0x20>; interrupts = ; + (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_EDGE_RISING)>; clocks = <&cpg_clocks R8A7779_CLK_ZS>; }; From 92cc7798edf105b0684a4a154fc7bac9955a4766 Mon Sep 17 00:00:00 2001 From: Simon Horman Date: Thu, 24 Mar 2016 11:01:07 +0900 Subject: [PATCH 15/22] ARM: dts: r8a7790: Use USB3.0 fallback compatibility string Use recently added fallback compatibility string in r8a7790 device tree. Signed-off-by: Simon Horman Acked-by: Geert Uytterhoeven --- arch/arm/boot/dts/r8a7790.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/r8a7790.dtsi b/arch/arm/boot/dts/r8a7790.dtsi index 7cf52e6da956..7486fcf985c4 100644 --- a/arch/arm/boot/dts/r8a7790.dtsi +++ b/arch/arm/boot/dts/r8a7790.dtsi @@ -1513,7 +1513,7 @@ msiof3: spi@e6c90000 { }; xhci: usb@ee000000 { - compatible = "renesas,xhci-r8a7790"; + compatible = "renesas,xhci-r8a7790", "renesas,rcar-gen2-xhci"; reg = <0 0xee000000 0 0xc00>; interrupts = ; clocks = <&mstp3_clks R8A7790_CLK_SSUSB>; From 26dba29689aef1135378ab8783157debe1314bce Mon Sep 17 00:00:00 2001 From: Simon Horman Date: Thu, 24 Mar 2016 11:01:08 +0900 Subject: [PATCH 16/22] ARM: dts: r8a7791: Use USB3.0 fallback compatibility string Use recently added fallback compatibility string in r8a7791 device tree. Signed-off-by: Simon Horman Acked-by: Geert Uytterhoeven --- arch/arm/boot/dts/r8a7791.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/r8a7791.dtsi b/arch/arm/boot/dts/r8a7791.dtsi index 6122a7919c9f..6d4a0b6e4df9 100644 --- a/arch/arm/boot/dts/r8a7791.dtsi +++ b/arch/arm/boot/dts/r8a7791.dtsi @@ -1520,7 +1520,7 @@ msiof2: spi@e6e00000 { }; xhci: usb@ee000000 { - compatible = "renesas,xhci-r8a7791"; + compatible = "renesas,xhci-r8a7791", "renesas,rcar-gen2-xhci"; reg = <0 0xee000000 0 0xc00>; interrupts = ; clocks = <&mstp3_clks R8A7791_CLK_SSUSB>; From 22f708b057dbe3ab4aa53c76b5f3051743784777 Mon Sep 17 00:00:00 2001 From: Ben Hutchings Date: Fri, 1 Apr 2016 17:44:38 +0200 Subject: [PATCH 17/22] ARM: dts: r8a7790: Set maximum frequencies for SDHI clocks Taken from the datasheet. Signed-off-by: Ben Hutchings Signed-off-by: Wolfram Sang Signed-off-by: Simon Horman --- arch/arm/boot/dts/r8a7790.dtsi | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/arch/arm/boot/dts/r8a7790.dtsi b/arch/arm/boot/dts/r8a7790.dtsi index 7486fcf985c4..b920facb0c3b 100644 --- a/arch/arm/boot/dts/r8a7790.dtsi +++ b/arch/arm/boot/dts/r8a7790.dtsi @@ -589,6 +589,7 @@ sdhi0: sd@ee100000 { clocks = <&mstp3_clks R8A7790_CLK_SDHI0>; dmas = <&dmac1 0xcd>, <&dmac1 0xce>; dma-names = "tx", "rx"; + max-frequency = <156000000>; power-domains = <&cpg_clocks>; status = "disabled"; }; @@ -600,6 +601,7 @@ sdhi1: sd@ee120000 { clocks = <&mstp3_clks R8A7790_CLK_SDHI1>; dmas = <&dmac1 0xc9>, <&dmac1 0xca>; dma-names = "tx", "rx"; + max-frequency = <156000000>; power-domains = <&cpg_clocks>; status = "disabled"; }; @@ -611,6 +613,7 @@ sdhi2: sd@ee140000 { clocks = <&mstp3_clks R8A7790_CLK_SDHI2>; dmas = <&dmac1 0xc1>, <&dmac1 0xc2>; dma-names = "tx", "rx"; + max-frequency = <97500000>; power-domains = <&cpg_clocks>; status = "disabled"; }; @@ -622,6 +625,7 @@ sdhi3: sd@ee160000 { clocks = <&mstp3_clks R8A7790_CLK_SDHI3>; dmas = <&dmac1 0xd3>, <&dmac1 0xd4>; dma-names = "tx", "rx"; + max-frequency = <97500000>; power-domains = <&cpg_clocks>; status = "disabled"; }; From 1ca79699cb958c17b0b08d9f9bd683e5011e7927 Mon Sep 17 00:00:00 2001 From: Wolfram Sang Date: Fri, 1 Apr 2016 17:44:39 +0200 Subject: [PATCH 18/22] ARM: dts: r8a7790: lager: Enable UHS-I SDR-50 Add the "1v8" pinctrl state and sd-uhs-sdr50 property to SDHI{0,2}. Signed-off-by: Ben Hutchings Signed-off-by: Wolfram Sang Signed-off-by: Simon Horman --- arch/arm/boot/dts/r8a7790-lager.dts | 22 ++++++++++++++++++++-- 1 file changed, 20 insertions(+), 2 deletions(-) diff --git a/arch/arm/boot/dts/r8a7790-lager.dts b/arch/arm/boot/dts/r8a7790-lager.dts index 823a119cb1b4..749ba02b6a53 100644 --- a/arch/arm/boot/dts/r8a7790-lager.dts +++ b/arch/arm/boot/dts/r8a7790-lager.dts @@ -345,11 +345,25 @@ scifa1_pins: serial1 { sdhi0_pins: sd0 { groups = "sdhi0_data4", "sdhi0_ctrl"; function = "sdhi0"; + power-source = <3300>; + }; + + sdhi0_pins_uhs: sd0_uhs { + groups = "sdhi0_data4", "sdhi0_ctrl"; + function = "sdhi0"; + power-source = <1800>; }; sdhi2_pins: sd2 { groups = "sdhi2_data4", "sdhi2_ctrl"; function = "sdhi2"; + power-source = <3300>; + }; + + sdhi2_pins_uhs: sd2_uhs { + groups = "sdhi2_data4", "sdhi2_ctrl"; + function = "sdhi2"; + power-source = <1800>; }; mmc1_pins: mmc1 { @@ -538,21 +552,25 @@ pmic: pmic@0 { &sdhi0 { pinctrl-0 = <&sdhi0_pins>; - pinctrl-names = "default"; + pinctrl-1 = <&sdhi0_pins_uhs>; + pinctrl-names = "default", "state_uhs"; vmmc-supply = <&vcc_sdhi0>; vqmmc-supply = <&vccq_sdhi0>; cd-gpios = <&gpio3 6 GPIO_ACTIVE_LOW>; + sd-uhs-sdr50; status = "okay"; }; &sdhi2 { pinctrl-0 = <&sdhi2_pins>; - pinctrl-names = "default"; + pinctrl-1 = <&sdhi2_pins_uhs>; + pinctrl-names = "default", "state_uhs"; vmmc-supply = <&vcc_sdhi2>; vqmmc-supply = <&vccq_sdhi2>; cd-gpios = <&gpio3 22 GPIO_ACTIVE_LOW>; + sd-uhs-sdr50; status = "okay"; }; From 7e2a1bcd2185c9d7d4c9b2910249a1a8fa841341 Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Thu, 14 Apr 2016 11:58:42 +0200 Subject: [PATCH 19/22] ARM: dts: kzm9g: Configure NMI key as wake-up source Add a GPIO key with wake-up capability for the NMI button. This allows to wake up the system from s2ram without relying on the buttons on the optional switch board. Signed-off-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- arch/arm/boot/dts/sh73a0-kzm9g.dts | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/arch/arm/boot/dts/sh73a0-kzm9g.dts b/arch/arm/boot/dts/sh73a0-kzm9g.dts index e40a2f23b6cd..c2d8a080e392 100644 --- a/arch/arm/boot/dts/sh73a0-kzm9g.dts +++ b/arch/arm/boot/dts/sh73a0-kzm9g.dts @@ -149,6 +149,13 @@ home-key { label = "SW1"; wakeup-source; }; + + wakeup-key { + gpios = <&pfc 159 GPIO_ACTIVE_LOW>; + linux,code = ; + label = "NMI"; + wakeup-source; + }; }; sound { From 21c7d0fcbe10a1a81fb791a9bdcca2381bc16c15 Mon Sep 17 00:00:00 2001 From: Wolfram Sang Date: Mon, 18 Apr 2016 11:41:30 +0200 Subject: [PATCH 20/22] ARM: dts: r8a7790: fix max-frequency for SDHI The wrong values come from an old datasheet (H2 v0.6). Anything later has the fixed value of 195MHz (H2 v0.7 up to Gen2-common V2.0). Signed-off-by: Wolfram Sang Reviewed-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- arch/arm/boot/dts/r8a7790.dtsi | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm/boot/dts/r8a7790.dtsi b/arch/arm/boot/dts/r8a7790.dtsi index b920facb0c3b..776a2aed81d2 100644 --- a/arch/arm/boot/dts/r8a7790.dtsi +++ b/arch/arm/boot/dts/r8a7790.dtsi @@ -589,7 +589,7 @@ sdhi0: sd@ee100000 { clocks = <&mstp3_clks R8A7790_CLK_SDHI0>; dmas = <&dmac1 0xcd>, <&dmac1 0xce>; dma-names = "tx", "rx"; - max-frequency = <156000000>; + max-frequency = <195000000>; power-domains = <&cpg_clocks>; status = "disabled"; }; @@ -601,7 +601,7 @@ sdhi1: sd@ee120000 { clocks = <&mstp3_clks R8A7790_CLK_SDHI1>; dmas = <&dmac1 0xc9>, <&dmac1 0xca>; dma-names = "tx", "rx"; - max-frequency = <156000000>; + max-frequency = <195000000>; power-domains = <&cpg_clocks>; status = "disabled"; }; From fc9ee228f5005437b9fdb1b85804b6d3f8d497be Mon Sep 17 00:00:00 2001 From: Ulrich Hecht Date: Mon, 18 Apr 2016 18:02:56 +0200 Subject: [PATCH 21/22] ARM: dts: r8a7793: Add SDHI controllers Same as on r8a7791. Signed-off-by: Ulrich Hecht Signed-off-by: Simon Horman --- arch/arm/boot/dts/r8a7793.dtsi | 33 +++++++++++++++++++++++++++++++++ 1 file changed, 33 insertions(+) diff --git a/arch/arm/boot/dts/r8a7793.dtsi b/arch/arm/boot/dts/r8a7793.dtsi index bddc31283bd9..6186179fd66d 100644 --- a/arch/arm/boot/dts/r8a7793.dtsi +++ b/arch/arm/boot/dts/r8a7793.dtsi @@ -507,6 +507,39 @@ pfc: pfc@e6060000 { reg = <0 0xe6060000 0 0x250>; }; + sdhi0: sd@ee100000 { + compatible = "renesas,sdhi-r8a7793"; + reg = <0 0xee100000 0 0x328>; + interrupts = ; + clocks = <&mstp3_clks R8A7793_CLK_SDHI0>; + dmas = <&dmac0 0xcd>, <&dmac0 0xce>; + dma-names = "tx", "rx"; + power-domains = <&cpg_clocks>; + status = "disabled"; + }; + + sdhi1: sd@ee140000 { + compatible = "renesas,sdhi-r8a7793"; + reg = <0 0xee140000 0 0x100>; + interrupts = ; + clocks = <&mstp3_clks R8A7793_CLK_SDHI1>; + dmas = <&dmac0 0xc1>, <&dmac0 0xc2>; + dma-names = "tx", "rx"; + power-domains = <&cpg_clocks>; + status = "disabled"; + }; + + sdhi2: sd@ee160000 { + compatible = "renesas,sdhi-r8a7793"; + reg = <0 0xee160000 0 0x100>; + interrupts = ; + clocks = <&mstp3_clks R8A7793_CLK_SDHI2>; + dmas = <&dmac0 0xd3>, <&dmac0 0xd4>; + dma-names = "tx", "rx"; + power-domains = <&cpg_clocks>; + status = "disabled"; + }; + scifa0: serial@e6c40000 { compatible = "renesas,scifa-r8a7793", "renesas,rcar-gen2-scifa", "renesas,scifa"; From 6f92cb2f454c26d9bdada902e22af4bc361a5202 Mon Sep 17 00:00:00 2001 From: Ulrich Hecht Date: Mon, 18 Apr 2016 18:02:57 +0200 Subject: [PATCH 22/22] ARM: dts: gose: Enable SDHI controllers Includes regulator and pin assignments. Signed-off-by: Ulrich Hecht Signed-off-by: Simon Horman --- arch/arm/boot/dts/r8a7793-gose.dts | 119 +++++++++++++++++++++++++++++ 1 file changed, 119 insertions(+) diff --git a/arch/arm/boot/dts/r8a7793-gose.dts b/arch/arm/boot/dts/r8a7793-gose.dts index 3cd1c804621f..0ebc3ee34923 100644 --- a/arch/arm/boot/dts/r8a7793-gose.dts +++ b/arch/arm/boot/dts/r8a7793-gose.dts @@ -158,6 +158,78 @@ led8 { }; }; + vcc_sdhi0: regulator@0 { + compatible = "regulator-fixed"; + + regulator-name = "SDHI0 Vcc"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + + gpio = <&gpio7 17 GPIO_ACTIVE_HIGH>; + enable-active-high; + }; + + vccq_sdhi0: regulator@1 { + compatible = "regulator-gpio"; + + regulator-name = "SDHI0 VccQ"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + + gpios = <&gpio2 12 GPIO_ACTIVE_HIGH>; + gpios-states = <1>; + states = <3300000 1 + 1800000 0>; + }; + + vcc_sdhi1: regulator@2 { + compatible = "regulator-fixed"; + + regulator-name = "SDHI1 Vcc"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + + gpio = <&gpio7 18 GPIO_ACTIVE_HIGH>; + enable-active-high; + }; + + vccq_sdhi1: regulator@3 { + compatible = "regulator-gpio"; + + regulator-name = "SDHI1 VccQ"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + + gpios = <&gpio2 13 GPIO_ACTIVE_HIGH>; + gpios-states = <1>; + states = <3300000 1 + 1800000 0>; + }; + + vcc_sdhi2: regulator@4 { + compatible = "regulator-fixed"; + + regulator-name = "SDHI2 Vcc"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + + gpio = <&gpio7 19 GPIO_ACTIVE_HIGH>; + enable-active-high; + }; + + vccq_sdhi2: regulator@5 { + compatible = "regulator-gpio"; + + regulator-name = "SDHI2 VccQ"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + + gpios = <&gpio2 26 GPIO_ACTIVE_HIGH>; + gpios-states = <1>; + states = <3300000 1 + 1800000 0>; + }; + audio_clock: audio_clock { compatible = "fixed-clock"; #clock-cells = <0>; @@ -273,6 +345,21 @@ phy1_pins: phy1 { function = "intc"; }; + sdhi0_pins: sd0 { + renesas,groups = "sdhi0_data4", "sdhi0_ctrl"; + renesas,function = "sdhi0"; + }; + + sdhi1_pins: sd1 { + renesas,groups = "sdhi1_data4", "sdhi1_ctrl"; + renesas,function = "sdhi1"; + }; + + sdhi2_pins: sd2 { + renesas,groups = "sdhi2_data4", "sdhi2_ctrl"; + renesas,function = "sdhi2"; + }; + qspi_pins: spi0 { groups = "qspi_ctrl", "qspi_data4"; function = "qspi"; @@ -328,6 +415,38 @@ &scif_clk { status = "okay"; }; +&sdhi0 { + pinctrl-0 = <&sdhi0_pins>; + pinctrl-names = "default"; + + vmmc-supply = <&vcc_sdhi0>; + vqmmc-supply = <&vccq_sdhi0>; + cd-gpios = <&gpio6 6 GPIO_ACTIVE_LOW>; + wp-gpios = <&gpio6 7 GPIO_ACTIVE_HIGH>; + status = "okay"; +}; + +&sdhi1 { + pinctrl-0 = <&sdhi1_pins>; + pinctrl-names = "default"; + + vmmc-supply = <&vcc_sdhi1>; + vqmmc-supply = <&vccq_sdhi1>; + cd-gpios = <&gpio6 14 GPIO_ACTIVE_LOW>; + wp-gpios = <&gpio6 15 GPIO_ACTIVE_HIGH>; + status = "okay"; +}; + +&sdhi2 { + pinctrl-0 = <&sdhi2_pins>; + pinctrl-names = "default"; + + vmmc-supply = <&vcc_sdhi2>; + vqmmc-supply = <&vccq_sdhi2>; + cd-gpios = <&gpio6 22 GPIO_ACTIVE_LOW>; + status = "okay"; +}; + &qspi { pinctrl-0 = <&qspi_pins>; pinctrl-names = "default";