Misc fixes:
- an uclamp accounting fix - three frequency invariance fixes and a readability improvement Signed-off-by: Ingo Molnar <mingo@kernel.org> -----BEGIN PGP SIGNATURE----- iQJFBAABCgAvFiEEBpT5eoXrXCwVQwEKEnMQ0APhK1gFAl6kAS8RHG1pbmdvQGtl cm5lbC5vcmcACgkQEnMQ0APhK1g0jg//Su8CnWMzOvs4mzqUvzb3OHV6PeQ8BZva yI0h8z8V3S33LchwXjb6FI4VulGaGPwLD7tPZtdAdz+wTCnrhw5Rlgfk2thjROW2 XnWxUACZrAbcH5H88PF0rVp3Z8oaygwlFZCUhvJxLUOgVi4oipNr+0ZNZVATGwO+ wpCheVKIty6hlMRmNamUDNOB15xFRvXGSQ+kn0N2h/XIvke5f89AJ7uOgTuZ42Ne m1vkgX7J29yieLt4yY6odgxlcqlFNAKegpzaadWkEPNOyqkG29pOKwBX7LpuDRVS 8jd5vo65snKDEQuBkG/CfActJR3GpNT5CVx8wzft7nDb81sEPEPb5sCCURMv5Ig3 UpEpvzCqYokC2z+ourjtugvilmHq6odwW9XbD/a8i24X+fo13oPg72EVMF7+PLuL xZZfhxuQ3hcUGB+H83COEiA8XsNcFxCk7hcHhPyPZeagbGWUTozrwRn/JItAp5Bv xkKmqefOu0bZYDGKwP5fMJZ5BmNiWKNw6PyH7lfzL8Ve6dKXlMWMre5cwEUJXPUe scpPjvokvZo7C4FTy8U/7cAZlmVy27Y9Ljyf9nROWLp4KewznP3FBdGEv2+IE8uu m90vpYXv3Y/4JsLyxg+MMkhnOb26e8vFh6roWQxtPluhWyFlTilmBYovLmFz2RBO eqpS9MVBuRs= =5Wor -----END PGP SIGNATURE----- Merge tag 'sched-urgent-2020-04-25' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip Pull scheduler fixes from Ingo Molnar: "Misc fixes: - an uclamp accounting fix - three frequency invariance fixes and a readability improvement" * tag 'sched-urgent-2020-04-25' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: sched/core: Fix reset-on-fork from RT with uclamp x86, sched: Move check for CPU type to caller function x86, sched: Don't enable static key when starting secondary CPUs x86, sched: Account for CPUs with less than 4 cores in freq. invariance x86, sched: Bail out of frequency invariance if base frequency is unknown
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05db498ad9
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@ -147,7 +147,7 @@ static inline void smpboot_restore_warm_reset_vector(void)
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*((volatile u32 *)phys_to_virt(TRAMPOLINE_PHYS_LOW)) = 0;
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}
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static void init_freq_invariance(void);
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static void init_freq_invariance(bool secondary);
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/*
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* Report back to the Boot Processor during boot time or to the caller processor
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@ -185,7 +185,7 @@ static void smp_callin(void)
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*/
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set_cpu_sibling_map(raw_smp_processor_id());
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init_freq_invariance();
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init_freq_invariance(true);
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/*
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* Get our bogomips.
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@ -1341,7 +1341,7 @@ void __init native_smp_prepare_cpus(unsigned int max_cpus)
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set_sched_topology(x86_topology);
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set_cpu_sibling_map(0);
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init_freq_invariance();
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init_freq_invariance(false);
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smp_sanity_check();
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switch (apic_intr_mode) {
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@ -1877,9 +1877,6 @@ static bool knl_set_max_freq_ratio(u64 *base_freq, u64 *turbo_freq,
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int err, i;
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u64 msr;
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if (!x86_match_cpu(has_knl_turbo_ratio_limits))
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return false;
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err = rdmsrl_safe(MSR_PLATFORM_INFO, base_freq);
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if (err)
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return false;
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@ -1945,18 +1942,23 @@ static bool skx_set_max_freq_ratio(u64 *base_freq, u64 *turbo_freq, int size)
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static bool core_set_max_freq_ratio(u64 *base_freq, u64 *turbo_freq)
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{
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u64 msr;
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int err;
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err = rdmsrl_safe(MSR_PLATFORM_INFO, base_freq);
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if (err)
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return false;
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err = rdmsrl_safe(MSR_TURBO_RATIO_LIMIT, turbo_freq);
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err = rdmsrl_safe(MSR_TURBO_RATIO_LIMIT, &msr);
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if (err)
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return false;
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*base_freq = (*base_freq >> 8) & 0xFF; /* max P state */
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*turbo_freq = (*turbo_freq >> 24) & 0xFF; /* 4C turbo */
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*turbo_freq = (msr >> 24) & 0xFF; /* 4C turbo */
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/* The CPU may have less than 4 cores */
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if (!*turbo_freq)
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*turbo_freq = msr & 0xFF; /* 1C turbo */
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return true;
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}
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@ -1972,7 +1974,8 @@ static bool intel_set_max_freq_ratio(void)
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skx_set_max_freq_ratio(&base_freq, &turbo_freq, 1))
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goto out;
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if (knl_set_max_freq_ratio(&base_freq, &turbo_freq, 1))
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if (x86_match_cpu(has_knl_turbo_ratio_limits) &&
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knl_set_max_freq_ratio(&base_freq, &turbo_freq, 1))
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goto out;
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if (x86_match_cpu(has_skx_turbo_ratio_limits) &&
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@ -1985,13 +1988,22 @@ static bool intel_set_max_freq_ratio(void)
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return false;
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out:
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/*
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* Some hypervisors advertise X86_FEATURE_APERFMPERF
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* but then fill all MSR's with zeroes.
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*/
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if (!base_freq) {
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pr_debug("Couldn't determine cpu base frequency, necessary for scale-invariant accounting.\n");
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return false;
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}
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arch_turbo_freq_ratio = div_u64(turbo_freq * SCHED_CAPACITY_SCALE,
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base_freq);
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arch_set_max_freq_ratio(turbo_disabled());
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return true;
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}
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static void init_counter_refs(void *arg)
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static void init_counter_refs(void)
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{
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u64 aperf, mperf;
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@ -2002,18 +2014,25 @@ static void init_counter_refs(void *arg)
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this_cpu_write(arch_prev_mperf, mperf);
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}
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static void init_freq_invariance(void)
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static void init_freq_invariance(bool secondary)
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{
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bool ret = false;
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if (smp_processor_id() != 0 || !boot_cpu_has(X86_FEATURE_APERFMPERF))
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if (!boot_cpu_has(X86_FEATURE_APERFMPERF))
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return;
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if (secondary) {
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if (static_branch_likely(&arch_scale_freq_key)) {
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init_counter_refs();
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}
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return;
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}
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if (boot_cpu_data.x86_vendor == X86_VENDOR_INTEL)
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ret = intel_set_max_freq_ratio();
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if (ret) {
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on_each_cpu(init_counter_refs, NULL, 1);
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init_counter_refs();
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static_branch_enable(&arch_scale_freq_key);
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} else {
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pr_debug("Couldn't determine max cpu frequency, necessary for scale-invariant accounting.\n");
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@ -1232,13 +1232,8 @@ static void uclamp_fork(struct task_struct *p)
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return;
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for_each_clamp_id(clamp_id) {
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unsigned int clamp_value = uclamp_none(clamp_id);
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/* By default, RT tasks always get 100% boost */
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if (unlikely(rt_task(p) && clamp_id == UCLAMP_MIN))
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clamp_value = uclamp_none(UCLAMP_MAX);
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uclamp_se_set(&p->uclamp_req[clamp_id], clamp_value, false);
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uclamp_se_set(&p->uclamp_req[clamp_id],
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uclamp_none(clamp_id), false);
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}
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}
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